Hi,
Hope you are doing great. This is Neha from Deegit Inc. Please go through the below job description and please let me know if you are interested. *(Only GC or Citizen)* *Below is the Job Description for your reference:* *Position: 1* *Role: UPF Verification Engineer* *Duration: 6+ Months* *Location: Santa Clara, CA* *About the Role/Position: * UPF coding and static verification (e.g. Conformal LP) *Key words are:* Equivalence checking, low power static checks, CLP, power domains, UPF/CPF *Position: 2* *Role: Device Driver Engineer* *Duration: 6+ Months* *Location: Santa Clara, CA* *About the Role/Position: * · Good C and ARM assembly language skills · Experience developing low level software (such as low level device drivers for PCIe, DMA and similar peripherals) that interacts with the HW · Experience with embedded OS’s (ThreadX) preferred · Good debugging skills – experience using ARM DStream/Lauterbach debuggers, Logic Analyzers · An ideal candidate would have previously worked on Chip/Platform bring up. · Good knowledge of multi-core ARM processors. *Position: 3* *Role: Custom Digital Design Engineer* *Duration: 6+ Months* *Location: Hillsboro, OR* *About the Role/Position: * · In this position, you will be developing and supporting mixed signal and custom digital hard IPs. · *The job will entail:* verifying digital timing performance, noise analysis, logic equivalence, power characterization, netlist support of layout tasks, analysis of late changing process files, generating of Hard IP collateral for SOC consumption, verifying collateral quality, and providing collateral support to SOC customers. · *Additional Skills and or education:* · The candidate should have a Bachelor's degree in Electrical Engineering or Electrical and Computer Engineering. · More advanced degrees are preferred. · Additional qualifications include: - · Experience with static timing analysis tools, custom analog simulation, cadence schematic entry, familiarity with various mixed signals circuits like analog IO, PLL, clock generation, analog to dig converters, and LDO voltage regulator circuits. · Good - Verbal and written communication skills · Years of experience required for this positions: 3+ years. · HS diploma or GED equivalent required for US candidates. *Key words are: * Equivalence checking, low power static checks, CLP, power domains, UPF/CPF *Position: 4* *Role: UPF Verification Engineer* *Duration: 6+ Months* *Location: Hillsboro, OR* *About the Role/Position: * · This work will be mainly in the synthesis and auto place and route (APR) areas. · Candidate will take all of the required input files and scripts needed to run through the synthesis (RTL to netlist) and APR flows from floorplan to converged layout. · This will also include, but not be limited to, meeting timing, performance verification, power, quality (DRC) and layout requirements (Layout verification/LVS). · This may also include work that will come from other projects. *Please send me your resume along with the following details:* Full Legal Name: Visa/Legal Status & Visa Expiry Date: Current Location: Willing to Relocate: Skype ID: SSN (Last 4 Digits): Education with University details (Year of passing ): Last project ended date along with reason (reasons can be): LinkedIn ID: Kind regards, Neha Srigadi | Technical Recruiter [image: cid:image001.jpg@01D245AA.651A6070] <https://www.facebook.com/DeegitInc/> *DeegitTM Inc* | Technology Consulting 1900 E Golf Rd., Suite 925 | Schaumburg, IL 60173 *Phone* (847) 440 2436 Ext. 368 *Email* n...@deegit.com *Skype* [image: cid:image002.png@01D245AA.651A6070] www.deegit.com [image: cid:image003.jpg@01D245AA.651A6070] The information transmitted is intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material. Any review, retransmission, dissemination or other use of, or taking of any action in reliance upon this information by persons or entities other than the intended recipient is prohibited. If you received this in error, please contact the sender and delete the material from any computer. -- You received this message because you are subscribed to the Google Groups "USITCV" group. To unsubscribe from this group and stop receiving emails from it, send an email to usitcv+unsubscr...@googlegroups.com. To post to this group, send email to usitcv@googlegroups.com. Visit this group at https://groups.google.com/group/usitcv. For more options, visit https://groups.google.com/d/optout.
