Re: [USRP-users] Design with Vivado
Thank you for the quick response. I have another question.. if I have a custom IP core generated with System Generator (Simulink/MatLab), can I integrate it with RFNoC? Alice Il 14/11/17 00:34, Marcus D. Leech via USRP-users ha scritto: On 11/13/2017 06:18 PM, Alice Lo Valvo via USRP-users wrote: Hi, I'm working with USRP X series. I'm wondering if I can design my custom IP Core (or project) with Vivado and then integrate it with RFNoC. If yes, how can I do it? Thank you in advance, Alice ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com You might find this useful: https://kb.ettus.com/Getting_Started_with_RFNoC_Development ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Design with Vivado
On 11/13/2017 06:18 PM, Alice Lo Valvo via USRP-users wrote: Hi, I'm working with USRP X series. I'm wondering if I can design my custom IP Core (or project) with Vivado and then integrate it with RFNoC. If yes, how can I do it? Thank you in advance, Alice ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com You might find this useful: https://kb.ettus.com/Getting_Started_with_RFNoC_Development ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] Design with Vivado
Hi, I'm working with USRP X series. I'm wondering if I can design my custom IP Core (or project) with Vivado and then integrate it with RFNoC. If yes, how can I do it? Thank you in advance, Alice ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Reprogramming a "Bricked" N210
Hi Mark. Have you tried ISE on Windows machine? The Xilinx Linux cable drivers from that era were quite unreliable. Alternatively, there are also some old blog posts about Linux workarounds: http://dreamrunner.org/blog/2012/09/12/install-xilinx-ise-on-the-ubuntu/ -Robin On Mon, Nov 13, 2017 at 10:51 AM, Marcus D. Leechwrote: > On 11/13/2017 08:55 AM, Mark Koenig wrote: > >> Just to follow up, all of the voltages on J105, J104, and J107 are >> correct. >> >> Mark >> > I would focus on trying to get Impact working in your environment. The > Xilinx support forums may be a more fruitful avenue for that part of the > problem. > > > > >> On 11/9/17, 6:15 PM, "Mark Koenig" >> wrote: >> >> Robin and Marcus, >> Thank you for the suggestions. Marcus, I did try and follow >> your suggestion, however, I cannot communicate with the N210 other than >> through the Jtag port communication. >> Robin, I did install the Xilinx ISE 14.7 Labtools and ran >> Impact, however, I kept getting a windrv6 driver error. I downloaded the >> cable drivers, but it still won’t work. >> Below are some questions I found on the ETTUS website, and my >> answers are below each question. >> Listed below are some specific things that you can check to >> verify whether or not your N200/N210 hardware is working correctly. If the >> answer to any of the questions listed below is "no", then there is probably >> a hardware problem. >> I would appreciate any other suggestions. Thank you. >> Does the fan spin? >> Yes. >> Do any of the LEDs on the front panel light up? Which ones? ( >> http://files.ettus.com/manual/page_usrp2.html#usrp2_hw_leds) >> No. >> Are the lights on the Ethernet port flashing, when the N210 is >> connected to the host computer? Note that the N200/N210 must be connected >> to a 1 Gigabit Ethernet port. A 100 Mbps Ethernet port will not work. >> No. >> Check the voltages on these connectors on the motherboard: J105 >> (should be 2.5V); J104 (should be 3.3V); J107 (should be 1.2V). Do you see >> the correct voltages on those connectors? >> I will acquire a DMM and measure the voltages. >> Does the LED at D203 on the motherboard light up? If you're holding >> the N210 such that the front panel is facing you, then D203 is located near >> the left connector for the daughterboard. >> No, another LED is lit up (D202) >> Message: 13 >> Date: Tue, 31 Oct 2017 14:12:58 -0700 >> From: Robin Coxe >> To: "Marcus D. Leech" >> Cc: USRP-users >> Subject: Re: [USRP-users] Reprogramming a "Bricked" N210 >> Message-ID: >> > cxpf2unwmwwnjs8tlud...@mail.gmail.com> >> Content-Type: text/plain; charset="utf-8" >> Hi Mark. One thought-- Vivado does not support the >> Spartan-3A FPGA on the >> USRP N210.The JTAG protocol should in principal be the same, >> but Vivado >> definitely does not include Xilinx device files for older FPGAs. >> Have you tried to resurrect the device using Xilinx ISE >> 14.7 Labtools? >> https://www.xilinx.com/member/forms/download/xef. >> html?filename=Xilinx_LabTools_14.7_1015_1.tar=1 >> If that fails, please report back and we will try to >> assist you further. >> -Robin >>On Tue, Oct 31, 2017 at 1:46 PM, Marcus D. >> Leech via USRP-users < >> usrp-users@lists.ettus.com> wrote: >> > On 10/31/2017 04:21 PM, Mark Koenig via USRP-users >> wrote: >> > >> > Again, >> > >> > >> > >> > Looking to see if anyone can help on this. >> > >> > >> > >> > One more detail is that I am unable to reboot the N210 into >> safe mode, >> > thus no green lights come on. >> > >> > >> > >> > Thanks >> > >> > >> > >> > Mark >> > >> > OK, so you've followed the JTAG-based procedures here >> > >> > https://kb.ettus.com/N200/N210_Device_Recovery >> > >> > ANd still cannot get it to "go" ? >> >> > > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Reprogramming a "Bricked" N210
On 11/13/2017 08:55 AM, Mark Koenig wrote: Just to follow up, all of the voltages on J105, J104, and J107 are correct. Mark I would focus on trying to get Impact working in your environment. The Xilinx support forums may be a more fruitful avenue for that part of the problem. On 11/9/17, 6:15 PM, "Mark Koenig"wrote: Robin and Marcus, Thank you for the suggestions. Marcus, I did try and follow your suggestion, however, I cannot communicate with the N210 other than through the Jtag port communication. Robin, I did install the Xilinx ISE 14.7 Labtools and ran Impact, however, I kept getting a windrv6 driver error. I downloaded the cable drivers, but it still won’t work. Below are some questions I found on the ETTUS website, and my answers are below each question. Listed below are some specific things that you can check to verify whether or not your N200/N210 hardware is working correctly. If the answer to any of the questions listed below is "no", then there is probably a hardware problem. I would appreciate any other suggestions. Thank you. Does the fan spin? Yes. Do any of the LEDs on the front panel light up? Which ones? (http://files.ettus.com/manual/page_usrp2.html#usrp2_hw_leds) No. Are the lights on the Ethernet port flashing, when the N210 is connected to the host computer? Note that the N200/N210 must be connected to a 1 Gigabit Ethernet port. A 100 Mbps Ethernet port will not work. No. Check the voltages on these connectors on the motherboard: J105 (should be 2.5V); J104 (should be 3.3V); J107 (should be 1.2V). Do you see the correct voltages on those connectors? I will acquire a DMM and measure the voltages. Does the LED at D203 on the motherboard light up? If you're holding the N210 such that the front panel is facing you, then D203 is located near the left connector for the daughterboard. No, another LED is lit up (D202) Message: 13 Date: Tue, 31 Oct 2017 14:12:58 -0700 From: Robin Coxe To: "Marcus D. Leech" Cc: USRP-users Subject: Re: [USRP-users] Reprogramming a "Bricked" N210 Message-ID: Content-Type: text/plain; charset="utf-8" Hi Mark. One thought-- Vivado does not support the Spartan-3A FPGA on the USRP N210.The JTAG protocol should in principal be the same, but Vivado definitely does not include Xilinx device files for older FPGAs. Have you tried to resurrect the device using Xilinx ISE 14.7 Labtools? https://www.xilinx.com/member/forms/download/xef.html?filename=Xilinx_LabTools_14.7_1015_1.tar=1 If that fails, please report back and we will try to assist you further. -Robin On Tue, Oct 31, 2017 at 1:46 PM, Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com> wrote: > On 10/31/2017 04:21 PM, Mark Koenig via USRP-users wrote: > > Again, > > > > Looking to see if anyone can help on this. > > > > One more detail is that I am unable to reboot the N210 into safe mode, > thus no green lights come on. > > > > Thanks > > > > Mark > > OK, so you've followed the JTAG-based procedures here > > https://kb.ettus.com/N200/N210_Device_Recovery > > ANd still cannot get it to "go" ? ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Reprogramming a "Bricked" N210
Just to follow up, all of the voltages on J105, J104, and J107 are correct. Mark On 11/9/17, 6:15 PM, "Mark Koenig"wrote: Robin and Marcus, Thank you for the suggestions. Marcus, I did try and follow your suggestion, however, I cannot communicate with the N210 other than through the Jtag port communication. Robin, I did install the Xilinx ISE 14.7 Labtools and ran Impact, however, I kept getting a windrv6 driver error. I downloaded the cable drivers, but it still won’t work. Below are some questions I found on the ETTUS website, and my answers are below each question. Listed below are some specific things that you can check to verify whether or not your N200/N210 hardware is working correctly. If the answer to any of the questions listed below is "no", then there is probably a hardware problem. I would appreciate any other suggestions. Thank you. Does the fan spin? Yes. Do any of the LEDs on the front panel light up? Which ones? (http://files.ettus.com/manual/page_usrp2.html#usrp2_hw_leds) No. Are the lights on the Ethernet port flashing, when the N210 is connected to the host computer? Note that the N200/N210 must be connected to a 1 Gigabit Ethernet port. A 100 Mbps Ethernet port will not work. No. Check the voltages on these connectors on the motherboard: J105 (should be 2.5V); J104 (should be 3.3V); J107 (should be 1.2V). Do you see the correct voltages on those connectors? I will acquire a DMM and measure the voltages. Does the LED at D203 on the motherboard light up? If you're holding the N210 such that the front panel is facing you, then D203 is located near the left connector for the daughterboard. No, another LED is lit up (D202) Message: 13 Date: Tue, 31 Oct 2017 14:12:58 -0700 From: Robin Coxe To: "Marcus D. Leech" Cc: USRP-users Subject: Re: [USRP-users] Reprogramming a "Bricked" N210 Message-ID: Content-Type: text/plain; charset="utf-8" Hi Mark. One thought-- Vivado does not support the Spartan-3A FPGA on the USRP N210.The JTAG protocol should in principal be the same, but Vivado definitely does not include Xilinx device files for older FPGAs. Have you tried to resurrect the device using Xilinx ISE 14.7 Labtools? https://www.xilinx.com/member/forms/download/xef.html?filename=Xilinx_LabTools_14.7_1015_1.tar=1 If that fails, please report back and we will try to assist you further. -Robin On Tue, Oct 31, 2017 at 1:46 PM, Marcus D. Leech via USRP-users < usrp-users@lists.ettus.com> wrote: > On 10/31/2017 04:21 PM, Mark Koenig via USRP-users wrote: > > Again, > > > > Looking to see if anyone can help on this. > > > > One more detail is that I am unable to reboot the N210 into safe mode, > thus no green lights come on. > > > > Thanks > > > > Mark > > OK, so you've followed the JTAG-based procedures here > > https://kb.ettus.com/N200/N210_Device_Recovery > > ANd still cannot get it to "go" ? ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Fwd: Re: USRP's B210 sluggish start of transmission
Dear list, Little update on transmitting bursts and simultaneous receiving with USRP B210. When I connect anything that has some path between TX/RX SMA port's body and inner female sleeve contact (like 3dB attenuator or even my finger) the output signal starts to look ok. I don't know what is causing this and if it can be corrected with a firmware change (I'm not actively looking for the cause currently). Best Regards, Piotr Krysik ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com