On Mon, 3 Apr 2017, Bhupinder Thakur wrote:
> The SBSA uart node format is as specified in
> Documentation/devicetree/bindings/serial/arm_sbsa_uart.txt and given below:
>
> ARM SBSA defined generic UART
> --
> This UART uses a subset of the PL011 registers and consequently lives
> in the PL011 driver. It's baudrate and other communication parameters
> cannot be adjusted at runtime, so it lacks a clock specifier here.
>
> Required properties:
> - compatible: must be "arm,sbsa-uart"
> - reg: exactly one register range
> - interrupts: exactly one interrupt specifier
> - current-speed: the (fixed) baud rate set by the firmware
>
> Signed-off-by: Bhupinder Thakur
> ---
> tools/libxl/libxl_arm.c | 48 ++--
> 1 file changed, 46 insertions(+), 2 deletions(-)
>
> diff --git a/tools/libxl/libxl_arm.c b/tools/libxl/libxl_arm.c
> index d842d88..b25fff6 100644
> --- a/tools/libxl/libxl_arm.c
> +++ b/tools/libxl/libxl_arm.c
> @@ -57,6 +57,13 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc,
> nr_spis = spi + 1;
> }
>
> +/*
> + * If pl011 is enabled then increment the nr_spis to allow allocation
> + * of a SPI VIRQ for pl011.
> + */
> +if (libxl_defbool_val(d_config->b_info.enable_pl011))
> +nr_spis += 1;
> +
> LOG(DEBUG, "Configure the domain");
>
> xc_config->nr_spis = nr_spis;
> @@ -130,9 +137,10 @@ static struct arch_info {
> const char *guest_type;
> const char *timer_compat;
> const char *cpu_compat;
> +const char *uart_compat;
> } arch_info[] = {
> -{"xen-3.0-armv7l", "arm,armv7-timer", "arm,cortex-a15" },
> -{"xen-3.0-aarch64", "arm,armv8-timer", "arm,armv8" },
> +{"xen-3.0-armv7l", "arm,armv7-timer", "arm,cortex-a15", "arm,sbsa-uart"
> },
> +{"xen-3.0-aarch64", "arm,armv8-timer", "arm,armv8", "arm,sbsa-uart" },
> };
>
> /*
> @@ -590,6 +598,39 @@ static int make_hypervisor_node(libxl__gc *gc, void *fdt,
> return 0;
> }
>
> +static int make_vpl011_uart_node(libxl__gc *gc, void *fdt,
> + const struct arch_info *ainfo,
> + struct xc_dom_image *dom)
> +{
> +int res;
> +gic_interrupt intr;
> +
> +res = fdt_begin_node(fdt, "sbsa-pl011");
> +if (res) return res;
> +
> +res = fdt_property_compat(gc, fdt, 1, ainfo->uart_compat);
> +if (res) return res;
> +
> +res = fdt_property_regs(gc, fdt, ROOT_ADDRESS_CELLS, ROOT_SIZE_CELLS,
> +1,
> +GUEST_PL011_BASE, GUEST_PL011_SIZE);
strange indentation
> +if (res)
> +return res;
you might as well keep doing if (res) return res; everywhere.
Aside from these two minor issues:
Reviewed-by: Stefano Stabellini
> +set_interrupt(intr, GUEST_VPL011_SPI, 0xf, DT_IRQ_TYPE_LEVEL_HIGH);
> +
> +res = fdt_property_interrupts(gc, fdt, , 1);
> +if (res) return res;
> +
> +/* Use a default baud rate of 115200. */
> +fdt_property_u32(fdt, "current-speed", 115200);
> +
> +res = fdt_end_node(fdt);
> +if (res) return res;
> +
> +return 0;
> +}
> +
> static const struct arch_info *get_arch_info(libxl__gc *gc,
> const struct xc_dom_image *dom)
> {
> @@ -889,6 +930,9 @@ next_resize:
> FDT( make_timer_node(gc, fdt, ainfo, xc_config->clock_frequency) );
> FDT( make_hypervisor_node(gc, fdt, vers) );
>
> +if ( libxl_defbool_val(info->enable_pl011) )
> +FDT( make_vpl011_uart_node(gc, fdt, ainfo, dom) );
> +
> if (pfdt)
> FDT( copy_partial_fdt(gc, fdt, pfdt) );
>
> --
> 2.7.4
>
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