Re: [Xen-devel] [PATCH 2/2] VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell)
On 17.03.15 at 18:41, donald.d.dug...@intel.com wrote: Note that the following Haswell chipsets should also be included in this list: Haswell - 0xc0f, 0xd00, 0xd04, 0xd08, 0xd0f, 0xa00, 0xa08, 0xa0f But these are desktop ones afaict, i.e. they'd belong in a separate patch (which I'll create in a minute). Jan -Original Message- From: Jan Beulich [mailto:jbeul...@suse.com] Sent: Friday, December 19, 2014 1:42 AM To: xen-devel Cc: Dugger, Donald D; Tian, Kevin; Zhang, Yang Z Subject: [PATCH 2/2] VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell) Note that the datasheet lacks PCI IDs for Dev 1 Fn 0-1, so their IDs are being added based on what https://pci-ids.ucw.cz/read/PC/8086 says. Signed-off-by: Jan Beulich jbeul...@suse.com --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -431,6 +431,7 @@ void pci_vtd_quirk(const struct pci_dev * - Potential security issue if malicious guest trigger VT-d faults. */ case 0x0e28: /* Xeon-E5v2 (IvyBridge) */ +case 0x2f28: /* Xeon-E5v3 (Haswell) */ case 0x342e: /* Tylersburg chipset (Nehalem / Westmere systems) */ case 0x3728: /* Xeon C5500/C3500 (JasperForest) */ case 0x3c28: /* Sandybridge */ @@ -443,6 +444,9 @@ void pci_vtd_quirk(const struct pci_dev /* Xeon E5/E7 v2 */ case 0x0e00: /* host bridge */ case 0x0e01: case 0x0e04 ... 0x0e0b: /* root ports */ +/* Xeon E5 v3 */ +case 0x2f00: /* host bridge */ +case 0x2f01 ... 0x2f0b: /* root ports */ /* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */ case 0x3400 ... 0x3407: /* host bridges */ case 0x3408 ... 0x3411: case 0x3420 ... 0x3421: /* root ports */ ___ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
Re: [Xen-devel] [PATCH 2/2] VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell)
Note that the following Haswell chipsets should also be included in this list: Haswell - 0xc0f, 0xd00, 0xd04, 0xd08, 0xd0f, 0xa00, 0xa08, 0xa0f -- Don Dugger Censeo Toto nos in Kansa esse decisse. - D. Gale Ph: 303/443-3786 -Original Message- From: Jan Beulich [mailto:jbeul...@suse.com] Sent: Friday, December 19, 2014 1:42 AM To: xen-devel Cc: Dugger, Donald D; Tian, Kevin; Zhang, Yang Z Subject: [PATCH 2/2] VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell) Note that the datasheet lacks PCI IDs for Dev 1 Fn 0-1, so their IDs are being added based on what https://pci-ids.ucw.cz/read/PC/8086 says. Signed-off-by: Jan Beulich jbeul...@suse.com --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -431,6 +431,7 @@ void pci_vtd_quirk(const struct pci_dev * - Potential security issue if malicious guest trigger VT-d faults. */ case 0x0e28: /* Xeon-E5v2 (IvyBridge) */ +case 0x2f28: /* Xeon-E5v3 (Haswell) */ case 0x342e: /* Tylersburg chipset (Nehalem / Westmere systems) */ case 0x3728: /* Xeon C5500/C3500 (JasperForest) */ case 0x3c28: /* Sandybridge */ @@ -443,6 +444,9 @@ void pci_vtd_quirk(const struct pci_dev /* Xeon E5/E7 v2 */ case 0x0e00: /* host bridge */ case 0x0e01: case 0x0e04 ... 0x0e0b: /* root ports */ +/* Xeon E5 v3 */ +case 0x2f00: /* host bridge */ +case 0x2f01 ... 0x2f0b: /* root ports */ /* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */ case 0x3400 ... 0x3407: /* host bridges */ case 0x3408 ... 0x3411: case 0x3420 ... 0x3421: /* root ports */ ___ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
[Xen-devel] [PATCH 2/2] VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell)
Note that the datasheet lacks PCI IDs for Dev 1 Fn 0-1, so their IDs are being added based on what https://pci-ids.ucw.cz/read/PC/8086 says. Signed-off-by: Jan Beulich jbeul...@suse.com --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -431,6 +431,7 @@ void pci_vtd_quirk(const struct pci_dev * - Potential security issue if malicious guest trigger VT-d faults. */ case 0x0e28: /* Xeon-E5v2 (IvyBridge) */ +case 0x2f28: /* Xeon-E5v3 (Haswell) */ case 0x342e: /* Tylersburg chipset (Nehalem / Westmere systems) */ case 0x3728: /* Xeon C5500/C3500 (JasperForest) */ case 0x3c28: /* Sandybridge */ @@ -443,6 +444,9 @@ void pci_vtd_quirk(const struct pci_dev /* Xeon E5/E7 v2 */ case 0x0e00: /* host bridge */ case 0x0e01: case 0x0e04 ... 0x0e0b: /* root ports */ +/* Xeon E5 v3 */ +case 0x2f00: /* host bridge */ +case 0x2f01 ... 0x2f0b: /* root ports */ /* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */ case 0x3400 ... 0x3407: /* host bridges */ case 0x3408 ... 0x3411: case 0x3420 ... 0x3421: /* root ports */ VT-d: extend XSA-59 workaround to XeonE5 v3 (Haswell) Note that the datasheet lacks PCI IDs for Dev 1 Fn 0-1, so their IDs are being added based on what https://pci-ids.ucw.cz/read/PC/8086 says. Signed-off-by: Jan Beulich jbeul...@suse.com --- a/xen/drivers/passthrough/vtd/quirks.c +++ b/xen/drivers/passthrough/vtd/quirks.c @@ -431,6 +431,7 @@ void pci_vtd_quirk(const struct pci_dev * - Potential security issue if malicious guest trigger VT-d faults. */ case 0x0e28: /* Xeon-E5v2 (IvyBridge) */ +case 0x2f28: /* Xeon-E5v3 (Haswell) */ case 0x342e: /* Tylersburg chipset (Nehalem / Westmere systems) */ case 0x3728: /* Xeon C5500/C3500 (JasperForest) */ case 0x3c28: /* Sandybridge */ @@ -443,6 +444,9 @@ void pci_vtd_quirk(const struct pci_dev /* Xeon E5/E7 v2 */ case 0x0e00: /* host bridge */ case 0x0e01: case 0x0e04 ... 0x0e0b: /* root ports */ +/* Xeon E5 v3 */ +case 0x2f00: /* host bridge */ +case 0x2f01 ... 0x2f0b: /* root ports */ /* Tylersburg (EP)/Boxboro (MP) chipsets (NHM-EP/EX, WSM-EP/EX) */ case 0x3400 ... 0x3407: /* host bridges */ case 0x3408 ... 0x3411: case 0x3420 ... 0x3421: /* root ports */ ___ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
