Re: [Xen-devel] [PATCH RFC 30/31] x86/domctl: Update PV domain cpumasks when setting cpuid policy

[Jan Beulich]

>>> On 16.12.15 at 22:24,  wrote:

> --- a/xen/arch/x86/domctl.c
> +++ b/xen/arch/x86/domctl.c
> @@ -77,6 +77,74 @@ static void update_domain_cpuid_info(struct domain *d,
>  d->arch.x86_model = (ctl->eax >> 4) & 0xf;
>  if ( d->arch.x86 >= 0x6 )
>  d->arch.x86_model |= (ctl->eax >> 12) & 0xf0;
> +
> +if ( is_pv_domain(d) )
> +{
> +uint64_t mask = cpumask_defaults._1cd;
> +
> +if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
> +mask &= ((uint64_t)ctl->edx << 32) | ctl->ecx;
> +else if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
> +mask &= ((uint64_t)ctl->ecx << 32) | ctl->edx;

I'd prefer switch() to be used in cases like this, but anyway
Reviewed-by: Jan Beulich 
notwithstanding possible mechanical adjustments to the patch due
to changes to earlier ones.

Jan


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[Xen-devel] [PATCH RFC 30/31] x86/domctl: Update PV domain cpumasks when setting cpuid policy

[Andrew Cooper]

This allows PV domains with different featuresets to observe different values
from a native cpuid instruction, on supporting hardware.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 
---
 xen/arch/x86/domctl.c | 68 +++
 1 file changed, 68 insertions(+)

diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index 5eb8f00..967e8e7 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -77,6 +77,74 @@ static void update_domain_cpuid_info(struct domain *d,
 d->arch.x86_model = (ctl->eax >> 4) & 0xf;
 if ( d->arch.x86 >= 0x6 )
 d->arch.x86_model |= (ctl->eax >> 12) & 0xf0;
+
+if ( is_pv_domain(d) )
+{
+uint64_t mask = cpumask_defaults._1cd;
+
+if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+mask &= ((uint64_t)ctl->edx << 32) | ctl->ecx;
+else if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+mask &= ((uint64_t)ctl->ecx << 32) | ctl->edx;
+
+d->arch.pv_domain.masks->_1cd = mask;
+}
+break;
+
+case 6:
+if ( is_pv_domain(d) )
+{
+uint64_t mask = cpumask_defaults._6c;
+
+if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+mask &= ((~0ULL << 32) | ctl->ecx);
+
+d->arch.pv_domain.masks->_6c = mask;
+}
+break;
+
+case 7:
+if ( ctl->input[1] != 0 )
+break;
+
+if ( is_pv_domain(d) )
+{
+uint64_t mask = cpumask_defaults._7ab0;
+
+if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+mask &= ((uint64_t)ctl->eax << 32) | ctl->ebx;
+
+d->arch.pv_domain.masks->_7ab0 = mask;
+}
+break;
+
+case 0xd:
+if ( ctl->input[1] != 1 )
+break;
+
+if ( is_pv_domain(d) )
+{
+uint64_t mask = cpumask_defaults.Da1;
+
+if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+mask &= ((~0ULL << 32) | ctl->eax);
+
+d->arch.pv_domain.masks->Da1 = mask;
+}
+break;
+
+case 0x8001:
+if ( is_pv_domain(d) )
+{
+uint64_t mask = cpumask_defaults.e1cd;
+
+if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
+mask &= ((uint64_t)ctl->edx << 32) | ctl->ecx;
+else if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD )
+mask &= ((uint64_t)ctl->ecx << 32) | ctl->edx;
+
+d->arch.pv_domain.masks->e1cd = mask;
+}
 break;
 }
 }
-- 
2.1.4


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