Re: [Xen-devel] [PATCH v2 08/10] x86/cpuid: Handle leaf 0xb in guest_cpuid()

[Jan Beulich]

>>> On 10.03.17 at 17:44,  wrote:
> @@ -938,6 +927,21 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
>  }
>  break;
>  
> +case 0xb:
> +/*
> + * In principle, this leaf is Intel-only.  In practice, it is tightly
> + * coupled with x2apic, and we offer an x2apic-capable APIC emulation
> + * to guests on AMD hardware as well.
> + *
> + * TODO: Rework topology logic.
> + */
> +if ( p->basic.x2apic )
> +{
> +/* Fix the x2APIC identifier. */
> +res->d = v->vcpu_id * 2;
> +}
> +break;

The SDM says that ECX[7:0] output matches the input. I think you
want to mimic that (not doing so would imo be acceptable only if
you returned all zeros uniformly).

With that taken care of
Reviewed-by: Jan Beulich 

Jan


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[Xen-devel] [PATCH v2 08/10] x86/cpuid: Handle leaf 0xb in guest_cpuid()

[Andrew Cooper]

Leaf 0xb is reserved by AMD, and uniformly hidden from guests by the toolstack
logic and hypervisor PV logic.  The previous dynamic logic filled in the
x2APIC ID for all HVM guests.

In practice, leaf 0xb is tightly linked with x2APIC, and x2APIC is offered to
guests on AMD hardware, as Xen's APIC emulation is x2APIC capable even if
hardware isn't.

Sensibly exposing the rest of the leaf requires further topology
infrastructure.

Signed-off-by: Andrew Cooper 
---
CC: Jan Beulich 

v2:
 * Switch logic to be in terms of the visibility of x2APIC.
---
 xen/arch/x86/cpuid.c | 34 +++---
 1 file changed, 19 insertions(+), 15 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 17769fb..dd8b583 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -171,6 +171,7 @@ static void recalculate_misc(struct cpuid_policy *p)
 p->basic.raw[0x6] = EMPTY_LEAF; /* Therm/Power not exposed to guests. */
 
 p->basic.raw[0x8] = EMPTY_LEAF;
+p->basic.raw[0xb] = EMPTY_LEAF; /* TODO: Rework topology logic. */
 p->basic.raw[0xc] = EMPTY_LEAF;
 
 p->extd.e1d &= ~CPUID_COMMON_1D_FEATURES;
@@ -629,12 +630,7 @@ static void pv_cpuid(uint32_t leaf, uint32_t subleaf, 
struct cpuid_leaf *res)
 
 switch ( leaf )
 {
-case 0x000b: /* Extended Topology Enumeration */
-*res = EMPTY_LEAF;
-break;
-
-case 0x0 ... 0xa:
-case 0xc ... XSTATE_CPUID:
+case 0x0 ... XSTATE_CPUID:
 case 0x8000 ... 0x:
 ASSERT_UNREACHABLE();
 /* Now handled in guest_cpuid(). */
@@ -650,13 +646,7 @@ static void hvm_cpuid(uint32_t leaf, uint32_t subleaf, 
struct cpuid_leaf *res)
 
 switch ( leaf )
 {
-case 0xb:
-/* Fix the x2APIC identifier. */
-res->d = v->vcpu_id * 2;
-break;
-
-case 0x0 ... 0xa:
-case 0xc ... XSTATE_CPUID:
+case 0x0 ... XSTATE_CPUID:
 case 0x8000 ... 0x:
 ASSERT_UNREACHABLE();
 /* Now handled in guest_cpuid(). */
@@ -716,8 +706,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
 
 case 0x0 ... 0x3:
 case 0x5 ... 0x6:
-case 0x8 ... 0xa:
-case 0xc:
+case 0x8 ... 0xc:
 *res = p->basic.raw[leaf];
 break;
 }
@@ -938,6 +927,21 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
 }
 break;
 
+case 0xb:
+/*
+ * In principle, this leaf is Intel-only.  In practice, it is tightly
+ * coupled with x2apic, and we offer an x2apic-capable APIC emulation
+ * to guests on AMD hardware as well.
+ *
+ * TODO: Rework topology logic.
+ */
+if ( p->basic.x2apic )
+{
+/* Fix the x2APIC identifier. */
+res->d = v->vcpu_id * 2;
+}
+break;
+
 case XSTATE_CPUID:
 switch ( subleaf )
 {
-- 
2.1.4


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