updating collision chain length in VHPT is not necessary.
Signed-off-by: Kouya Shimura [EMAIL PROTECTED]
diff -r f97a0b6152c3 xen/arch/ia64/vmx/vmx_ivt.S
--- a/xen/arch/ia64/vmx/vmx_ivt.S Tue Feb 26 10:12:04 2008 -0700
+++ b/xen/arch/ia64/vmx/vmx_ivt.S Wed Feb 27 15:06:20 2008 +0900
@@ -181,25 +181,22 @@ vmx_itlb_loop:
// Swap the first entry with the entry found in the collision chain
// to speed up next hardware search (and keep LRU).
// In comments 1 stands for the first entry and 2 for the found entry.
+ld8 r29 = [r28] // Read tag of 1
+dep r22 = -1,r24,63,1// set ti=1 of 2 (to disable it during the swap)
+;;
ld8 r25 = [r17] // Read value of 2
ld8 r27 = [r18] // Read value of 1
-ld8 r29 = [r28] // Read tag of 1
-dep r22 = -1,r24,63,1// set ti=1 of 2 (to disable it during the swap)
-;;
st8 [r16] = r29, VLE_ITIR_OFFSET - VLE_TITAG_OFFSET // Write tag of 2
st8 [r28] = r22, VLE_ITIR_OFFSET - VLE_TITAG_OFFSET // Write tag of 1
-extr.u r19 = r27, 56, 4 // Extract collision chain length
mf
;;
ld8 r29 = [r16] // read itir of 2
ld8 r22 = [r28] // read itir of 1
-dep r27 = r0, r27, 56, 4 // Clear collision chain length for 2
-dep r25 = r19, r25, 56, 4 // Write collision chain length for 1
+st8 [r18] = r25 // Write value of 1
+st8 [r17] = r27 // Write value of 2
;;
st8 [r16] = r22 // Write itir of 2
st8 [r28] = r29, VLE_TITAG_OFFSET - VLE_ITIR_OFFSET // write itir of 1
-st8 [r18] = r25 // Write value of 1
-st8 [r17] = r27 // Write value of 2
;;
st8.rel [r28] = r24 // Write tag of 1 (with ti=0)
// Insert the translation entry
@@ -264,25 +261,22 @@ vmx_dtlb_loop:
(p7)mov r17 = r23;
(p7)br.sptk vmx_dtlb_loop
;;
+ld8 r29 = [r28]
+dep r22 = -1,r24,63,1//set ti=1
+;;
ld8 r25 = [r17]
ld8 r27 = [r18]
-ld8 r29 = [r28]
-dep r22 = -1,r24,63,1//set ti=1
-;;
st8 [r16] = r29, VLE_ITIR_OFFSET - VLE_TITAG_OFFSET
st8 [r28] = r22, VLE_ITIR_OFFSET - VLE_TITAG_OFFSET
-extr.u r19 = r27, 56, 4
mf
;;
ld8 r29 = [r16]
ld8 r22 = [r28]
-dep r27 = r0, r27, 56, 4
-dep r25 = r19, r25, 56, 4
+st8 [r18] = r25
+st8 [r17] = r27
;;
st8 [r16] = r22
st8 [r28] = r29, VLE_TITAG_OFFSET - VLE_ITIR_OFFSET
-st8 [r18] = r25
-st8 [r17] = r27
;;
st8.rel [r28] = r24
itc.d r25
diff -r f97a0b6152c3 xen/arch/ia64/vmx/vtlb.c
--- a/xen/arch/ia64/vmx/vtlb.c Tue Feb 26 10:12:04 2008 -0700
+++ b/xen/arch/ia64/vmx/vtlb.c Wed Feb 27 15:58:40 2008 +0900
@@ -112,25 +112,19 @@ static thash_data_t *__vtr_lookup(VCPU *
return NULL;
}
-static void thash_recycle_cch(thash_cb_t *hcb, thash_data_t *hash)
-{
-thash_data_t *p, *q;
-int i = 0;
-
-p = hash;
-for (i = 0; i MAX_CCN_DEPTH; i++) {
-p = p-next;
-}
-q = hash-next;
-hash-len = 0;
+static void thash_recycle_cch(thash_cb_t *hcb, thash_data_t *hash,
+ thash_data_t *tail)
+{
+thash_data_t *head = hash-next;
+
hash-next = 0;
-p-next = hcb-cch_freelist;
-hcb-cch_freelist = q;
+tail-next = hcb-cch_freelist;
+hcb-cch_freelist = head;
}
static void vmx_vhpt_insert(thash_cb_t *hcb, u64 pte, u64 itir, u64 ifa)
{
-u64 tag;
+u64 tag, len;
ia64_rr rr;
thash_data_t *head, *cch;
@@ -139,39 +133,35 @@ static void vmx_vhpt_insert(thash_cb_t *
head = (thash_data_t *)ia64_thash(ifa);
tag = ia64_ttag(ifa);
-/* Find a free (ie invalid) entry. */
-cch = head;
-while (cch) {
-if (INVALID_VHPT(cch))
-break;
-cch = cch-next;
-}
-if (cch) {
+if (!INVALID_VHPT(head)) {
+/* Find a free (ie invalid) entry. */
+len = 0;
+cch = head;
+do {
+++len;
+if (cch-next == NULL) {
+if (len = MAX_CCN_DEPTH) {
+thash_recycle_cch(hcb, head, cch);
+cch = cch_alloc(hcb);
+} else {
+cch = __alloc_chain(hcb);
+}
+cch-next = head-next;
+head-next = cch;
+break;
+}
+cch = cch-next;
+} while (!INVALID_VHPT(cch));
+
/* As we insert in head, copy head. */
-if (cch != head) {
-local_irq_disable();
-cch-page_flags = head-page_flags;
-cch-itir = head-itir;
-cch-etag = head-etag;
-head-ti = 1;
-local_irq_enable();
-}
-} else {
-if (head-len = MAX_CCN_DEPTH) {
-thash_recycle_cch(hcb, head);
-cch = cch_alloc(hcb);
-} else {
-cch = __alloc_chain(hcb);
-}
local_irq_disable();
-*cch = *head;
+cch-page_flags = head-page_flags;
+cch-itir = head-itir;
+
