Re: [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos
yi li wrote: > Hi Philippe, > > Attached patch adds other two fixes to make adeos work on BF548. The > patch is based on previous adeos-bf54x.patch. Please have a look. > Merged, thanks. -- Philippe. ___ Xenomai-core mailing list Xenomai-core@gna.org https://mail.gna.org/listinfo/xenomai-core
Re: [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos
Hi Philippe, Attached patch adds other two fixes to make adeos work on BF548. The patch is based on previous adeos-bf54x.patch. Please have a look. Regards, -Yi On Thu, May 22, 2008 at 5:02 PM, Philippe Gerum <[EMAIL PROTECTED]> wrote: > > Merged, thanks. > diff -uprN -x .svn linux-kernel/arch/blackfin/mach-common/ints-priority.c linux-kernel.2/arch/blackfin/mach-common/ints-priority.c --- linux-kernel/arch/blackfin/mach-common/ints-priority.c 2008-05-28 14:44:56.0 +0800 +++ linux-kernel.2/arch/blackfin/mach-common/ints-priority.c 2008-05-28 15:14:51.0 +0800 @@ -1024,46 +1024,96 @@ int __init init_arch_irq(void) # endif #elif defined(CONFIG_BF54x) case IRQ_PINT0: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; case IRQ_PINT1: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; case IRQ_PINT2: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; case IRQ_PINT3: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; #elif defined(CONFIG_BF52x) case IRQ_PORTF_INTA: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; case IRQ_PORTG_INTA: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; case IRQ_PORTH_INTA: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; #elif defined(CONFIG_BF561) case IRQ_PROG0_INTA: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; case IRQ_PROG1_INTA: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; case IRQ_PROG2_INTA: +#ifdef CONFIG_IPIPE +__set_irq_demux_handler(irq, bfin_demux_gpio_irq, + 1, "GPIO demux"); +#else /* !CONFIG_IPIPE */ set_irq_chained_handler(irq, bfin_demux_gpio_irq); +#endif break; #endif default: diff -uprN -x .svn linux-kernel/include/asm-blackfin/ipipe.h linux-kernel.2/include/asm-blackfin/ipipe.h --- linux-kernel/include/asm-blackfin/ipipe.h 2008-05-28 14:44:56.0 +0800 +++ linux-kernel.2/include/asm-blackfin/ipipe.h 2008-05-28 15:14:51.0 +0800 @@ -260,6 +260,7 @@ int ipipe_start_irq_thread(unsigned irq, #define bfin_write_TIMER_DISABLE(val) bfin_write_TIMER_DISABLE0(val) #define bfin_write_TIMER_ENABLE(val) bfin_write_TIMER_ENABLE0(val) #define bfin_write_TIMER_STATUS(val) bfin_write_TIMER_STATUS0(val) +#define bfin_read_TIMER_STATUS(val) bfin_read_TIMER_STATUS0(val) #endif #else /* !CONFIG_IPIPE */ ___ Xenomai-core mailing list Xenomai-core@gna.org https://mail.gna.org/listinfo/xenomai-core
Re: [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos
yi li wrote: > Hi, > > Attached two patches to make xenomai/adeos work with ADI's blackfin > process BF52x and BF54x. > > The patches are based on xenomai-2.4.0. It has been tested on > BF527-EZkit, BF548-Ezkit and BF561-Ezkit, using blackfin uClinux 2008R1 > branch. > Merged, thanks. > Adeos patch in xenomai-2.4.0 cannot work with blackfin uClinux 2008R1 > branch/release. Please use a modified patch at > uclinux-dist/bfin_patch/adeos_patch. > > Regards, > -Li Yi > > > > > > > ___ > Xenomai-core mailing list > Xenomai-core@gna.org > https://mail.gna.org/listinfo/xenomai-core -- Philippe. ___ Xenomai-core mailing list Xenomai-core@gna.org https://mail.gna.org/listinfo/xenomai-core
[Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos
Hi, Attached two patches to make xenomai/adeos work with ADI's blackfin process BF52x and BF54x. The patches are based on xenomai-2.4.0. It has been tested on BF527-EZkit, BF548-Ezkit and BF561-Ezkit, using blackfin uClinux 2008R1 branch. Adeos patch in xenomai-2.4.0 cannot work with blackfin uClinux 2008R1 branch/release. Please use a modified patch at uclinux-dist/bfin_patch/adeos_patch. Regards, -Li Yi diff -uprN -x .svn linux-kernel/arch/blackfin/kernel/time.c linux-kernel.adeos.new/arch/blackfin/kernel/time.c --- linux-kernel/arch/blackfin/kernel/time.c 2008-05-08 15:36:46.0 +0800 +++ linux-kernel.adeos.new/arch/blackfin/kernel/time.c 2008-05-08 13:58:42.0 +0800 @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -64,6 +65,10 @@ time_sched_init(irqreturn_t(*timer_routi /* We use TIMER0 in PWM_OUT, periodic mode. */ bfin_write_TIMER_DISABLE(1);/* Disable TIMER0 for now. */ __builtin_bfin_ssync(); + bfin_write_TIMER_STATUS(0x1000); /* stop timer immediately */ + __builtin_bfin_ssync(); + while (bfin_read_TIMER_STATUS() & 0x1000) /* check TRUN0, timer stoped? */ + mdelay(10); bfin_write_TIMER0_CONFIG(0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */ __builtin_bfin_ssync(); bfin_write_TIMER0_PERIOD(get_sclk() / HZ); @@ -72,6 +77,7 @@ time_sched_init(irqreturn_t(*timer_routi __builtin_bfin_ssync(); bfin_write_TIMER_ENABLE(1); /* Enable TIMER0. */ __builtin_bfin_ssync(); + #else /* !CONFIG_IPIPE */ u32 tcount; diff -uprN -x .svn linux-kernel/arch/blackfin/mach-bf527/Kconfig linux-kernel.adeos.new/arch/blackfin/mach-bf527/Kconfig --- linux-kernel/arch/blackfin/mach-bf527/Kconfig 2008-05-08 11:51:03.0 +0800 +++ linux-kernel.adeos.new/arch/blackfin/mach-bf527/Kconfig 2008-05-08 15:52:29.0 +0800 @@ -170,7 +170,7 @@ config IRQ_PORTH_INTB default 11 config IRQ_TMR0 int "IRQ_TMR0" - default 12 + default 8 config IRQ_TMR1 int "IRQ_TMR1" default 12 diff -uprN -x .svn linux-kernel/arch/blackfin/mach-bf548/Kconfig linux-kernel.adeos.new/arch/blackfin/mach-bf548/Kconfig --- linux-kernel/arch/blackfin/mach-bf548/Kconfig 2008-05-08 11:51:03.0 +0800 +++ linux-kernel.adeos.new/arch/blackfin/mach-bf548/Kconfig 2008-04-30 12:06:51.0 +0800 @@ -250,7 +250,7 @@ config IRQ_OTPSEC default 11 config IRQ_TIMER0 int "IRQ_TIMER0" - default 11 + default 8 config IRQ_TIMER1 int "IRQ_TIMER1" default 11 diff -uprN -x .svn linux-kernel/arch/blackfin/mach-common/ints-priority.c linux-kernel.adeos.new/arch/blackfin/mach-common/ints-priority.c --- linux-kernel/arch/blackfin/mach-common/ints-priority.c 2008-05-08 15:36:47.0 +0800 +++ linux-kernel.adeos.new/arch/blackfin/mach-common/ints-priority.c 2008-05-07 10:21:57.0 +0800 @@ -1222,6 +1222,7 @@ int __ipipe_get_irq_priority(unsigned ir int __ipipe_get_irqthread_priority(unsigned irq) { int ient, prio; + int demux_irq; /* The returned priority value is rescaled to [0..IVG13+1] * with 0 being the lowest effective priority level. */ @@ -1229,17 +1230,37 @@ int __ipipe_get_irqthread_priority(unsig if (irq <= IRQ_CORETMR) return IVG13 - irq + 1; - if (irq == IRQ_PROG_INTA) - /* The GPIO demux interrupt is given a lower priority - * than the GPIO IRQs, so that its threaded handler - * unmasks the interrupt line after the decoded IRQs - * have been processed. */ - return IVG13 - PRIO_GPIODEMUX(irq); - - if (irq >= IRQ_PF0) - /* GPIO IRQs are given the priority of the demux - * interrupt. */ - return IVG13 - PRIO_GPIODEMUX(irq) + 1; + /* GPIO IRQs are given the priority of the demux + * interrupt. */ + if (IS_GPIOIRQ(irq)) { +#if defined(CONFIG_BF54x) + u32 bank = PINT_2_BANK(irq2pint_lut[irq - SYS_IRQS]); + demux_irq = (bank == 0 ? IRQ_PINT0 : +bank == 1 ? IRQ_PINT1 : +bank == 2 ? IRQ_PINT2 : +IRQ_PINT3); +#elif defined(CONFIG_BF561) + demux_irq = (irq >= IRQ_PF32 ? IRQ_PROG2_INTA : +irq >= IRQ_PF16 ? IRQ_PROG1_INTA : +IRQ_PROG0_INTA); +#elif defined(CONFIG_BF52x) + demux_irq = (irq >= IRQ_PH0 ? IRQ_PORTH_INTA : +irq >= IRQ_PG0 ? IRQ_PORTG_INTA : +IRQ_PORTF_INTA); +#else + demux_irq = irq; +#endif + return IVG13 - PRIO_GPIODEMUX(demux_irq) + 1; + } + + /* The GPIO demux interrupt is given a lower priority + * than the GPIO IRQs, so that its threaded handler + * unmasks the interrupt line after the decoded IRQs + * have been processed. */ + prio = PRIO_GPIODEMUX(irq); + /* demux irq? */ + if (prio != -1) + return IVG13 - prio; for (ient = 0; ient < NR_PERI_INTS; ient++) { struct ivgx *ivg = ivg_table + ient; @@ -1265,7 +1286,6 @@ asmlinkage int __ipipe_grab_irq(int vec, { struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop; struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst; - unsigned long sic_status; int irq; if (likely(vec == EVT_IVTMR_P)) { @@ -1274,16 +1294,37 @@ asmlinkage int __ipipe_grab_irq(int vec, } __builtin_bfin_ssync(); - sic