subject:"\[Xenomai\-git\] Philippe Gerum \: cobalt\/arm\: upgrade I\-pipe support"

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-09-29 Thread git repository hosting

Module: xenomai-3
Branch: wip/drivers
Commit: 2eae1185f359e6da8746333077d38e194352d805
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=2eae1185f359e6da8746333077d38e194352d805

Author: Philippe Gerum 
Date:   Fri Sep  9 18:55:43 2016 +0200

cobalt/arm: upgrade I-pipe support

---

 ...arm-9.patch => ipipe-core-3.18.20-arm-11.patch} |  342 +-
 ...8-arm-4.patch => ipipe-core-4.1.18-arm-8.patch} |  487 +++-
 2 files changed, 704 insertions(+), 125 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-9.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-11.patch
similarity index 98%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-9.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-11.patch
index d594401..efe7c8f 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-9.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-11.patch
@@ -1,5 +1,5 @@
 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 89c4b5c..46ec8f8 100644
+index 89c4b5c..6b13805 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -33,8 +33,8 @@ config ARM
@@ -80,6 +80,14 @@ index 89c4b5c..46ec8f8 100644
  source kernel/Kconfig.preempt
  
  config HZ_FIXED
+@@ -1741,6 +1760,7 @@ config ALIGNMENT_TRAP
+ config UACCESS_WITH_MEMCPY
+   bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
+   depends on MMU
++  depends on !IPIPE
+   default y if CPU_FEROCEON
+   help
+ Implement faster copy_to_user and clear_user methods for CPU
 diff --git a/arch/arm/boot/compressed/decompress.c 
b/arch/arm/boot/compressed/decompress.c
 index bd245d3..65f2238 100644
 --- a/arch/arm/boot/compressed/decompress.c
@@ -1653,7 +1661,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..d1c125d
+index 000..5ec5eff
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1701,7 +1709,7 @@ index 000..d1c125d
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE9
++#define IPIPE_CORE_RELEASE11
 +
 +struct ipipe_domain;
 +
@@ -4301,10 +4309,10 @@ index 000..8024a79
 +EXPORT_SYMBOL_GPL(cpu_architecture);
 diff --git a/arch/arm/kernel/ipipe_tsc.c b/arch/arm/kernel/ipipe_tsc.c
 new file mode 100644
-index 000..414ada5
+index 000..6bcabb3
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe_tsc.c
-@@ -0,0 +1,203 @@
+@@ -0,0 +1,207 @@
 +#include 
 +#include 
 +#include 
@@ -4378,6 +4386,10 @@ index 000..414ada5
 +  tsc_addr = &__ipipe_tsc_addr;
 +#endif
 +  registered = ipipe_tsc_value != NULL;
++
++  if (registered && info->freq < tsc_info.freq)
++  return;
++
 +  ipipe_tsc_value = (struct ipipe_tsc_value_t *)tsc_area;
 +  vector_tsc_value = (struct ipipe_tsc_value_t *)__ipipe_tsc_area;
 +
@@ -7090,7 +7102,7 @@ index 5211f62..c0a8610 100644
platform_device_register_simple("imx31-audmux", 0, imx25_audmux_res,
ARRAY_SIZE(imx25_audmux_res));
 diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
-index 7d82a5a..9bbd0f4 100644
+index 7d82a5a5..9bbd0f4 100644
 --- a/arch/arm/mach-imx/mm-imx27.c
 +++ b/arch/arm/mach-imx/mm-imx27.c
 @@ -81,6 +81,10 @@ static const struct resource imx27_audmux_res[] __initconst 
= {
@@ -12308,6 +12320,85 @@ index 9f06825..1087ed1 100644
irq_find_mapping(d->irq_domain,
 d->chip.base + bit));
}
+diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
+index a93ddbc..7c74176 100644
+--- a/drivers/gpio/gpio-mvebu.c
 b/drivers/gpio/gpio-mvebu.c
+@@ -295,10 +295,11 @@ static void mvebu_gpio_irq_ack(struct irq_data *d)
+   struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+   struct mvebu_gpio_chip *mvchip = gc->private;
+   u32 mask = ~(1 << (d->irq - gc->irq_base));
++  unsigned long flags;
+ 
+-  irq_gc_lock(gc);
++  flags = irq_gc_lock(gc);
+   writel_relaxed(mask, mvebu_gpioreg_edge_cause(mvchip));
+-  irq_gc_unlock(gc);
++  irq_gc_unlock(gc, flags);
+ }
+ 
+ static void mvebu_gpio_edge_irq_mask(struct irq_data *d)
+@@ -307,12 +308,13 @@ static void mvebu_gpio_edge_irq_mask(struct irq_data *d)
+   struct mvebu_gpio_chip *mvchip = gc->private;
+   struct irq_chip_type *ct = irq_data_get_chip_type(d);
+   u32 mask = 1 << (d->irq - gc->irq_base);
++  unsigned long flags;
+ 
+-  irq_gc_lock(gc);
++  flags = irq_gc_lock(gc);
+   ct->mask_cache_priv &= ~mask;
+ 
+   writel_relaxed(ct->mask_cache_priv, mvebu_gpioreg_edge_mask(mvchip));
+-  irq_gc_unlock(gc);
++  irq_gc_unlock(gc, flags);
+ }
+ 
+ static void

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-09-11 Thread git repository hosting

Module: xenomai-3
Branch: stable-3.0.x
Commit: 2eae1185f359e6da8746333077d38e194352d805
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=2eae1185f359e6da8746333077d38e194352d805

Author: Philippe Gerum 
Date:   Fri Sep  9 18:55:43 2016 +0200

cobalt/arm: upgrade I-pipe support

---

 ...arm-9.patch => ipipe-core-3.18.20-arm-11.patch} |  342 +-
 ...8-arm-4.patch => ipipe-core-4.1.18-arm-8.patch} |  487 +++-
 2 files changed, 704 insertions(+), 125 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-9.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-11.patch
similarity index 98%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-9.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-11.patch
index d594401..efe7c8f 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-9.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-11.patch
@@ -1,5 +1,5 @@
 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
-index 89c4b5c..46ec8f8 100644
+index 89c4b5c..6b13805 100644
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
 @@ -33,8 +33,8 @@ config ARM
@@ -80,6 +80,14 @@ index 89c4b5c..46ec8f8 100644
  source kernel/Kconfig.preempt
  
  config HZ_FIXED
+@@ -1741,6 +1760,7 @@ config ALIGNMENT_TRAP
+ config UACCESS_WITH_MEMCPY
+   bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
+   depends on MMU
++  depends on !IPIPE
+   default y if CPU_FEROCEON
+   help
+ Implement faster copy_to_user and clear_user methods for CPU
 diff --git a/arch/arm/boot/compressed/decompress.c 
b/arch/arm/boot/compressed/decompress.c
 index bd245d3..65f2238 100644
 --- a/arch/arm/boot/compressed/decompress.c
@@ -1653,7 +1661,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..d1c125d
+index 000..5ec5eff
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1701,7 +1709,7 @@ index 000..d1c125d
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE9
++#define IPIPE_CORE_RELEASE11
 +
 +struct ipipe_domain;
 +
@@ -4301,10 +4309,10 @@ index 000..8024a79
 +EXPORT_SYMBOL_GPL(cpu_architecture);
 diff --git a/arch/arm/kernel/ipipe_tsc.c b/arch/arm/kernel/ipipe_tsc.c
 new file mode 100644
-index 000..414ada5
+index 000..6bcabb3
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe_tsc.c
-@@ -0,0 +1,203 @@
+@@ -0,0 +1,207 @@
 +#include 
 +#include 
 +#include 
@@ -4378,6 +4386,10 @@ index 000..414ada5
 +  tsc_addr = &__ipipe_tsc_addr;
 +#endif
 +  registered = ipipe_tsc_value != NULL;
++
++  if (registered && info->freq < tsc_info.freq)
++  return;
++
 +  ipipe_tsc_value = (struct ipipe_tsc_value_t *)tsc_area;
 +  vector_tsc_value = (struct ipipe_tsc_value_t *)__ipipe_tsc_area;
 +
@@ -7090,7 +7102,7 @@ index 5211f62..c0a8610 100644
platform_device_register_simple("imx31-audmux", 0, imx25_audmux_res,
ARRAY_SIZE(imx25_audmux_res));
 diff --git a/arch/arm/mach-imx/mm-imx27.c b/arch/arm/mach-imx/mm-imx27.c
-index 7d82a5a..9bbd0f4 100644
+index 7d82a5a5..9bbd0f4 100644
 --- a/arch/arm/mach-imx/mm-imx27.c
 +++ b/arch/arm/mach-imx/mm-imx27.c
 @@ -81,6 +81,10 @@ static const struct resource imx27_audmux_res[] __initconst 
= {
@@ -12308,6 +12320,85 @@ index 9f06825..1087ed1 100644
irq_find_mapping(d->irq_domain,
 d->chip.base + bit));
}
+diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
+index a93ddbc..7c74176 100644
+--- a/drivers/gpio/gpio-mvebu.c
 b/drivers/gpio/gpio-mvebu.c
+@@ -295,10 +295,11 @@ static void mvebu_gpio_irq_ack(struct irq_data *d)
+   struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+   struct mvebu_gpio_chip *mvchip = gc->private;
+   u32 mask = ~(1 << (d->irq - gc->irq_base));
++  unsigned long flags;
+ 
+-  irq_gc_lock(gc);
++  flags = irq_gc_lock(gc);
+   writel_relaxed(mask, mvebu_gpioreg_edge_cause(mvchip));
+-  irq_gc_unlock(gc);
++  irq_gc_unlock(gc, flags);
+ }
+ 
+ static void mvebu_gpio_edge_irq_mask(struct irq_data *d)
+@@ -307,12 +308,13 @@ static void mvebu_gpio_edge_irq_mask(struct irq_data *d)
+   struct mvebu_gpio_chip *mvchip = gc->private;
+   struct irq_chip_type *ct = irq_data_get_chip_type(d);
+   u32 mask = 1 << (d->irq - gc->irq_base);
++  unsigned long flags;
+ 
+-  irq_gc_lock(gc);
++  flags = irq_gc_lock(gc);
+   ct->mask_cache_priv &= ~mask;
+ 
+   writel_relaxed(ct->mask_cache_priv, mvebu_gpioreg_edge_mask(mvchip));
+-  irq_gc_unlock(gc);
++  irq_gc_unlock(gc, flags);
+ }
+ 
+ static void

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-07-09 Thread git repository hosting

Module: xenomai-2.6
Branch: refs/tags/v3.0.2
Commit: 5c286f8393ce69db2e3d7ff6d7673f0b65202734
URL:
http://git.xenomai.org/?p=xenomai-2.6.git;a=commit;h=5c286f8393ce69db2e3d7ff6d7673f0b65202734

Author: Philippe Gerum 
Date:   Mon Mar 28 16:10:55 2016 +0200

cobalt/arm: upgrade I-pipe support

---

 ...8-arm-3.patch => ipipe-core-4.1.18-arm-4.patch} |   69 +++-
 1 file changed, 53 insertions(+), 16 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
index 01d0fce..f8e3c73 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
@@ -1635,7 +1635,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..eccfbcb
+index 000..df05570
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,297 @@
@@ -1685,7 +1685,7 @@ index 000..eccfbcb
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE3
++#define IPIPE_CORE_RELEASE4
 +
 +struct ipipe_domain;
 +struct timekeeper;
@@ -6301,7 +6301,7 @@ index 0f04e30..ab12460 100644
  int mx21_clocks_init(unsigned long lref, unsigned long fref);
  int mx27_clocks_init(unsigned long fref);
 diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
-index 78b6fd0..711177f 100644
+index 78b6fd0..e8dc2f5 100644
 --- a/arch/arm/mach-imx/gpc.c
 +++ b/arch/arm/mach-imx/gpc.c
 @@ -14,6 +14,7 @@
@@ -6391,30 +6391,29 @@ index 78b6fd0..711177f 100644
  }
  
  void imx_gpc_hwirq_unmask(unsigned int hwirq)
-@@ -159,16 +180,50 @@ void imx_gpc_hwirq_mask(unsigned int hwirq)
+@@ -159,16 +180,49 @@ void imx_gpc_hwirq_mask(unsigned int hwirq)
  
  static void imx_gpc_irq_unmask(struct irq_data *d)
  {
 +  unsigned long flags;
 +
-+  raw_spin_lock_irqsave_cond(_lock, flags);
++  raw_spin_lock_irqsave(_lock, flags);
imx_gpc_hwirq_unmask(d->hwirq);
-+  raw_spin_unlock(_lock);
++  __ipipe_spin_unlock_irqbegin(_lock);
irq_chip_unmask_parent(d);
-+  /* Parent IC will handle virtual unlocking */
-+  hard_cond_local_irq_restore(flags);
++  __ipipe_spin_unlock_irqcomplete(flags);
  }
  
  static void imx_gpc_irq_mask(struct irq_data *d)
  {
 +  unsigned long flags;
 +
-+  raw_spin_lock_irqsave_cond(_lock, flags);
++  raw_spin_lock_irqsave(_lock, flags);
 +  /* Parent IC will handle virtual locking */
imx_gpc_hwirq_mask(d->hwirq);
-+  raw_spin_unlock(_lock);
++  __ipipe_spin_unlock_irqbegin(_lock);
irq_chip_mask_parent(d);
-+  hard_cond_local_irq_restore(flags);
++  __ipipe_spin_unlock_irqcomplete(flags);
  }
  
 +#ifdef CONFIG_IPIPE
@@ -6442,7 +6441,7 @@ index 78b6fd0..711177f 100644
  static struct irq_chip imx_gpc_chip = {
.name   = "GPC",
.irq_eoi= irq_chip_eoi_parent,
-@@ -179,6 +234,10 @@ static struct irq_chip imx_gpc_chip = {
+@@ -179,6 +233,10 @@ static struct irq_chip imx_gpc_chip = {
  #ifdef CONFIG_SMP
.irq_set_affinity   = irq_chip_set_affinity_parent,
  #endif
@@ -8993,15 +8992,30 @@ index 9769f1e..c3a4a6f 100644
set_cr(cr_no_alignment);
}
 diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
-index e309c8f..ec1f240 100644
+index e309c8f..7053f1b 100644
 --- a/arch/arm/mm/cache-l2x0.c
 +++ b/arch/arm/mm/cache-l2x0.c
-@@ -47,9 +47,15 @@ struct l2c_init_data {
+@@ -23,6 +23,7 @@
+ #include 
+ #include 
+ #include 
++#include 
+ #include 
+ #include 
+ 
+@@ -47,9 +48,22 @@ struct l2c_init_data {
  
  #define CACHE_LINE_SIZE   32
  
 +#ifdef CONFIG_IPIPE
 +#define CACHE_RANGE_ATOMIC_MAX512UL
++static int l2x0_wa = -1;
++static int __init l2x0_setup_wa(char *str)
++{
++  l2x0_wa = !!simple_strtol(str, NULL, 0);
++  return 0;
++}
++early_param("l2x0_write_allocate", l2x0_setup_wa);
 +#else
 +#define CACHE_RANGE_ATOMIC_MAX4096UL
 +#endif
@@ -9013,7 +9027,7 @@ index e309c8f..ec1f240 100644
  static u32 l2x0_way_mask; /* Bitmask of active ways */
  static u32 l2x0_size;
  static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
-@@ -292,10 +298,10 @@ static void l2c220_op_way(void __iomem *base, unsigned 
reg)
+@@ -292,10 +306,10 @@ static void l2c220_op_way(void __iomem *base, unsigned 
reg)
  static unsigned long l2c220_op_pa_range(void __iomem *reg, unsigned long 
start,
unsigned long end, unsigned long flags)
  {
@@ -9026,7 +9040,7 @@ index e309c8f..ec1f240 100644
  
while (start < blk_end) {
l2c_wait_mask(reg, 1);
-@@

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-07-09 Thread git repository hosting

Module: xenomai-2.6
Branch: refs/tags/v3.0-rc7
Commit: 1f34e06120ccde12cd28a447289f2b5d859979bc
URL:
http://git.xenomai.org/?p=xenomai-2.6.git;a=commit;h=1f34e06120ccde12cd28a447289f2b5d859979bc

Author: Philippe Gerum 
Date:   Fri Mar 20 09:25:13 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 14.44-arm-11.patch => ipipe-core-3.14.44-arm-12.patch} |8 
 ...-3.18.12-arm-3.patch => ipipe-core-3.18.12-arm-4.patch} |   12 ++--
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
index eab2937..c44d632 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
@@ -1590,7 +1590,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..5ec5eff
+index 000..50e20e3
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1638,7 +1638,7 @@ index 000..5ec5eff
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE11
++#define IPIPE_CORE_RELEASE12
 +
 +struct ipipe_domain;
 +
@@ -2863,7 +2863,7 @@ index 000..6579eec
 +
 +#endif
 diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index 8d6a089..d78ed9a 100644
+index 8d6a089..60c89d6 100644
 --- a/arch/arm/include/asm/setup.h
 +++ b/arch/arm/include/asm/setup.h
 @@ -53,4 +53,10 @@ extern int arm_add_memory(u64 start, u64 size);
@@ -2871,7 +2871,7 @@ index 8d6a089..d78ed9a 100644
  extern void dump_machine_table(void);
  
 +#ifdef CONFIG_IPIPE
-+void __init smp_build_cpu_revmap(void);
++void smp_build_cpu_revmap(void);
 +#else
 +static inline void smp_build_cpu_revmap(void) { }
 +#endif
diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
index ea9675d..e6360b7 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
@@ -1651,7 +1651,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..4701f8d
+index 000..3c73753
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1699,7 @@ index 000..4701f8d
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE3
++#define IPIPE_CORE_RELEASE4
 +
 +struct ipipe_domain;
 +
@@ -2923,7 +2923,7 @@ index 000..6579eec
 +
 +#endif
 diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index e0adb9f..f024d86 100644
+index e0adb9f..5876f4b 100644
 --- a/arch/arm/include/asm/setup.h
 +++ b/arch/arm/include/asm/setup.h
 @@ -25,4 +25,10 @@ extern int arm_add_memory(u64 start, u64 size);
@@ -2931,7 +2931,7 @@ index e0adb9f..f024d86 100644
  extern void dump_machine_table(void);
  
 +#ifdef CONFIG_IPIPE
-+void __init smp_build_cpu_revmap(void);
++void smp_build_cpu_revmap(void);
 +#else
 +static inline void smp_build_cpu_revmap(void) { }
 +#endif
@@ -17772,7 +17772,7 @@ index 000..797a849
 +}
 diff --git a/kernel/ipipe/core.c b/kernel/ipipe/core.c
 new file mode 100644
-index 000..b8eb85c
+index 000..fba38fa
 --- /dev/null
 +++ b/kernel/ipipe/core.c
 @@ -0,0 +1,1890 @@
@@ -19030,7 +19030,7 @@ index 000..b8eb85c
 +   *   handling interrupts:
 +   *
 +   *   a) the root domain is alone, no registered head domain
-+   *  => all interrupts are delivered via the fast dispatcher.
++   *  => all interrupts go through the interrupt log
 +   *   b) a head domain is registered
 +   *  => head domain IRQs go through the fast dispatcher
 +   *  => root domain IRQs go through the interrupt log


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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-04-03 Thread git repository hosting

Module: xenomai-3
Branch: refs/tags/v3.0.2
Commit: 5c286f8393ce69db2e3d7ff6d7673f0b65202734
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=5c286f8393ce69db2e3d7ff6d7673f0b65202734

Author: Philippe Gerum 
Date:   Mon Mar 28 16:10:55 2016 +0200

cobalt/arm: upgrade I-pipe support

---

 ...8-arm-3.patch => ipipe-core-4.1.18-arm-4.patch} |   69 +++-
 1 file changed, 53 insertions(+), 16 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
index 01d0fce..f8e3c73 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
@@ -1635,7 +1635,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..eccfbcb
+index 000..df05570
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,297 @@
@@ -1685,7 +1685,7 @@ index 000..eccfbcb
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE3
++#define IPIPE_CORE_RELEASE4
 +
 +struct ipipe_domain;
 +struct timekeeper;
@@ -6301,7 +6301,7 @@ index 0f04e30..ab12460 100644
  int mx21_clocks_init(unsigned long lref, unsigned long fref);
  int mx27_clocks_init(unsigned long fref);
 diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
-index 78b6fd0..711177f 100644
+index 78b6fd0..e8dc2f5 100644
 --- a/arch/arm/mach-imx/gpc.c
 +++ b/arch/arm/mach-imx/gpc.c
 @@ -14,6 +14,7 @@
@@ -6391,30 +6391,29 @@ index 78b6fd0..711177f 100644
  }
  
  void imx_gpc_hwirq_unmask(unsigned int hwirq)
-@@ -159,16 +180,50 @@ void imx_gpc_hwirq_mask(unsigned int hwirq)
+@@ -159,16 +180,49 @@ void imx_gpc_hwirq_mask(unsigned int hwirq)
  
  static void imx_gpc_irq_unmask(struct irq_data *d)
  {
 +  unsigned long flags;
 +
-+  raw_spin_lock_irqsave_cond(_lock, flags);
++  raw_spin_lock_irqsave(_lock, flags);
imx_gpc_hwirq_unmask(d->hwirq);
-+  raw_spin_unlock(_lock);
++  __ipipe_spin_unlock_irqbegin(_lock);
irq_chip_unmask_parent(d);
-+  /* Parent IC will handle virtual unlocking */
-+  hard_cond_local_irq_restore(flags);
++  __ipipe_spin_unlock_irqcomplete(flags);
  }
  
  static void imx_gpc_irq_mask(struct irq_data *d)
  {
 +  unsigned long flags;
 +
-+  raw_spin_lock_irqsave_cond(_lock, flags);
++  raw_spin_lock_irqsave(_lock, flags);
 +  /* Parent IC will handle virtual locking */
imx_gpc_hwirq_mask(d->hwirq);
-+  raw_spin_unlock(_lock);
++  __ipipe_spin_unlock_irqbegin(_lock);
irq_chip_mask_parent(d);
-+  hard_cond_local_irq_restore(flags);
++  __ipipe_spin_unlock_irqcomplete(flags);
  }
  
 +#ifdef CONFIG_IPIPE
@@ -6442,7 +6441,7 @@ index 78b6fd0..711177f 100644
  static struct irq_chip imx_gpc_chip = {
.name   = "GPC",
.irq_eoi= irq_chip_eoi_parent,
-@@ -179,6 +234,10 @@ static struct irq_chip imx_gpc_chip = {
+@@ -179,6 +233,10 @@ static struct irq_chip imx_gpc_chip = {
  #ifdef CONFIG_SMP
.irq_set_affinity   = irq_chip_set_affinity_parent,
  #endif
@@ -8993,15 +8992,30 @@ index 9769f1e..c3a4a6f 100644
set_cr(cr_no_alignment);
}
 diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
-index e309c8f..ec1f240 100644
+index e309c8f..7053f1b 100644
 --- a/arch/arm/mm/cache-l2x0.c
 +++ b/arch/arm/mm/cache-l2x0.c
-@@ -47,9 +47,15 @@ struct l2c_init_data {
+@@ -23,6 +23,7 @@
+ #include 
+ #include 
+ #include 
++#include 
+ #include 
+ #include 
+ 
+@@ -47,9 +48,22 @@ struct l2c_init_data {
  
  #define CACHE_LINE_SIZE   32
  
 +#ifdef CONFIG_IPIPE
 +#define CACHE_RANGE_ATOMIC_MAX512UL
++static int l2x0_wa = -1;
++static int __init l2x0_setup_wa(char *str)
++{
++  l2x0_wa = !!simple_strtol(str, NULL, 0);
++  return 0;
++}
++early_param("l2x0_write_allocate", l2x0_setup_wa);
 +#else
 +#define CACHE_RANGE_ATOMIC_MAX4096UL
 +#endif
@@ -9013,7 +9027,7 @@ index e309c8f..ec1f240 100644
  static u32 l2x0_way_mask; /* Bitmask of active ways */
  static u32 l2x0_size;
  static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
-@@ -292,10 +298,10 @@ static void l2c220_op_way(void __iomem *base, unsigned 
reg)
+@@ -292,10 +306,10 @@ static void l2c220_op_way(void __iomem *base, unsigned 
reg)
  static unsigned long l2c220_op_pa_range(void __iomem *reg, unsigned long 
start,
unsigned long end, unsigned long flags)
  {
@@ -9026,7 +9040,7 @@ index e309c8f..ec1f240 100644
  
while (start < blk_end) {
l2c_wait_mask(reg, 1);
-@@

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-03-28 Thread git repository hosting

Module: xenomai-3
Branch: stable-3.0.x
Commit: 5c286f8393ce69db2e3d7ff6d7673f0b65202734
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=5c286f8393ce69db2e3d7ff6d7673f0b65202734

Author: Philippe Gerum 
Date:   Mon Mar 28 16:10:55 2016 +0200

cobalt/arm: upgrade I-pipe support

---

 ...8-arm-3.patch => ipipe-core-4.1.18-arm-4.patch} |   69 +++-
 1 file changed, 53 insertions(+), 16 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
index 01d0fce..f8e3c73 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-4.patch
@@ -1635,7 +1635,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..eccfbcb
+index 000..df05570
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,297 @@
@@ -1685,7 +1685,7 @@ index 000..eccfbcb
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE3
++#define IPIPE_CORE_RELEASE4
 +
 +struct ipipe_domain;
 +struct timekeeper;
@@ -6301,7 +6301,7 @@ index 0f04e30..ab12460 100644
  int mx21_clocks_init(unsigned long lref, unsigned long fref);
  int mx27_clocks_init(unsigned long fref);
 diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
-index 78b6fd0..711177f 100644
+index 78b6fd0..e8dc2f5 100644
 --- a/arch/arm/mach-imx/gpc.c
 +++ b/arch/arm/mach-imx/gpc.c
 @@ -14,6 +14,7 @@
@@ -6391,30 +6391,29 @@ index 78b6fd0..711177f 100644
  }
  
  void imx_gpc_hwirq_unmask(unsigned int hwirq)
-@@ -159,16 +180,50 @@ void imx_gpc_hwirq_mask(unsigned int hwirq)
+@@ -159,16 +180,49 @@ void imx_gpc_hwirq_mask(unsigned int hwirq)
  
  static void imx_gpc_irq_unmask(struct irq_data *d)
  {
 +  unsigned long flags;
 +
-+  raw_spin_lock_irqsave_cond(_lock, flags);
++  raw_spin_lock_irqsave(_lock, flags);
imx_gpc_hwirq_unmask(d->hwirq);
-+  raw_spin_unlock(_lock);
++  __ipipe_spin_unlock_irqbegin(_lock);
irq_chip_unmask_parent(d);
-+  /* Parent IC will handle virtual unlocking */
-+  hard_cond_local_irq_restore(flags);
++  __ipipe_spin_unlock_irqcomplete(flags);
  }
  
  static void imx_gpc_irq_mask(struct irq_data *d)
  {
 +  unsigned long flags;
 +
-+  raw_spin_lock_irqsave_cond(_lock, flags);
++  raw_spin_lock_irqsave(_lock, flags);
 +  /* Parent IC will handle virtual locking */
imx_gpc_hwirq_mask(d->hwirq);
-+  raw_spin_unlock(_lock);
++  __ipipe_spin_unlock_irqbegin(_lock);
irq_chip_mask_parent(d);
-+  hard_cond_local_irq_restore(flags);
++  __ipipe_spin_unlock_irqcomplete(flags);
  }
  
 +#ifdef CONFIG_IPIPE
@@ -6442,7 +6441,7 @@ index 78b6fd0..711177f 100644
  static struct irq_chip imx_gpc_chip = {
.name   = "GPC",
.irq_eoi= irq_chip_eoi_parent,
-@@ -179,6 +234,10 @@ static struct irq_chip imx_gpc_chip = {
+@@ -179,6 +233,10 @@ static struct irq_chip imx_gpc_chip = {
  #ifdef CONFIG_SMP
.irq_set_affinity   = irq_chip_set_affinity_parent,
  #endif
@@ -8993,15 +8992,30 @@ index 9769f1e..c3a4a6f 100644
set_cr(cr_no_alignment);
}
 diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
-index e309c8f..ec1f240 100644
+index e309c8f..7053f1b 100644
 --- a/arch/arm/mm/cache-l2x0.c
 +++ b/arch/arm/mm/cache-l2x0.c
-@@ -47,9 +47,15 @@ struct l2c_init_data {
+@@ -23,6 +23,7 @@
+ #include 
+ #include 
+ #include 
++#include 
+ #include 
+ #include 
+ 
+@@ -47,9 +48,22 @@ struct l2c_init_data {
  
  #define CACHE_LINE_SIZE   32
  
 +#ifdef CONFIG_IPIPE
 +#define CACHE_RANGE_ATOMIC_MAX512UL
++static int l2x0_wa = -1;
++static int __init l2x0_setup_wa(char *str)
++{
++  l2x0_wa = !!simple_strtol(str, NULL, 0);
++  return 0;
++}
++early_param("l2x0_write_allocate", l2x0_setup_wa);
 +#else
 +#define CACHE_RANGE_ATOMIC_MAX4096UL
 +#endif
@@ -9013,7 +9027,7 @@ index e309c8f..ec1f240 100644
  static u32 l2x0_way_mask; /* Bitmask of active ways */
  static u32 l2x0_size;
  static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
-@@ -292,10 +298,10 @@ static void l2c220_op_way(void __iomem *base, unsigned 
reg)
+@@ -292,10 +306,10 @@ static void l2c220_op_way(void __iomem *base, unsigned 
reg)
  static unsigned long l2c220_op_pa_range(void __iomem *reg, unsigned long 
start,
unsigned long end, unsigned long flags)
  {
@@ -9026,7 +9040,7 @@ index e309c8f..ec1f240 100644
  
while (start < blk_end) {
l2c_wait_mask(reg, 1);
-@@ -498,13

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-03-24 Thread git repository hosting

Module: xenomai-3
Branch: stable-3.0.x
Commit: 9e885dbd83b87640c5b641d8d961777997a093dc
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=9e885dbd83b87640c5b641d8d961777997a093dc

Author: Philippe Gerum 
Date:   Thu Mar 24 12:32:33 2016 +0100

cobalt/arm: upgrade I-pipe support

---

 ...rm-11.patch => ipipe-core-3.10.32-arm-13.patch} |   40 ---
 ...rm-15.patch => ipipe-core-3.14.44-arm-16.patch} |   39 +++
 ...-arm-8.patch => ipipe-core-3.18.20-arm-9.patch} |   41 
 3 files changed, 47 insertions(+), 73 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-13.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-13.patch
index 092b67d..99f1933 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-13.patch
@@ -1092,7 +1092,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..c7704e8
+index 000..a1737b1
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,274 @@
@@ -1140,7 +1140,7 @@ index 000..c7704e8
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE11
++#define IPIPE_CORE_RELEASE13
 +
 +struct ipipe_domain;
 +
@@ -5512,7 +5512,7 @@ index da84188..888372f 100644
 +  hard_local_irq_enable();
  }
 diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
-index a5afcf7..8ef9c3e 100644
+index a5afcf7..8ef9c3eb 100644
 --- a/arch/arm/mach-at91/gpio.c
 +++ b/arch/arm/mach-at91/gpio.c
 @@ -24,9 +24,18 @@
@@ -9769,7 +9769,7 @@ index 869254c..69438c1 100644
if (IS_ERR(timer->io_base))
return PTR_ERR(timer->io_base);
 diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h 
b/arch/arm/plat-omap/include/plat/dmtimer.h
-index fb92abb..e593b85 100644
+index fb92abb9..e593b85 100644
 --- a/arch/arm/plat-omap/include/plat/dmtimer.h
 +++ b/arch/arm/plat-omap/include/plat/dmtimer.h
 @@ -104,6 +104,7 @@ struct omap_dm_timer {
@@ -10181,7 +10181,7 @@ index 5dfbb0b..2f1562c 100644
  
  /*
 diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
-index 053d846..316b382 100644
+index 053d846..16a9412 100644
 --- a/drivers/clocksource/arm_arch_timer.c
 +++ b/drivers/clocksource/arm_arch_timer.c
 @@ -17,6 +17,8 @@
@@ -10193,7 +10193,7 @@ index 053d846..316b382 100644
  
  #include 
  #include 
-@@ -43,14 +45,54 @@ static bool arch_timer_use_virtual = true;
+@@ -43,14 +45,57 @@ static bool arch_timer_use_virtual = true;
   * Architected system timer support.
   */
  
@@ -10246,11 +10246,14 @@ index 053d846..316b382 100644
 +  itimer->irq = irq;
 +#endif /* CONFIG_IPIPE */
 +stolen:
-+  __ipipe_tsc_update();
++  /*
++   * This is a 64bit clock source, no need for TSC
++   * update.
++   */
evt->event_handler(evt);
return IRQ_HANDLED;
}
-@@ -62,14 +104,14 @@ static irqreturn_t arch_timer_handler_virt(int irq, void 
*dev_id)
+@@ -62,14 +107,14 @@ static irqreturn_t arch_timer_handler_virt(int irq, void 
*dev_id)
  {
struct clock_event_device *evt = dev_id;
  
@@ -10267,7 +10270,7 @@ index 053d846..316b382 100644
  }
  
  static inline void timer_set_mode(const int access, int mode)
-@@ -142,6 +184,30 @@ static int __cpuinit arch_timer_setup(struct 
clock_event_device *clk)
+@@ -142,6 +187,30 @@ static int __cpuinit arch_timer_setup(struct 
clock_event_device *clk)
  
clk->set_mode(CLOCK_EVT_MODE_SHUTDOWN, NULL);
  
@@ -10298,7 +10301,7 @@ index 053d846..316b382 100644
clockevents_config_and_register(clk, arch_timer_rate,
0xf, 0x7fff);
  
-@@ -275,6 +341,11 @@ static int __init arch_timer_register(void)
+@@ -275,6 +344,11 @@ static int __init arch_timer_register(void)
goto out;
}
  
@@ -17281,10 +17284,10 @@ index 000..2746906
 +#endif
 diff --git a/kernel/ipipe/timer.c b/kernel/ipipe/timer.c
 new file mode 100644
-index 000..0c9b908
+index 000..f32a7ff
 --- /dev/null
 +++ b/kernel/ipipe/timer.c
-@@ -0,0 +1,492 @@
+@@ -0,0 +1,493 @@
 +/* -*- linux-c -*-
 + * linux/kernel/ipipe/timer.c
 + *
@@ -17652,6 +17655,7 @@ index 000..0c9b908
 +  timer->real_set_next_event = evtdev->set_next_event;
 +  evtdev->mult = 1;
 +  evtdev->shift = 0;
++  evtdev->max_delta_ns = UINT_MAX;
 +  evtdev->set_mode = emumode;
 +  evtdev->set_next_event = emutick;
 +  evtdev->ipipe_stolen = 1;

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-03-24 Thread git repository hosting

Module: xenomai-3
Branch: stable-3.0.x
Commit: 5f57eb3f4dc868f064cbe90d0415b55e79f55c96
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=5f57eb3f4dc868f064cbe90d0415b55e79f55c96

Author: Philippe Gerum 
Date:   Thu Mar 24 11:59:35 2016 +0100

cobalt/arm: upgrade I-pipe support

---

 ...8-arm-2.patch => ipipe-core-4.1.18-arm-3.patch} |   45 +++-
 1 file changed, 16 insertions(+), 29 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-2.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-2.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
index 7c5aaff..01d0fce 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-2.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-4.1.18-arm-3.patch
@@ -1635,7 +1635,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..77969f4
+index 000..eccfbcb
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,297 @@
@@ -1685,7 +1685,7 @@ index 000..77969f4
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE2
++#define IPIPE_CORE_RELEASE3
 +
 +struct ipipe_domain;
 +struct timekeeper;
@@ -4277,7 +4277,7 @@ index 000..ffe02fe
 +EXPORT_SYMBOL_GPL(cpu_architecture);
 diff --git a/arch/arm/kernel/ipipe_tsc.c b/arch/arm/kernel/ipipe_tsc.c
 new file mode 100644
-index 000..d122b39
+index 000..aa9571e
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe_tsc.c
 @@ -0,0 +1,214 @@
@@ -4409,7 +4409,7 @@ index 000..d122b39
 +
 +  default:
 +  unimplemented:
-+  printk("I-pipel: Unimplemented tsc configuration, "
++  printk("I-pipe: Unimplemented tsc configuration, "
 + "type: %d, mask: 0x%08Lx\n", info->type, info->u.mask);
 +  BUG();
 +  }
@@ -4446,8 +4446,8 @@ index 000..d122b39
 +
 +  wrap_ms *= HZ / 2;
 +  do_div(wrap_ms, 1000);
-+  if (wrap_ms > 0x)
-+  wrap_ms = 0x;
++  if (wrap_ms > 0x7fff)
++  wrap_ms = 0x7fff;
 +  ipipe_tsc_update_timer.data = wrap_ms;
 +  ipipe_tsc_update_timer.function = __ipipe_tsc_update_fn;
 +  mod_timer(_tsc_update_timer,
@@ -10738,7 +10738,7 @@ index f6e4d56..e2904aa 100644
  
  /*
 diff --git a/drivers/clocksource/arm_arch_timer.c 
b/drivers/clocksource/arm_arch_timer.c
-index 0aa135d..b13608c 100644
+index 0aa135d..c48e8f7 100644
 --- a/drivers/clocksource/arm_arch_timer.c
 +++ b/drivers/clocksource/arm_arch_timer.c
 @@ -17,6 +17,8 @@
@@ -10760,7 +10760,7 @@ index 0aa135d..b13608c 100644
  {
unsigned long ctrl;
  
-@@ -146,6 +147,49 @@ static __always_inline irqreturn_t timer_handler(const 
int access,
+@@ -146,6 +147,52 @@ static __always_inline irqreturn_t timer_handler(const 
int access,
if (ctrl & ARCH_TIMER_CTRL_IT_STAT) {
ctrl |= ARCH_TIMER_CTRL_IT_MASK;
arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl, evt);
@@ -10806,11 +10806,14 @@ index 0aa135d..b13608c 100644
 +  itimer->irq = irq;
 +#endif /* CONFIG_IPIPE */
 +stolen:
-+  __ipipe_tsc_update();
++  /*
++   * This is a 64bit clock source, no need for TSC
++   * update.
++   */
evt->event_handler(evt);
return IRQ_HANDLED;
}
-@@ -157,28 +201,28 @@ static irqreturn_t arch_timer_handler_virt(int irq, void 
*dev_id)
+@@ -157,28 +204,28 @@ static irqreturn_t arch_timer_handler_virt(int irq, void 
*dev_id)
  {
struct clock_event_device *evt = dev_id;
  
@@ -10843,7 +10846,7 @@ index 0aa135d..b13608c 100644
  }
  
  static __always_inline void timer_set_mode(const int access, int mode,
-@@ -280,6 +324,18 @@ static void __arch_timer_setup(unsigned type,
+@@ -280,6 +327,18 @@ static void __arch_timer_setup(unsigned type,
clk->set_mode = arch_timer_set_mode_phys;
clk->set_next_event = arch_timer_set_next_event_phys;
}
@@ -10862,21 +10865,17 @@ index 0aa135d..b13608c 100644
} else {
clk->features |= CLOCK_EVT_FEAT_DYNIRQ;
clk->name = "arch_mem_timer";
-@@ -342,6 +398,13 @@ static void arch_counter_set_user_access(void)
+@@ -342,6 +401,9 @@ static void arch_counter_set_user_access(void)
  
/* Enable user access to the virtual counter */
cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN;
 +#ifdef CONFIG_IPIPE
 +  cntkctl |= ARCH_TIMER_USR_PCT_ACCESS_EN;
 +#endif
-+
-+#ifdef CONFIG_IPIPE
-+  cntkctl |= ARCH_TIMER_USR_PCT_ACCESS_EN;
-+#endif
  
arch_timer_set_cntkctl(cntkctl);
  }
-@@ -483,6 +546,11 @@ static void

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-03-19 Thread git repository hosting

Module: xenomai-3
Branch: wip/prioceil
Commit: 31c62a9ebf6c2e6b6642a4134eaeb56a7db09890
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=31c62a9ebf6c2e6b6642a4134eaeb56a7db09890

Author: Philippe Gerum 
Date:   Sun Mar 13 12:06:51 2016 +0100

cobalt/arm: upgrade I-pipe support

---

 ...rm-10.patch => ipipe-core-3.10.32-arm-11.patch} |  106 +++
 ...rm-12.patch => ipipe-core-3.14.44-arm-15.patch} |  197 +---
 ...-arm-6.patch => ipipe-core-3.18.20-arm-8.patch} |   71 ---
 ...8-arm-1.patch => ipipe-core-4.1.18-arm-2.patch} |   45 ++---
 4 files changed, 262 insertions(+), 157 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-10.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-10.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch
index 5ff3658..092b67d 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-10.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch
@@ -1092,7 +1092,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..7599b0d
+index 000..c7704e8
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,274 @@
@@ -1140,7 +1140,7 @@ index 000..7599b0d
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE10
++#define IPIPE_CORE_RELEASE11
 +
 +struct ipipe_domain;
 +
@@ -3712,10 +3712,10 @@ index 000..5b77cfb
 +EXPORT_SYMBOL_GPL(cpu_architecture);
 diff --git a/arch/arm/kernel/ipipe_tsc.c b/arch/arm/kernel/ipipe_tsc.c
 new file mode 100644
-index 000..fa2d382
+index 000..f04e048
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe_tsc.c
-@@ -0,0 +1,179 @@
+@@ -0,0 +1,181 @@
 +#include 
 +#include 
 +#include 
@@ -3858,6 +3858,8 @@ index 000..fa2d382
 +  __clocksource_updatefreq_hz(, tsc_info.freq);
 +
 +  __ipipe_kuser_tsc_freq = tsc_info.freq;
++
++  __ipipe_tracer_hrclock_initialized();
 +}
 +
 +void __ipipe_mach_get_tscinfo(struct __ipipe_tscinfo *info)
@@ -11051,7 +11053,7 @@ index 8ea3b33..1079825 100644
  }
  
 diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
-index 19ceaa6..d56f20a 100644
+index 19ceaa6..16c312a 100644
 --- a/drivers/irqchip/irq-gic.c
 +++ b/drivers/irqchip/irq-gic.c
 @@ -41,6 +41,7 @@
@@ -11071,12 +11073,10 @@ index 19ceaa6..d56f20a 100644
  
  /*
   * The GIC mapping of CPU interfaces does not necessarily match
-@@ -153,37 +154,74 @@ static inline unsigned int gic_irq(struct irq_data *d)
-  */
+@@ -154,36 +155,73 @@ static inline unsigned int gic_irq(struct irq_data *d)
  static void gic_mask_irq(struct irq_data *d)
  {
--  u32 mask = 1 << (gic_irq(d) % 32);
-+  u32 mask = 1 << (d->irq % 32);
+   u32 mask = 1 << (gic_irq(d) % 32);
 +  unsigned long flags;
  
 -  raw_spin_lock(_controller_lock);
@@ -11091,8 +11091,7 @@ index 19ceaa6..d56f20a 100644
  
  static void gic_unmask_irq(struct irq_data *d)
  {
--  u32 mask = 1 << (gic_irq(d) % 32);
-+  u32 mask = 1 << (d->irq % 32);
+   u32 mask = 1 << (gic_irq(d) % 32);
 +  unsigned long flags;
  
 -  raw_spin_lock(_controller_lock);
@@ -8,14 +7,14 @@ index 19ceaa6..d56f20a 100644
 +  raw_spin_unlock_irqrestore_cond(_controller_lock, flags);
 +  writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
 +}
-+
+ 
 +#ifdef CONFIG_IPIPE
 +
 +static void gic_hold_irq(struct irq_data *d)
 +{
-+  u32 mask = 1 << (d->irq % 32);
++  u32 mask = 1 << (gic_irq(d) % 32);
 +  unsigned long flags;
- 
++
 +  raw_spin_lock_irqsave_cond(_controller_lock, flags);
 +  writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + 
(gic_irq(d) / 32) * 4);
 +  if (gic_arch_extn.irq_mask)
@@ -11139,7 +11138,7 @@ index 19ceaa6..d56f20a 100644
 +
 +static void gic_release_irq(struct irq_data *d)
 +{
-+  u32 mask = 1 << (d->irq % 32);
++  u32 mask = 1 << (gic_irq(d) % 32);
 +  unsigned long flags;
 +
 +  raw_spin_lock_irqsave_cond(_controller_lock, flags);
@@ -11984,10 +11983,10 @@ index e6bb36a..898a91a 100644
  
 diff --git a/include/linux/ipipe.h b/include/linux/ipipe.h
 new file mode 100644
-index 000..525f3cf
+index 000..4ef7e3d
 --- /dev/null
 +++ b/include/linux/ipipe.h
-@@ -0,0 +1,443 @@
+@@ -0,0 +1,449 @@
 +/* -*- linux-c -*-
 + * include/linux/ipipe.h
 + *
@@ -12394,6 +12393,12 @@ index 000..525f3cf
 +#define __ipipe_uaccess_might_fault() might_fault()
 +#endif
 +
++#ifdef CONFIG_IPIPE_TRACE
++void __ipipe_tracer_hrclock_initialized(void);
++#else /* !CONFIG_IPIPE_TRACE */
++#define __ipipe_tracer_hrclock_initialized()  do { } while(0)
++#endif /* !CONFIG_IPIPE_TRACE */
++
 +#include 
 +
 +#else /* !CONFIG_IPIPE */
@@

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-03-13 Thread git repository hosting

Module: xenomai-3
Branch: stable-3.0.x
Commit: 31c62a9ebf6c2e6b6642a4134eaeb56a7db09890
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=31c62a9ebf6c2e6b6642a4134eaeb56a7db09890

Author: Philippe Gerum 
Date:   Sun Mar 13 12:06:51 2016 +0100

cobalt/arm: upgrade I-pipe support

---

 ...rm-10.patch => ipipe-core-3.10.32-arm-11.patch} |  106 +++
 ...rm-12.patch => ipipe-core-3.14.44-arm-15.patch} |  197 +---
 ...-arm-6.patch => ipipe-core-3.18.20-arm-8.patch} |   71 ---
 ...8-arm-1.patch => ipipe-core-4.1.18-arm-2.patch} |   45 ++---
 4 files changed, 262 insertions(+), 157 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-10.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-10.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch
index 5ff3658..092b67d 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-10.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-11.patch
@@ -1092,7 +1092,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..7599b0d
+index 000..c7704e8
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,274 @@
@@ -1140,7 +1140,7 @@ index 000..7599b0d
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE10
++#define IPIPE_CORE_RELEASE11
 +
 +struct ipipe_domain;
 +
@@ -3712,10 +3712,10 @@ index 000..5b77cfb
 +EXPORT_SYMBOL_GPL(cpu_architecture);
 diff --git a/arch/arm/kernel/ipipe_tsc.c b/arch/arm/kernel/ipipe_tsc.c
 new file mode 100644
-index 000..fa2d382
+index 000..f04e048
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe_tsc.c
-@@ -0,0 +1,179 @@
+@@ -0,0 +1,181 @@
 +#include 
 +#include 
 +#include 
@@ -3858,6 +3858,8 @@ index 000..fa2d382
 +  __clocksource_updatefreq_hz(, tsc_info.freq);
 +
 +  __ipipe_kuser_tsc_freq = tsc_info.freq;
++
++  __ipipe_tracer_hrclock_initialized();
 +}
 +
 +void __ipipe_mach_get_tscinfo(struct __ipipe_tscinfo *info)
@@ -11051,7 +11053,7 @@ index 8ea3b33..1079825 100644
  }
  
 diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
-index 19ceaa6..d56f20a 100644
+index 19ceaa6..16c312a 100644
 --- a/drivers/irqchip/irq-gic.c
 +++ b/drivers/irqchip/irq-gic.c
 @@ -41,6 +41,7 @@
@@ -11071,12 +11073,10 @@ index 19ceaa6..d56f20a 100644
  
  /*
   * The GIC mapping of CPU interfaces does not necessarily match
-@@ -153,37 +154,74 @@ static inline unsigned int gic_irq(struct irq_data *d)
-  */
+@@ -154,36 +155,73 @@ static inline unsigned int gic_irq(struct irq_data *d)
  static void gic_mask_irq(struct irq_data *d)
  {
--  u32 mask = 1 << (gic_irq(d) % 32);
-+  u32 mask = 1 << (d->irq % 32);
+   u32 mask = 1 << (gic_irq(d) % 32);
 +  unsigned long flags;
  
 -  raw_spin_lock(_controller_lock);
@@ -11091,8 +11091,7 @@ index 19ceaa6..d56f20a 100644
  
  static void gic_unmask_irq(struct irq_data *d)
  {
--  u32 mask = 1 << (gic_irq(d) % 32);
-+  u32 mask = 1 << (d->irq % 32);
+   u32 mask = 1 << (gic_irq(d) % 32);
 +  unsigned long flags;
  
 -  raw_spin_lock(_controller_lock);
@@ -8,14 +7,14 @@ index 19ceaa6..d56f20a 100644
 +  raw_spin_unlock_irqrestore_cond(_controller_lock, flags);
 +  writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI);
 +}
-+
+ 
 +#ifdef CONFIG_IPIPE
 +
 +static void gic_hold_irq(struct irq_data *d)
 +{
-+  u32 mask = 1 << (d->irq % 32);
++  u32 mask = 1 << (gic_irq(d) % 32);
 +  unsigned long flags;
- 
++
 +  raw_spin_lock_irqsave_cond(_controller_lock, flags);
 +  writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + 
(gic_irq(d) / 32) * 4);
 +  if (gic_arch_extn.irq_mask)
@@ -11139,7 +11138,7 @@ index 19ceaa6..d56f20a 100644
 +
 +static void gic_release_irq(struct irq_data *d)
 +{
-+  u32 mask = 1 << (d->irq % 32);
++  u32 mask = 1 << (gic_irq(d) % 32);
 +  unsigned long flags;
 +
 +  raw_spin_lock_irqsave_cond(_controller_lock, flags);
@@ -11984,10 +11983,10 @@ index e6bb36a..898a91a 100644
  
 diff --git a/include/linux/ipipe.h b/include/linux/ipipe.h
 new file mode 100644
-index 000..525f3cf
+index 000..4ef7e3d
 --- /dev/null
 +++ b/include/linux/ipipe.h
-@@ -0,0 +1,443 @@
+@@ -0,0 +1,449 @@
 +/* -*- linux-c -*-
 + * include/linux/ipipe.h
 + *
@@ -12394,6 +12393,12 @@ index 000..525f3cf
 +#define __ipipe_uaccess_might_fault() might_fault()
 +#endif
 +
++#ifdef CONFIG_IPIPE_TRACE
++void __ipipe_tracer_hrclock_initialized(void);
++#else /* !CONFIG_IPIPE_TRACE */
++#define __ipipe_tracer_hrclock_initialized()  do { } while(0)
++#endif /* !CONFIG_IPIPE_TRACE */
++
 +#include 
 +
 +#else /* !CONFIG_IPIPE */
@@

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-03-06 Thread git repository hosting

Module: xenomai-3
Branch: wip/dovetail
Commit: 6b01589f714663dd645bf3243ea934a767ac0d12
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=6b01589f714663dd645bf3243ea934a767ac0d12

Author: Philippe Gerum 
Date:   Mon Feb 29 10:10:20 2016 +0100

cobalt/arm: upgrade I-pipe support

---

 .../arch/arm/patches/ipipe-core-4.1.18-arm-1.patch |23942 
 1 file changed, 23942 insertions(+)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=6b01589f714663dd645bf3243ea934a767ac0d12

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-03-02 Thread git repository hosting

Module: xenomai-3
Branch: wip/prioceil
Commit: d43c70baccf2feac65730d11698083db2d152f80
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=d43c70baccf2feac65730d11698083db2d152f80

Author: Philippe Gerum 
Date:   Mon Feb 29 10:10:20 2016 +0100

cobalt/arm: upgrade I-pipe support

---

 .../arch/arm/patches/ipipe-core-4.1.18-arm-1.patch |23942 
 1 file changed, 23942 insertions(+)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=d43c70baccf2feac65730d11698083db2d152f80

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2016-02-29 Thread git repository hosting

Module: xenomai-3
Branch: stable-3.0.x
Commit: d43c70baccf2feac65730d11698083db2d152f80
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=d43c70baccf2feac65730d11698083db2d152f80

Author: Philippe Gerum 
Date:   Mon Feb 29 10:10:20 2016 +0100

cobalt/arm: upgrade I-pipe support

---

 .../arch/arm/patches/ipipe-core-4.1.18-arm-1.patch |23942 
 1 file changed, 23942 insertions(+)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=d43c70baccf2feac65730d11698083db2d152f80

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-10-17 Thread git repository hosting

Module: xenomai-3
Branch: arm64
Commit: cdd4d58892b456cf18a122329f21a5bd6d40c54e
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=cdd4d58892b456cf18a122329f21a5bd6d40c54e

Author: Philippe Gerum 
Date:   Tue Oct  6 15:38:27 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-5.patch => ipipe-core-3.18.20-arm-6.patch} |  134 +---
 1 file changed, 86 insertions(+), 48 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
index 6bded0c..073b2a7 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
@@ -159,17 +159,18 @@ index 38c89ca..7c954bc 100644
  
  # Keep at91 dtb files sorted alphabetically for each SoC
 diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
-index 9596ed5..3e7a4a3 100644
+index 9596ed5..8957633e 100644
 --- a/arch/arm/boot/dts/imx6qdl.dtsi
 +++ b/arch/arm/boot/dts/imx6qdl.dtsi
-@@ -125,6 +125,12 @@
+@@ -125,6 +125,13 @@
clocks = < IMX6QDL_CLK_TWD>;
};
  
 +  timer@00a00200 {
 +  compatible = "arm,cortex-a9-global-timer";
 +  reg = <0x00a00200 0x20>;
-+  clocks = < 15>;
++  interrupts = <1 11 0xf01>;
++  clocks = < IMX6QDL_CLK_TWD>;
 +  };
 +
L2: l2-cache@00a02000 {
@@ -690,10 +691,10 @@ index 000..19b50df
 +  power = <50>;
 +};
 diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
-index 878c979..aae32e6 100644
+index 878c979..dc2450d 100644
 --- a/arch/arm/boot/dts/omap4.dtsi
 +++ b/arch/arm/boot/dts/omap4.dtsi
-@@ -72,6 +72,12 @@
+@@ -72,6 +72,13 @@
interrupts = ;
};
  
@@ -701,6 +702,7 @@ index 878c979..aae32e6 100644
 +  compatible = "arm,cortex-a9-global-timer";
 +  reg = <0x48240200 0x20>;
 +  clocks = <_periphclk>;
++  interrupts = ;
 +  };
 +
/*
@@ -1651,7 +1653,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..5c7e9bd
+index 000..76c7b6b
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1701,7 @@ index 000..5c7e9bd
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE5
++#define IPIPE_CORE_RELEASE6
 +
 +struct ipipe_domain;
 +
@@ -3717,6 +3719,19 @@ index 4176df7..8451be2 100644
  /*
   * These are the registers used in the syscall handler, and allow us to
   * have in theory up to 7 arguments to a function - r0 to r6.
+diff --git a/arch/arm/kernel/hibernate.c b/arch/arm/kernel/hibernate.c
+index cfb354f..d11d476 100644
+--- a/arch/arm/kernel/hibernate.c
 b/arch/arm/kernel/hibernate.c
+@@ -83,7 +83,7 @@ static void notrace arch_restore_image(void *unused)
+ {
+   struct pbe *pbe;
+ 
+-  cpu_switch_mm(idmap_pgd, _mm);
++  cpu_switch_mm(idmap_pgd, _mm, 1);
+   for (pbe = restore_pblist; pbe; pbe = pbe->next)
+   copy_page(pbe->orig_address, pbe->address);
+ 
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
 index 000..9577fbb
@@ -4285,10 +4300,10 @@ index 000..9577fbb
 +EXPORT_SYMBOL_GPL(cpu_architecture);
 diff --git a/arch/arm/kernel/ipipe_tsc.c b/arch/arm/kernel/ipipe_tsc.c
 new file mode 100644
-index 000..f0cfd86
+index 000..4a87f0c
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe_tsc.c
-@@ -0,0 +1,201 @@
+@@ -0,0 +1,203 @@
 +#include 
 +#include 
 +#include 
@@ -4456,6 +4471,8 @@ index 000..f0cfd86
 +  ipipe_tsc_update_timer.function = __ipipe_tsc_update_fn;
 +  mod_timer(_tsc_update_timer,
 +  jiffies + ipipe_tsc_update_timer.data);
++
++  __ipipe_tracer_hrclock_initialized();
 +}
 +
 +void __ipipe_mach_get_tscinfo(struct __ipipe_tscinfo *info)
@@ -4969,7 +4986,7 @@ index bd19834..c49e067 100644
} while (thread_flags & _TIF_WORK_MASK);
return 0;
 diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
-index a8e32aa..bd81cc5 100644
+index a8e32aa..4939e05 100644
 --- a/arch/arm/kernel/smp.c
 +++ b/arch/arm/kernel/smp.c
 @@ -72,8 +72,24 @@ enum ipi_msg_type {
@@ -5016,18 +5033,16 @@ index a8e32aa..bd81cc5 100644
  
/*
 * All kernel threads share the same mm context; grab a
-@@ -514,6 +537,93 @@ void arch_irq_work_raise(void)
+@@ -514,6 +537,91 @@ void arch_irq_work_raise(void)
  #endif
  
  #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 +
 +static inline void ipi_timer(void)
 +{

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-10-06 Thread git repository hosting

Module: xenomai-3
Branch: master
Commit: cdd4d58892b456cf18a122329f21a5bd6d40c54e
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=cdd4d58892b456cf18a122329f21a5bd6d40c54e

Author: Philippe Gerum 
Date:   Tue Oct  6 15:38:27 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-5.patch => ipipe-core-3.18.20-arm-6.patch} |  134 +---
 1 file changed, 86 insertions(+), 48 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
index 6bded0c..073b2a7 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
@@ -159,17 +159,18 @@ index 38c89ca..7c954bc 100644
  
  # Keep at91 dtb files sorted alphabetically for each SoC
 diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
-index 9596ed5..3e7a4a3 100644
+index 9596ed5..8957633e 100644
 --- a/arch/arm/boot/dts/imx6qdl.dtsi
 +++ b/arch/arm/boot/dts/imx6qdl.dtsi
-@@ -125,6 +125,12 @@
+@@ -125,6 +125,13 @@
clocks = < IMX6QDL_CLK_TWD>;
};
  
 +  timer@00a00200 {
 +  compatible = "arm,cortex-a9-global-timer";
 +  reg = <0x00a00200 0x20>;
-+  clocks = < 15>;
++  interrupts = <1 11 0xf01>;
++  clocks = < IMX6QDL_CLK_TWD>;
 +  };
 +
L2: l2-cache@00a02000 {
@@ -690,10 +691,10 @@ index 000..19b50df
 +  power = <50>;
 +};
 diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
-index 878c979..aae32e6 100644
+index 878c979..dc2450d 100644
 --- a/arch/arm/boot/dts/omap4.dtsi
 +++ b/arch/arm/boot/dts/omap4.dtsi
-@@ -72,6 +72,12 @@
+@@ -72,6 +72,13 @@
interrupts = ;
};
  
@@ -701,6 +702,7 @@ index 878c979..aae32e6 100644
 +  compatible = "arm,cortex-a9-global-timer";
 +  reg = <0x48240200 0x20>;
 +  clocks = <_periphclk>;
++  interrupts = ;
 +  };
 +
/*
@@ -1651,7 +1653,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..5c7e9bd
+index 000..76c7b6b
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1701,7 @@ index 000..5c7e9bd
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE5
++#define IPIPE_CORE_RELEASE6
 +
 +struct ipipe_domain;
 +
@@ -3717,6 +3719,19 @@ index 4176df7..8451be2 100644
  /*
   * These are the registers used in the syscall handler, and allow us to
   * have in theory up to 7 arguments to a function - r0 to r6.
+diff --git a/arch/arm/kernel/hibernate.c b/arch/arm/kernel/hibernate.c
+index cfb354f..d11d476 100644
+--- a/arch/arm/kernel/hibernate.c
 b/arch/arm/kernel/hibernate.c
+@@ -83,7 +83,7 @@ static void notrace arch_restore_image(void *unused)
+ {
+   struct pbe *pbe;
+ 
+-  cpu_switch_mm(idmap_pgd, _mm);
++  cpu_switch_mm(idmap_pgd, _mm, 1);
+   for (pbe = restore_pblist; pbe; pbe = pbe->next)
+   copy_page(pbe->orig_address, pbe->address);
+ 
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
 index 000..9577fbb
@@ -4285,10 +4300,10 @@ index 000..9577fbb
 +EXPORT_SYMBOL_GPL(cpu_architecture);
 diff --git a/arch/arm/kernel/ipipe_tsc.c b/arch/arm/kernel/ipipe_tsc.c
 new file mode 100644
-index 000..f0cfd86
+index 000..4a87f0c
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe_tsc.c
-@@ -0,0 +1,201 @@
+@@ -0,0 +1,203 @@
 +#include 
 +#include 
 +#include 
@@ -4456,6 +4471,8 @@ index 000..f0cfd86
 +  ipipe_tsc_update_timer.function = __ipipe_tsc_update_fn;
 +  mod_timer(_tsc_update_timer,
 +  jiffies + ipipe_tsc_update_timer.data);
++
++  __ipipe_tracer_hrclock_initialized();
 +}
 +
 +void __ipipe_mach_get_tscinfo(struct __ipipe_tscinfo *info)
@@ -4969,7 +4986,7 @@ index bd19834..c49e067 100644
} while (thread_flags & _TIF_WORK_MASK);
return 0;
 diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
-index a8e32aa..bd81cc5 100644
+index a8e32aa..4939e05 100644
 --- a/arch/arm/kernel/smp.c
 +++ b/arch/arm/kernel/smp.c
 @@ -72,8 +72,24 @@ enum ipi_msg_type {
@@ -5016,18 +5033,16 @@ index a8e32aa..bd81cc5 100644
  
/*
 * All kernel threads share the same mm context; grab a
-@@ -514,6 +537,93 @@ void arch_irq_work_raise(void)
+@@ -514,6 +537,91 @@ void arch_irq_work_raise(void)
  #endif
  
  #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 +
 +static inline void ipi_timer(void)
 +{

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-10-06 Thread git repository hosting

Module: xenomai-3
Branch: master
Commit: 83fed7b72313dda3b6b5fd5bb5175fa25a7f9ad3
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=83fed7b72313dda3b6b5fd5bb5175fa25a7f9ad3

Author: Philippe Gerum 
Date:   Tue Sep 15 11:23:16 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-4.patch => ipipe-core-3.18.20-arm-5.patch} | 2095 ++--
 1 file changed, 167 insertions(+), 1928 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
similarity index 92%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
index e6360b7..6bded0c 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
@@ -1651,7 +1651,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..3c73753
+index 000..5c7e9bd
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1699,7 @@ index 000..3c73753
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE4
++#define IPIPE_CORE_RELEASE5
 +
 +struct ipipe_domain;
 +
@@ -3143,10 +3143,10 @@ index 705bb76..283d9da 100644
   */
  #if !defined(__KERNEL__)
 diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
-index 38ddd9f..ac4e2f8 100644
+index 2ecc7d1..5599d6e 100644
 --- a/arch/arm/kernel/Makefile
 +++ b/arch/arm/kernel/Makefile
-@@ -94,6 +94,8 @@ endif
+@@ -95,6 +95,8 @@ endif
  head-y:= head$(MMUEXT).o
  obj-$(CONFIG_DEBUG_LL)+= debug.o
  obj-$(CONFIG_EARLY_PRINTK)+= early_printk.o
@@ -3414,7 +3414,7 @@ index 2fd..a0cd9ce 100644
.if (. - \sym) & 3
.rept   4 - (. - \sym) & 3
 diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
-index 6bb09d4..91e4b89 100644
+index eb6f1927..7bef831 100644
 --- a/arch/arm/kernel/entry-common.S
 +++ b/arch/arm/kernel/entry-common.S
 @@ -2,6 +2,7 @@
@@ -3425,7 +3425,7 @@ index 6bb09d4..91e4b89 100644
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License version 2 as
-@@ -43,6 +44,42 @@ ret_fast_syscall:
+@@ -45,6 +46,42 @@ ret_fast_syscall:
ct_user_enter
  
restore_user_regs fast = 1, offset = S_OFF
@@ -3468,7 +3468,7 @@ index 6bb09d4..91e4b89 100644
   UNWIND(.fnend)
  
  /*
-@@ -72,12 +109,7 @@ ENTRY(ret_to_user_from_irq)
+@@ -74,12 +111,7 @@ ENTRY(ret_to_user_from_irq)
bne work_pending
  no_work_pending:
asm_trace_hardirqs_on
@@ -3482,7 +3482,7 @@ index 6bb09d4..91e4b89 100644
  ENDPROC(ret_to_user_from_irq)
  ENDPROC(ret_to_user)
  
-@@ -85,6 +117,7 @@ ENDPROC(ret_to_user)
+@@ -87,6 +119,7 @@ ENDPROC(ret_to_user)
   * This is how we return from a fork.
   */
  ENTRY(ret_from_fork)
@@ -3490,7 +3490,7 @@ index 6bb09d4..91e4b89 100644
bl  schedule_tail
cmp r5, #0
movne   r0, r4
-@@ -366,6 +399,16 @@ ENTRY(vector_swi)
+@@ -368,6 +401,16 @@ ENTRY(vector_swi)
str r0, [sp, #S_OLD_R0] @ Save OLD_R0
  #endif
zero_fp
@@ -3507,7 +3507,7 @@ index 6bb09d4..91e4b89 100644
alignment_trap r10, ip, __cr_alignment
enable_irq
ct_user_exit
-@@ -424,6 +467,57 @@ ENTRY(vector_swi)
+@@ -426,6 +469,57 @@ ENTRY(vector_swi)
  #endif
  
  local_restart:
@@ -3565,7 +3565,7 @@ index 6bb09d4..91e4b89 100644
ldr r10, [tsk, #TI_FLAGS]   @ check for syscall tracing
stmdb   sp!, {r4, r5}   @ push fifth and sixth args
  
-@@ -619,3 +713,28 @@ ENTRY(sys_oabi_call_table)
+@@ -621,3 +715,28 @@ ENTRY(sys_oabi_call_table)
  
  #endif
  
@@ -3719,10 +3719,10 @@ index 4176df7..8451be2 100644
   * have in theory up to 7 arguments to a function - r0 to r6.
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
-index 000..5187ab7
+index 000..9577fbb
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe.c
-@@ -0,0 +1,575 @@
+@@ -0,0 +1,560 @@
 +/* -*- linux-c -*-
 + * linux/arch/arm/kernel/ipipe.c
 + *
@@ -3959,21 +3959,6 @@ index 000..5187ab7
 +EXPORT_SYMBOL_GPL(smp_on_up);
 +#endif /* SMP_ON_UP */
 +
-+/*
-+ * ipipe_raise_irq() -- Push the interrupt at front of the pipeline
-+ * just like if it has been actually received from a hw source. Also
-+ * works for virtual interrupts.
-+ */
-+void ipipe_raise_irq(unsigned irq)
-+{
-+  unsigned long flags;
-+
-+  flags = hard_local_irq_save();
-+  __ipipe_dispatch_irq(irq, IPIPE_IRQF_NOACK);
-+  hard_local_irq_restore(flags);
-+}
-+EXPORT_SYMBOL_GPL(ipipe_raise_irq);
-+
 +int ipipe_get_sysinfo(struct

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-10-06 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: cdd4d58892b456cf18a122329f21a5bd6d40c54e
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=cdd4d58892b456cf18a122329f21a5bd6d40c54e

Author: Philippe Gerum 
Date:   Tue Oct  6 15:38:27 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-5.patch => ipipe-core-3.18.20-arm-6.patch} |  134 +---
 1 file changed, 86 insertions(+), 48 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
index 6bded0c..073b2a7 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-6.patch
@@ -159,17 +159,18 @@ index 38c89ca..7c954bc 100644
  
  # Keep at91 dtb files sorted alphabetically for each SoC
 diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
-index 9596ed5..3e7a4a3 100644
+index 9596ed5..8957633e 100644
 --- a/arch/arm/boot/dts/imx6qdl.dtsi
 +++ b/arch/arm/boot/dts/imx6qdl.dtsi
-@@ -125,6 +125,12 @@
+@@ -125,6 +125,13 @@
clocks = < IMX6QDL_CLK_TWD>;
};
  
 +  timer@00a00200 {
 +  compatible = "arm,cortex-a9-global-timer";
 +  reg = <0x00a00200 0x20>;
-+  clocks = < 15>;
++  interrupts = <1 11 0xf01>;
++  clocks = < IMX6QDL_CLK_TWD>;
 +  };
 +
L2: l2-cache@00a02000 {
@@ -690,10 +691,10 @@ index 000..19b50df
 +  power = <50>;
 +};
 diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
-index 878c979..aae32e6 100644
+index 878c979..dc2450d 100644
 --- a/arch/arm/boot/dts/omap4.dtsi
 +++ b/arch/arm/boot/dts/omap4.dtsi
-@@ -72,6 +72,12 @@
+@@ -72,6 +72,13 @@
interrupts = ;
};
  
@@ -701,6 +702,7 @@ index 878c979..aae32e6 100644
 +  compatible = "arm,cortex-a9-global-timer";
 +  reg = <0x48240200 0x20>;
 +  clocks = <_periphclk>;
++  interrupts = ;
 +  };
 +
/*
@@ -1651,7 +1653,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..5c7e9bd
+index 000..76c7b6b
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1701,7 @@ index 000..5c7e9bd
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE5
++#define IPIPE_CORE_RELEASE6
 +
 +struct ipipe_domain;
 +
@@ -3717,6 +3719,19 @@ index 4176df7..8451be2 100644
  /*
   * These are the registers used in the syscall handler, and allow us to
   * have in theory up to 7 arguments to a function - r0 to r6.
+diff --git a/arch/arm/kernel/hibernate.c b/arch/arm/kernel/hibernate.c
+index cfb354f..d11d476 100644
+--- a/arch/arm/kernel/hibernate.c
 b/arch/arm/kernel/hibernate.c
+@@ -83,7 +83,7 @@ static void notrace arch_restore_image(void *unused)
+ {
+   struct pbe *pbe;
+ 
+-  cpu_switch_mm(idmap_pgd, _mm);
++  cpu_switch_mm(idmap_pgd, _mm, 1);
+   for (pbe = restore_pblist; pbe; pbe = pbe->next)
+   copy_page(pbe->orig_address, pbe->address);
+ 
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
 index 000..9577fbb
@@ -4285,10 +4300,10 @@ index 000..9577fbb
 +EXPORT_SYMBOL_GPL(cpu_architecture);
 diff --git a/arch/arm/kernel/ipipe_tsc.c b/arch/arm/kernel/ipipe_tsc.c
 new file mode 100644
-index 000..f0cfd86
+index 000..4a87f0c
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe_tsc.c
-@@ -0,0 +1,201 @@
+@@ -0,0 +1,203 @@
 +#include 
 +#include 
 +#include 
@@ -4456,6 +4471,8 @@ index 000..f0cfd86
 +  ipipe_tsc_update_timer.function = __ipipe_tsc_update_fn;
 +  mod_timer(_tsc_update_timer,
 +  jiffies + ipipe_tsc_update_timer.data);
++
++  __ipipe_tracer_hrclock_initialized();
 +}
 +
 +void __ipipe_mach_get_tscinfo(struct __ipipe_tscinfo *info)
@@ -4969,7 +4986,7 @@ index bd19834..c49e067 100644
} while (thread_flags & _TIF_WORK_MASK);
return 0;
 diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
-index a8e32aa..bd81cc5 100644
+index a8e32aa..4939e05 100644
 --- a/arch/arm/kernel/smp.c
 +++ b/arch/arm/kernel/smp.c
 @@ -72,8 +72,24 @@ enum ipi_msg_type {
@@ -5016,18 +5033,16 @@ index a8e32aa..bd81cc5 100644
  
/*
 * All kernel threads share the same mm context; grab a
-@@ -514,6 +537,93 @@ void arch_irq_work_raise(void)
+@@ -514,6 +537,91 @@ void arch_irq_work_raise(void)
  #endif
  
  #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
 +
 +static inline void ipi_timer(void)
 +{

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-09-15 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: 83fed7b72313dda3b6b5fd5bb5175fa25a7f9ad3
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=83fed7b72313dda3b6b5fd5bb5175fa25a7f9ad3

Author: Philippe Gerum 
Date:   Tue Sep 15 11:23:16 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-4.patch => ipipe-core-3.18.20-arm-5.patch} | 2095 ++--
 1 file changed, 167 insertions(+), 1928 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
similarity index 92%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
index e6360b7..6bded0c 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.20-arm-5.patch
@@ -1651,7 +1651,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..3c73753
+index 000..5c7e9bd
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1699,7 @@ index 000..3c73753
 +#include 
 +#include 
 +
-+#define IPIPE_CORE_RELEASE4
++#define IPIPE_CORE_RELEASE5
 +
 +struct ipipe_domain;
 +
@@ -3143,10 +3143,10 @@ index 705bb76..283d9da 100644
   */
  #if !defined(__KERNEL__)
 diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
-index 38ddd9f..ac4e2f8 100644
+index 2ecc7d1..5599d6e 100644
 --- a/arch/arm/kernel/Makefile
 +++ b/arch/arm/kernel/Makefile
-@@ -94,6 +94,8 @@ endif
+@@ -95,6 +95,8 @@ endif
  head-y:= head$(MMUEXT).o
  obj-$(CONFIG_DEBUG_LL)+= debug.o
  obj-$(CONFIG_EARLY_PRINTK)+= early_printk.o
@@ -3414,7 +3414,7 @@ index 2fd..a0cd9ce 100644
.if (. - \sym) & 3
.rept   4 - (. - \sym) & 3
 diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
-index 6bb09d4..91e4b89 100644
+index eb6f1927..7bef831 100644
 --- a/arch/arm/kernel/entry-common.S
 +++ b/arch/arm/kernel/entry-common.S
 @@ -2,6 +2,7 @@
@@ -3425,7 +3425,7 @@ index 6bb09d4..91e4b89 100644
   *
   * This program is free software; you can redistribute it and/or modify
   * it under the terms of the GNU General Public License version 2 as
-@@ -43,6 +44,42 @@ ret_fast_syscall:
+@@ -45,6 +46,42 @@ ret_fast_syscall:
ct_user_enter
  
restore_user_regs fast = 1, offset = S_OFF
@@ -3468,7 +3468,7 @@ index 6bb09d4..91e4b89 100644
   UNWIND(.fnend)
  
  /*
-@@ -72,12 +109,7 @@ ENTRY(ret_to_user_from_irq)
+@@ -74,12 +111,7 @@ ENTRY(ret_to_user_from_irq)
bne work_pending
  no_work_pending:
asm_trace_hardirqs_on
@@ -3482,7 +3482,7 @@ index 6bb09d4..91e4b89 100644
  ENDPROC(ret_to_user_from_irq)
  ENDPROC(ret_to_user)
  
-@@ -85,6 +117,7 @@ ENDPROC(ret_to_user)
+@@ -87,6 +119,7 @@ ENDPROC(ret_to_user)
   * This is how we return from a fork.
   */
  ENTRY(ret_from_fork)
@@ -3490,7 +3490,7 @@ index 6bb09d4..91e4b89 100644
bl  schedule_tail
cmp r5, #0
movne   r0, r4
-@@ -366,6 +399,16 @@ ENTRY(vector_swi)
+@@ -368,6 +401,16 @@ ENTRY(vector_swi)
str r0, [sp, #S_OLD_R0] @ Save OLD_R0
  #endif
zero_fp
@@ -3507,7 +3507,7 @@ index 6bb09d4..91e4b89 100644
alignment_trap r10, ip, __cr_alignment
enable_irq
ct_user_exit
-@@ -424,6 +467,57 @@ ENTRY(vector_swi)
+@@ -426,6 +469,57 @@ ENTRY(vector_swi)
  #endif
  
  local_restart:
@@ -3565,7 +3565,7 @@ index 6bb09d4..91e4b89 100644
ldr r10, [tsk, #TI_FLAGS]   @ check for syscall tracing
stmdb   sp!, {r4, r5}   @ push fifth and sixth args
  
-@@ -619,3 +713,28 @@ ENTRY(sys_oabi_call_table)
+@@ -621,3 +715,28 @@ ENTRY(sys_oabi_call_table)
  
  #endif
  
@@ -3719,10 +3719,10 @@ index 4176df7..8451be2 100644
   * have in theory up to 7 arguments to a function - r0 to r6.
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
-index 000..5187ab7
+index 000..9577fbb
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe.c
-@@ -0,0 +1,575 @@
+@@ -0,0 +1,560 @@
 +/* -*- linux-c -*-
 + * linux/arch/arm/kernel/ipipe.c
 + *
@@ -3959,21 +3959,6 @@ index 000..5187ab7
 +EXPORT_SYMBOL_GPL(smp_on_up);
 +#endif /* SMP_ON_UP */
 +
-+/*
-+ * ipipe_raise_irq() -- Push the interrupt at front of the pipeline
-+ * just like if it has been actually received from a hw source. Also
-+ * works for virtual interrupts.
-+ */
-+void ipipe_raise_irq(unsigned irq)
-+{
-+  unsigned long flags;
-+
-+  flags = hard_local_irq_save();
-+  __ipipe_dispatch_irq(irq, IPIPE_IRQF_NOACK);
-+  hard_local_irq_restore(flags);
-+}
-+EXPORT_SYMBOL_GPL(ipipe_raise_irq);
-+
 +int ipipe_get_sysinfo(struct

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-08-15 Thread git repository hosting

Module: xenomai-3
Branch: refs/tags/v3.0-rc7
Commit: 1f34e06120ccde12cd28a447289f2b5d859979bc
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=1f34e06120ccde12cd28a447289f2b5d859979bc

Author: Philippe Gerum r...@xenomai.org
Date:   Fri Mar 20 09:25:13 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 14.44-arm-11.patch = ipipe-core-3.14.44-arm-12.patch} |8 
 ...-3.18.12-arm-3.patch = ipipe-core-3.18.12-arm-4.patch} |   12 ++--
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
index eab2937..c44d632 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
@@ -1590,7 +1590,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..5ec5eff
+index 000..50e20e3
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1638,7 +1638,7 @@ index 000..5ec5eff
 +#include linux/jump_label.h
 +#include linux/ipipe_trace.h
 +
-+#define IPIPE_CORE_RELEASE11
++#define IPIPE_CORE_RELEASE12
 +
 +struct ipipe_domain;
 +
@@ -2863,7 +2863,7 @@ index 000..6579eec
 +
 +#endif
 diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index 8d6a089..d78ed9a 100644
+index 8d6a089..60c89d6 100644
 --- a/arch/arm/include/asm/setup.h
 +++ b/arch/arm/include/asm/setup.h
 @@ -53,4 +53,10 @@ extern int arm_add_memory(u64 start, u64 size);
@@ -2871,7 +2871,7 @@ index 8d6a089..d78ed9a 100644
  extern void dump_machine_table(void);
  
 +#ifdef CONFIG_IPIPE
-+void __init smp_build_cpu_revmap(void);
++void smp_build_cpu_revmap(void);
 +#else
 +static inline void smp_build_cpu_revmap(void) { }
 +#endif
diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
index ea9675d..e6360b7 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
@@ -1651,7 +1651,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..4701f8d
+index 000..3c73753
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1699,7 @@ index 000..4701f8d
 +#include linux/jump_label.h
 +#include linux/ipipe_trace.h
 +
-+#define IPIPE_CORE_RELEASE3
++#define IPIPE_CORE_RELEASE4
 +
 +struct ipipe_domain;
 +
@@ -2923,7 +2923,7 @@ index 000..6579eec
 +
 +#endif
 diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index e0adb9f..f024d86 100644
+index e0adb9f..5876f4b 100644
 --- a/arch/arm/include/asm/setup.h
 +++ b/arch/arm/include/asm/setup.h
 @@ -25,4 +25,10 @@ extern int arm_add_memory(u64 start, u64 size);
@@ -2931,7 +2931,7 @@ index e0adb9f..f024d86 100644
  extern void dump_machine_table(void);
  
 +#ifdef CONFIG_IPIPE
-+void __init smp_build_cpu_revmap(void);
++void smp_build_cpu_revmap(void);
 +#else
 +static inline void smp_build_cpu_revmap(void) { }
 +#endif
@@ -17772,7 +17772,7 @@ index 000..797a849
 +}
 diff --git a/kernel/ipipe/core.c b/kernel/ipipe/core.c
 new file mode 100644
-index 000..b8eb85c
+index 000..fba38fa
 --- /dev/null
 +++ b/kernel/ipipe/core.c
 @@ -0,0 +1,1890 @@
@@ -19030,7 +19030,7 @@ index 000..b8eb85c
 +   *   handling interrupts:
 +   *
 +   *   a) the root domain is alone, no registered head domain
-+   *  = all interrupts are delivered via the fast dispatcher.
++   *  = all interrupts go through the interrupt log
 +   *   b) a head domain is registered
 +   *  = head domain IRQs go through the fast dispatcher
 +   *  = root domain IRQs go through the interrupt log


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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-08-15 Thread git repository hosting

Module: xenomai-3
Branch: master
Commit: 1f34e06120ccde12cd28a447289f2b5d859979bc
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=1f34e06120ccde12cd28a447289f2b5d859979bc

Author: Philippe Gerum r...@xenomai.org
Date:   Fri Mar 20 09:25:13 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 14.44-arm-11.patch = ipipe-core-3.14.44-arm-12.patch} |8 
 ...-3.18.12-arm-3.patch = ipipe-core-3.18.12-arm-4.patch} |   12 ++--
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
index eab2937..c44d632 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-11.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.44-arm-12.patch
@@ -1590,7 +1590,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..5ec5eff
+index 000..50e20e3
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1638,7 +1638,7 @@ index 000..5ec5eff
 +#include linux/jump_label.h
 +#include linux/ipipe_trace.h
 +
-+#define IPIPE_CORE_RELEASE11
++#define IPIPE_CORE_RELEASE12
 +
 +struct ipipe_domain;
 +
@@ -2863,7 +2863,7 @@ index 000..6579eec
 +
 +#endif
 diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index 8d6a089..d78ed9a 100644
+index 8d6a089..60c89d6 100644
 --- a/arch/arm/include/asm/setup.h
 +++ b/arch/arm/include/asm/setup.h
 @@ -53,4 +53,10 @@ extern int arm_add_memory(u64 start, u64 size);
@@ -2871,7 +2871,7 @@ index 8d6a089..d78ed9a 100644
  extern void dump_machine_table(void);
  
 +#ifdef CONFIG_IPIPE
-+void __init smp_build_cpu_revmap(void);
++void smp_build_cpu_revmap(void);
 +#else
 +static inline void smp_build_cpu_revmap(void) { }
 +#endif
diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
index ea9675d..e6360b7 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-3.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.18.12-arm-4.patch
@@ -1651,7 +1651,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..4701f8d
+index 000..3c73753
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1699,7 +1699,7 @@ index 000..4701f8d
 +#include linux/jump_label.h
 +#include linux/ipipe_trace.h
 +
-+#define IPIPE_CORE_RELEASE3
++#define IPIPE_CORE_RELEASE4
 +
 +struct ipipe_domain;
 +
@@ -2923,7 +2923,7 @@ index 000..6579eec
 +
 +#endif
 diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
-index e0adb9f..f024d86 100644
+index e0adb9f..5876f4b 100644
 --- a/arch/arm/include/asm/setup.h
 +++ b/arch/arm/include/asm/setup.h
 @@ -25,4 +25,10 @@ extern int arm_add_memory(u64 start, u64 size);
@@ -2931,7 +2931,7 @@ index e0adb9f..f024d86 100644
  extern void dump_machine_table(void);
  
 +#ifdef CONFIG_IPIPE
-+void __init smp_build_cpu_revmap(void);
++void smp_build_cpu_revmap(void);
 +#else
 +static inline void smp_build_cpu_revmap(void) { }
 +#endif
@@ -17772,7 +17772,7 @@ index 000..797a849
 +}
 diff --git a/kernel/ipipe/core.c b/kernel/ipipe/core.c
 new file mode 100644
-index 000..b8eb85c
+index 000..fba38fa
 --- /dev/null
 +++ b/kernel/ipipe/core.c
 @@ -0,0 +1,1890 @@
@@ -19030,7 +19030,7 @@ index 000..b8eb85c
 +   *   handling interrupts:
 +   *
 +   *   a) the root domain is alone, no registered head domain
-+   *  = all interrupts are delivered via the fast dispatcher.
++   *  = all interrupts go through the interrupt log
 +   *   b) a head domain is registered
 +   *  = head domain IRQs go through the fast dispatcher
 +   *  = root domain IRQs go through the interrupt log


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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-07-27 Thread git repository hosting

Module: xenomai-3
Branch: master
Commit: 807152f5cd659160a0fb39f17e598a18822b483e
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=807152f5cd659160a0fb39f17e598a18822b483e

Author: Philippe Gerum r...@xenomai.org
Date:   Sun Jul 26 20:50:50 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...arm-9.patch = ipipe-core-3.10.32-arm-10.patch} |  122 +-
 ...rm-10.patch = ipipe-core-3.14.44-arm-11.patch} |  302 +-
 .../arch/arm/patches/ipipe-core-3.16.7-arm-8.patch |22371 
 ...-arm-2.patch = ipipe-core-3.18.12-arm-3.patch} |  202 +-
 4 files changed, 362 insertions(+), 22635 deletions(-)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=807152f5cd659160a0fb39f17e598a18822b483e

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-07-26 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: 807152f5cd659160a0fb39f17e598a18822b483e
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=807152f5cd659160a0fb39f17e598a18822b483e

Author: Philippe Gerum r...@xenomai.org
Date:   Sun Jul 26 20:50:50 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...arm-9.patch = ipipe-core-3.10.32-arm-10.patch} |  122 +-
 ...rm-10.patch = ipipe-core-3.14.44-arm-11.patch} |  302 +-
 .../arch/arm/patches/ipipe-core-3.16.7-arm-8.patch |22371 
 ...-arm-2.patch = ipipe-core-3.18.12-arm-3.patch} |  202 +-
 4 files changed, 362 insertions(+), 22635 deletions(-)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=807152f5cd659160a0fb39f17e598a18822b483e

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-06-29 Thread git repository hosting

Module: xenomai-3
Branch: master
Commit: 7cb2c02374b71f199a43e644f4aa256db8be4053
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=7cb2c02374b71f199a43e644f4aa256db8be4053

Author: Philippe Gerum r...@xenomai.org
Date:   Wed Jun 17 10:34:00 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-7.patch = ipipe-core-3.10.32-arm-9.patch} |   62 +-
 ...arm-8.patch = ipipe-core-3.14.39-arm-10.patch} |  105 +-
 ...7-arm-5.patch = ipipe-core-3.16.7-arm-8.patch} |  114 +-
 .../arm/patches/ipipe-core-3.18.12-arm-2.patch |25571 
 4 files changed, 25763 insertions(+), 89 deletions(-)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=7cb2c02374b71f199a43e644f4aa256db8be4053

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-06-17 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: 29d31191913de6089a843fcd4edf74fcd15c3978
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=29d31191913de6089a843fcd4edf74fcd15c3978

Author: Philippe Gerum r...@xenomai.org
Date:   Wed Jun 17 10:34:00 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 .../arm/patches/ipipe-core-3.18.12-arm-2.patch |25571 
 1 file changed, 25571 insertions(+)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=29d31191913de6089a843fcd4edf74fcd15c3978

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-06-17 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: 2b4bb8668dcc8900831cb6b00e07c5e5af22c62a
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=2b4bb8668dcc8900831cb6b00e07c5e5af22c62a

Author: Philippe Gerum r...@xenomai.org
Date:   Wed Jun 17 10:34:00 2015 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-7.patch = ipipe-core-3.10.32-arm-9.patch} |   62 +-
 ...arm-8.patch = ipipe-core-3.14.39-arm-10.patch} |  105 +-
 ...7-arm-5.patch = ipipe-core-3.16.7-arm-8.patch} |  114 +-
 .../arm/patches/ipipe-core-3.18.12-arm-2.patch |25571 
 4 files changed, 25763 insertions(+), 89 deletions(-)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=2b4bb8668dcc8900831cb6b00e07c5e5af22c62a

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-03-24 Thread git repository hosting

Module: xenomai-3
Branch: master
Commit: dc89691364d545218bc515fb95646f6c748a5ff6
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=dc89691364d545218bc515fb95646f6c748a5ff6

Author: Philippe Gerum r...@xenomai.org
Date:   Fri Mar 20 09:25:13 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 ...-arm-8.patch = ipipe-core-3.14.33-arm-8.patch} |   63 +++--
 ...6-arm-3.patch = ipipe-core-3.16.7-arm-5.patch} |  260 
 2 files changed, 142 insertions(+), 181 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.33-arm-8.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.14.33-arm-8.patch
index 6ed50be..d415abc 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.33-arm-8.patch
@@ -3096,7 +3096,7 @@ index ded0417..6ce9baa 100644
DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
  #ifdef CONFIG_SMP
 diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
-index 1879e8d..a608340 100644
+index 1879e8d..f6ef839 100644
 --- a/arch/arm/kernel/entry-armv.S
 +++ b/arch/arm/kernel/entry-armv.S
 @@ -4,6 +4,7 @@
@@ -3244,8 +3244,8 @@ index 1879e8d..a608340 100644
 +  get_thread_info tsk
 +  ldr r0, [tsk, #TI_IPIPE]
 +  tst r0, #_TIP_HEAD
-+ THUMB(   it eq)
-+  beq __ipipe_ret_to_user_irqs_disabled  @ Fast exit path over 
non-root domains
++ THUMB(   it ne)
++  bne __ipipe_ret_to_user_irqs_disabled  @ Fast exit path over 
non-root domains
 +#endif /* !CONFIG_IPIPE_LEGACY */
 +#else /* !CONFIG_IPIPE */
 +  get_thread_info tsk
@@ -3626,7 +3626,7 @@ index 88c6bab..cf2772a 100644
   * have in theory up to 7 arguments to a function - r0 to r6.
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
-index 000..0d3412d
+index 000..8a6c9bc
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe.c
 @@ -0,0 +1,575 @@
@@ -3841,7 +3841,7 @@ index 000..0d3412d
 +#ifdef CONFIG_SMP_ON_UP
 +struct static_key __ipipe_smp_key = STATIC_KEY_INIT_TRUE;
 +
-+unsigned __ipipe_processor_id(void)
++unsigned notrace __ipipe_processor_id(void)
 +{
 +  return raw_smp_processor_id();
 +}
@@ -4792,7 +4792,7 @@ index 0dd3b79..b56a680 100644
return 0;
  }
 diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
-index 1e8b030..c755375 100644
+index aab70f6..465dcb8 100644
 --- a/arch/arm/kernel/setup.c
 +++ b/arch/arm/kernel/setup.c
 @@ -465,16 +465,27 @@ void notrace cpu_init(void)
@@ -4853,7 +4853,7 @@ index 04d6388..f0616de 100644
} while (thread_flags  _TIF_WORK_MASK);
return 0;
 diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
-index b7b4c86..64f2adf 100644
+index 8cd3724..f1265b0 100644
 --- a/arch/arm/kernel/smp.c
 +++ b/arch/arm/kernel/smp.c
 @@ -69,8 +69,24 @@ enum ipi_msg_type {
@@ -4900,7 +4900,7 @@ index b7b4c86..64f2adf 100644
  
/*
 * All kernel threads share the same mm context; grab a
-@@ -500,6 +523,93 @@ u64 smp_irq_stat_cpu(unsigned int cpu)
+@@ -509,6 +532,93 @@ u64 smp_irq_stat_cpu(unsigned int cpu)
  }
  
  #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
@@ -4994,7 +4994,7 @@ index b7b4c86..64f2adf 100644
  void tick_broadcast(const struct cpumask *mask)
  {
smp_cross_call(mask, IPI_TIMER);
-@@ -565,9 +675,9 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
+@@ -574,9 +684,9 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
  
  #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
case IPI_TIMER:
@@ -5007,7 +5007,7 @@ index b7b4c86..64f2adf 100644
break;
  #endif
  
-@@ -576,35 +686,35 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
+@@ -585,35 +695,35 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
break;
  
case IPI_CALL_FUNC:
@@ -6677,7 +6677,7 @@ index 19fca1f..f8d6d6c 100644
  }
  CLK_OF_DECLARE(imx53_ccm, fsl,imx53-ccm, mx53_clocks_init);
 diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
-index 4d677f4..824107c 100644
+index 01a5765..d5f077a 100644
 --- a/arch/arm/mach-imx/clk-imx6q.c
 +++ b/arch/arm/mach-imx/clk-imx6q.c
 @@ -144,7 +144,7 @@ static void __init imx6q_clocks_init(struct device_node 
*ccm_node)
@@ -7658,7 +7658,7 @@ index 1f3770a..1119417 100644
return;
  
 diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
-index eefb30c..a9086b9 100644
+index 2b9cff9..d60cf7c 100644
 --- a/arch/arm/mach-omap2/pm44xx.c
 +++ b/arch/arm/mach-omap2/pm44xx.c
 @@ -133,7 +133,13 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, 
void *unused)
@@ -7694,7 +7694,7 @@ index b4c4ab9..795b538 100644
if (chip-irq_ack)
chip-irq_ack(desc-irq_data);
 diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
-index

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-03-20 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: dc89691364d545218bc515fb95646f6c748a5ff6
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=dc89691364d545218bc515fb95646f6c748a5ff6

Author: Philippe Gerum r...@xenomai.org
Date:   Fri Mar 20 09:25:13 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 ...-arm-8.patch = ipipe-core-3.14.33-arm-8.patch} |   63 +++--
 ...6-arm-3.patch = ipipe-core-3.16.7-arm-5.patch} |  260 
 2 files changed, 142 insertions(+), 181 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.33-arm-8.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.14.33-arm-8.patch
index 6ed50be..d415abc 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.33-arm-8.patch
@@ -3096,7 +3096,7 @@ index ded0417..6ce9baa 100644
DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
  #ifdef CONFIG_SMP
 diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
-index 1879e8d..a608340 100644
+index 1879e8d..f6ef839 100644
 --- a/arch/arm/kernel/entry-armv.S
 +++ b/arch/arm/kernel/entry-armv.S
 @@ -4,6 +4,7 @@
@@ -3244,8 +3244,8 @@ index 1879e8d..a608340 100644
 +  get_thread_info tsk
 +  ldr r0, [tsk, #TI_IPIPE]
 +  tst r0, #_TIP_HEAD
-+ THUMB(   it eq)
-+  beq __ipipe_ret_to_user_irqs_disabled  @ Fast exit path over 
non-root domains
++ THUMB(   it ne)
++  bne __ipipe_ret_to_user_irqs_disabled  @ Fast exit path over 
non-root domains
 +#endif /* !CONFIG_IPIPE_LEGACY */
 +#else /* !CONFIG_IPIPE */
 +  get_thread_info tsk
@@ -3626,7 +3626,7 @@ index 88c6bab..cf2772a 100644
   * have in theory up to 7 arguments to a function - r0 to r6.
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
-index 000..0d3412d
+index 000..8a6c9bc
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe.c
 @@ -0,0 +1,575 @@
@@ -3841,7 +3841,7 @@ index 000..0d3412d
 +#ifdef CONFIG_SMP_ON_UP
 +struct static_key __ipipe_smp_key = STATIC_KEY_INIT_TRUE;
 +
-+unsigned __ipipe_processor_id(void)
++unsigned notrace __ipipe_processor_id(void)
 +{
 +  return raw_smp_processor_id();
 +}
@@ -4792,7 +4792,7 @@ index 0dd3b79..b56a680 100644
return 0;
  }
 diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
-index 1e8b030..c755375 100644
+index aab70f6..465dcb8 100644
 --- a/arch/arm/kernel/setup.c
 +++ b/arch/arm/kernel/setup.c
 @@ -465,16 +465,27 @@ void notrace cpu_init(void)
@@ -4853,7 +4853,7 @@ index 04d6388..f0616de 100644
} while (thread_flags  _TIF_WORK_MASK);
return 0;
 diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
-index b7b4c86..64f2adf 100644
+index 8cd3724..f1265b0 100644
 --- a/arch/arm/kernel/smp.c
 +++ b/arch/arm/kernel/smp.c
 @@ -69,8 +69,24 @@ enum ipi_msg_type {
@@ -4900,7 +4900,7 @@ index b7b4c86..64f2adf 100644
  
/*
 * All kernel threads share the same mm context; grab a
-@@ -500,6 +523,93 @@ u64 smp_irq_stat_cpu(unsigned int cpu)
+@@ -509,6 +532,93 @@ u64 smp_irq_stat_cpu(unsigned int cpu)
  }
  
  #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
@@ -4994,7 +4994,7 @@ index b7b4c86..64f2adf 100644
  void tick_broadcast(const struct cpumask *mask)
  {
smp_cross_call(mask, IPI_TIMER);
-@@ -565,9 +675,9 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
+@@ -574,9 +684,9 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
  
  #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
case IPI_TIMER:
@@ -5007,7 +5007,7 @@ index b7b4c86..64f2adf 100644
break;
  #endif
  
-@@ -576,35 +686,35 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
+@@ -585,35 +695,35 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
break;
  
case IPI_CALL_FUNC:
@@ -6677,7 +6677,7 @@ index 19fca1f..f8d6d6c 100644
  }
  CLK_OF_DECLARE(imx53_ccm, fsl,imx53-ccm, mx53_clocks_init);
 diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
-index 4d677f4..824107c 100644
+index 01a5765..d5f077a 100644
 --- a/arch/arm/mach-imx/clk-imx6q.c
 +++ b/arch/arm/mach-imx/clk-imx6q.c
 @@ -144,7 +144,7 @@ static void __init imx6q_clocks_init(struct device_node 
*ccm_node)
@@ -7658,7 +7658,7 @@ index 1f3770a..1119417 100644
return;
  
 diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c
-index eefb30c..a9086b9 100644
+index 2b9cff9..d60cf7c 100644
 --- a/arch/arm/mach-omap2/pm44xx.c
 +++ b/arch/arm/mach-omap2/pm44xx.c
 @@ -133,7 +133,13 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, 
void *unused)
@@ -7694,7 +7694,7 @@ index b4c4ab9..795b538 100644
if (chip-irq_ack)
chip-irq_ack(desc-irq_data);
 diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
-index

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-02-12 Thread git repository hosting

Module: xenomai-3
Branch: master
Commit: 19f7ec147ef21fc2149a8afd405877d241bf43ac
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=19f7ec147ef21fc2149a8afd405877d241bf43ac

Author: Philippe Gerum r...@xenomai.org
Date:   Tue Jan  6 17:37:35 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 ...-arm-5.patch = ipipe-core-3.10.32-arm-7.patch} | 1174 +-
 ...-arm-4.patch = ipipe-core-3.14.17-arm-6.patch} | 1092 +-
 .../arch/arm/patches/ipipe-core-3.16-arm-1.patch   |22403 
 3 files changed, 23788 insertions(+), 881 deletions(-)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=19f7ec147ef21fc2149a8afd405877d241bf43ac

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-02-05 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: 38f49c12a0bf14e71aaea97f2ff04990d64f1d59
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=38f49c12a0bf14e71aaea97f2ff04990d64f1d59

Author: Philippe Gerum r...@xenomai.org
Date:   Thu Feb  5 09:04:43 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 ...-arm-6.patch = ipipe-core-3.14.28-arm-8.patch} |  305 
 1 file changed, 180 insertions(+), 125 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.17-arm-6.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch
similarity index 98%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.14.17-arm-6.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch
index dac5295..6ed50be 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.17-arm-6.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.14.28-arm-8.patch
@@ -88,10 +88,10 @@ index bd245d3..65f2238 100644
  extern unsigned long free_mem_ptr;
  extern unsigned long free_mem_end_ptr;
 diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
-index 066b034..9558765 100644
+index 8017cde..f6b8d68 100644
 --- a/arch/arm/boot/compressed/head.S
 +++ b/arch/arm/boot/compressed/head.S
-@@ -1263,6 +1263,15 @@ memdump:mov r12, r0
+@@ -1275,6 +1275,15 @@ memdump:mov r12, r0
mov pc, r10
  #endif
  
@@ -855,7 +855,7 @@ index 0704e0c..862504a 100644
  }
  
 diff --git a/arch/arm/include/asm/assembler.h 
b/arch/arm/include/asm/assembler.h
-index 5c22851..102adcb 100644
+index 5c22851..e285269 100644
 --- a/arch/arm/include/asm/assembler.h
 +++ b/arch/arm/include/asm/assembler.h
 @@ -95,6 +95,18 @@
@@ -877,7 +877,7 @@ index 5c22851..102adcb 100644
  #else
.macro  disable_irq_notrace
msr cpsr_c, #PSR_I_BIT | SVC_MODE
-@@ -103,10 +115,22 @@
+@@ -103,6 +115,18 @@
.macro  enable_irq_notrace
msr cpsr_c, #SVC_MODE
.endm
@@ -896,20 +896,6 @@ index 5c22851..102adcb 100644
  #endif
  
.macro asm_trace_hardirqs_off
--#if defined(CONFIG_TRACE_IRQFLAGS)
-+#if defined(CONFIG_TRACE_IRQFLAGS)  !defined(CONFIG_IPIPE)
-   stmdb   sp!, {r0-r3, ip, lr}
-   bl  trace_hardirqs_off
-   ldmia   sp!, {r0-r3, ip, lr}
-@@ -114,7 +138,7 @@
-   .endm
- 
-   .macro asm_trace_hardirqs_on_cond, cond
--#if defined(CONFIG_TRACE_IRQFLAGS)
-+#if defined(CONFIG_TRACE_IRQFLAGS)  !defined(CONFIG_IPIPE)
-   /*
-* actually the registers should be pushed and pop'd conditionally, but
-* after bl the flags are certainly clobbered
 diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
 index 62d2cb5..6216af3 100644
 --- a/arch/arm/include/asm/atomic.h
@@ -1596,7 +1582,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..76c7b6b
+index 000..128fc6a
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1644,7 +1630,7 @@ index 000..76c7b6b
 +#include linux/jump_label.h
 +#include linux/ipipe_trace.h
 +
-+#define IPIPE_CORE_RELEASE6
++#define IPIPE_CORE_RELEASE8
 +
 +struct ipipe_domain;
 +
@@ -2891,7 +2877,7 @@ index c99e259..317b6a4 100644
  
  #endif /* __ASM_ARM_SWITCH_TO_H */
 diff --git a/arch/arm/include/asm/thread_info.h 
b/arch/arm/include/asm/thread_info.h
-index 71a06b2..18d584a 100644
+index 3e635ee..b6c7fde 100644
 --- a/arch/arm/include/asm/thread_info.h
 +++ b/arch/arm/include/asm/thread_info.h
 @@ -26,6 +26,7 @@ struct exec_domain;
@@ -2902,7 +2888,7 @@ index 71a06b2..18d584a 100644
  
  typedef unsigned long mm_segment_t;
  
-@@ -77,7 +78,13 @@ struct thread_info {
+@@ -67,6 +68,11 @@ struct thread_info {
  #ifdef CONFIG_ARM_THUMBEE
unsigned long   thumbee_state;  /* ThumbEE Handler Base 
register */
  #endif
@@ -2912,11 +2898,9 @@ index 71a06b2..18d584a 100644
 +  struct ipipe_threadinfo ipipe_data;
 +
struct restart_blockrestart_block;
-+
-   struct arm_restart_blockarm_restart_block;
  };
  
-@@ -161,6 +168,10 @@ extern int vfp_restore_user_hwstate(struct user_vfp 
__user *,
+@@ -150,6 +156,10 @@ extern int vfp_restore_user_hwstate(struct user_vfp 
__user *,
  #define TIF_USING_IWMMXT  17
  #define TIF_MEMDIE18  /* is terminating due to OOM killer */
  #define TIF_RESTORE_SIGMASK   20
@@ -2927,7 +2911,7 @@ index 71a06b2..18d584a 100644
  
  #define _TIF_SIGPENDING   (1  TIF_SIGPENDING)
  #define _TIF_NEED_RESCHED (1  TIF_NEED_RESCHED)
-@@ -171,6 +182,9 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user 
*,
+@@ -160,6 +170,9 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user 
*,
  #define _TIF_SECCOMP  (1  TIF_SECCOMP)
  #define _TIF_USING_IWMMXT (1  TIF_USING_IWMMXT)
  
@@ -2937,7 +2921,7

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-02-04 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: 2b230cd8f42675cc3794c346e6f9955d18eef44b
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=2b230cd8f42675cc3794c346e6f9955d18eef44b

Author: Philippe Gerum r...@xenomai.org
Date:   Tue Feb  3 18:31:19 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 16-arm-1.patch = ipipe-core-3.16-arm-3.patch} |  240 +---
 1 file changed, 109 insertions(+), 131 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.16-arm-1.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.16-arm-3.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.16-arm-1.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.16-arm-3.patch
index c88def1..6d26885 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.16-arm-1.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.16-arm-3.patch
@@ -72,51 +72,6 @@ index 290f02ee..dc51f52 100644
  source kernel/Kconfig.preempt
  
  config HZ_FIXED
-diff --git a/arch/arm/Kconfig.rej b/arch/arm/Kconfig.rej
-new file mode 100644
-index 000..0f0d7c1
 /dev/null
-+++ b/arch/arm/Kconfig.rej
-@@ -0,0 +1,39 @@
-+--- arch/arm/Kconfig
- arch/arm/Kconfig
-+@@ -25,14 +25,15 @@
-+  select GENERIC_STRNCPY_FROM_USER
-+  select GENERIC_STRNLEN_USER
-+  select HARDIRQS_SW_RESEND
-++ select HAVE_ARCH_AUDITSYSCALL if (AEABI  !OABI_COMPAT)
-+  select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
-+  select HAVE_ARCH_KGDB
-+  select HAVE_ARCH_SECCOMP_FILTER if (AEABI  !OABI_COMPAT)
-+  select HAVE_ARCH_TRACEHOOK
-+  select HAVE_BPF_JIT
-++ select HAVE_CC_STACKPROTECTOR
-+  select HAVE_CONTEXT_TRACKING
-+  select HAVE_C_RECORDMCOUNT
-+- select HAVE_CC_STACKPROTECTOR
-+  select HAVE_DEBUG_KMEMLEAK
-+  select HAVE_DMA_API_DEBUG
-+  select HAVE_DMA_ATTRS
-+@@ -502,8 +493,8 @@
-+  bool IXP4xx-based
-+  depends on MMU
-+  select ARCH_HAS_DMA_SET_COHERENT_MASK
-+- select ARCH_SUPPORTS_BIG_ENDIAN
-+  select ARCH_REQUIRE_GPIOLIB
-++ select ARCH_SUPPORTS_BIG_ENDIAN
-+  select CLKSRC_MMIO
-+  select CPU_XSCALE
-+  select DMABOUNCE if PCI
-+@@ -714,8 +699,8 @@
-+ 
-+ config ARCH_S3C24XX
-+  bool Samsung S3C24XX SoCs
-+- select ARCH_HAS_CPUFREQ
-+  select ARCH_REQUIRE_GPIOLIB
-++ select ATAGS
-+  select CLKDEV_LOOKUP
-+  select CLKSRC_SAMSUNG_PWM
-+  select GENERIC_CLOCKEVENTS
 diff --git a/arch/arm/boot/compressed/decompress.c 
b/arch/arm/boot/compressed/decompress.c
 index bd245d3..65f2238 100644
 --- a/arch/arm/boot/compressed/decompress.c
@@ -1680,7 +1635,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..0aca4cf
+index 000..4701f8d
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,272 @@
@@ -1728,7 +1683,7 @@ index 000..0aca4cf
 +#include linux/jump_label.h
 +#include linux/ipipe_trace.h
 +
-+#define IPIPE_CORE_RELEASE1
++#define IPIPE_CORE_RELEASE3
 +
 +struct ipipe_domain;
 +
@@ -3196,7 +3151,7 @@ index 85598b5..e91850c 100644
DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
  #ifdef CONFIG_SMP
 diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
-index 52a949a..d7b848b 100644
+index 52a949a..bafe35e 100644
 --- a/arch/arm/kernel/entry-armv.S
 +++ b/arch/arm/kernel/entry-armv.S
 @@ -4,6 +4,7 @@
@@ -3328,7 +3283,24 @@ index 52a949a..d7b848b 100644
mov r2, r4
mov r3, r5
  
-@@ -676,7 +728,22 @@ __pabt_usr:
+@@ -539,6 +591,7 @@ call_fpe:
+   adr r6, .LCneon_arm_opcodes
+ 2:ldr r5, [r6], #4@ mask value
+   ldr r7, [r6], #4@ opcode bits matching in mask
++  disable_irq_cond
+   cmp r5, #0  @ end mask?
+   beq 1f
+   and r8, r0, r5
+@@ -549,6 +602,8 @@ call_fpe:
+   strbr7, [r10, #TI_USED_CP + 11] @ mark CP#11 as used
+   b   do_vfp  @ let VFP handler handle this
+ 1:
++#else
++  disable_irq_cond
+ #endif
+   tst r0, #0x0800 @ only CDP/CPRT/LDC/STC have 
bit 27
+   tstne   r0, #0x0400 @ bit 26 set on both ARM and 
Thumb-2
+@@ -676,7 +731,22 @@ __pabt_usr:
  ENTRY(ret_from_exception)
   UNWIND(.fnstart  )
   UNWIND(.cantunwind   )
@@ -3339,11 +3311,11 @@ index 52a949a..d7b848b 100644
 +  cmp r0, #1
 + THUMB(   it ne)
 +  bne __ipipe_ret_to_user_irqs_disabled  @ Fast exit path over 
non-root domains
-   get_thread_info tsk
-+#else /* !CONFIG_IPIPE_LEGACY */
 +  get_thread_info tsk
++#else /* !CONFIG_IPIPE_LEGACY */
+   get_thread_info tsk
 +  ldr r0, [tsk, #TI_IPIPE]
-+  tst r0, _TIP_HEAD
++  tst r0, #_TIP_HEAD
 + THUMB(

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2015-01-12 Thread git repository hosting

Module: xenomai-3
Branch: next
Commit: 19f7ec147ef21fc2149a8afd405877d241bf43ac
URL:
http://git.xenomai.org/?p=xenomai-3.git;a=commit;h=19f7ec147ef21fc2149a8afd405877d241bf43ac

Author: Philippe Gerum r...@xenomai.org
Date:   Tue Jan  6 17:37:35 2015 +0100

cobalt/arm: upgrade I-pipe support

---

 ...-arm-5.patch = ipipe-core-3.10.32-arm-7.patch} | 1174 +-
 ...-arm-4.patch = ipipe-core-3.14.17-arm-6.patch} | 1092 +-
 .../arch/arm/patches/ipipe-core-3.16-arm-1.patch   |22403 
 3 files changed, 23788 insertions(+), 881 deletions(-)

Diff:   
http://git.xenomai.org/?p=xenomai-3.git;a=commitdiff;h=19f7ec147ef21fc2149a8afd405877d241bf43ac

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2014-09-24 Thread git repository hosting

Module: xenomai-forge
Branch: master
Commit: f6cdb18e010bcff369aec9c745b5ef2316933ac9
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=f6cdb18e010bcff369aec9c745b5ef2316933ac9

Author: Philippe Gerum r...@xenomai.org
Date:   Tue Sep 23 09:11:35 2014 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-4.patch = ipipe-core-3.10.32-arm-5.patch} |   95 +---
 1 file changed, 63 insertions(+), 32 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-4.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-5.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-4.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-5.patch
index eac0028..d1ec606 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-4.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-5.patch
@@ -826,7 +826,7 @@ index 88d6181..b23d57c 100644
  
 diff --git a/arch/arm/include/asm/fcse.h b/arch/arm/include/asm/fcse.h
 new file mode 100644
-index 000..af67648
+index 000..1d42a30
 --- /dev/null
 +++ b/arch/arm/include/asm/fcse.h
 @@ -0,0 +1,201 @@
@@ -849,6 +849,12 @@ index 000..af67648
 +#ifndef __ASM_ARM_FCSE_H
 +#define __ASM_ARM_FCSE_H
 +
++#ifdef CONFIG_ARM_FCSE_DEBUG
++#define FCSE_BUG_ON(expr) BUG_ON(expr)
++#else /* !CONFIG_ARM_FCSE_DEBUG */
++#define FCSE_BUG_ON(expr) do { } while(0)
++#endif /* !CONFIG_ARM_FCSE_DEBUG */
++
 +#ifdef CONFIG_ARM_FCSE
 +
 +#include linux/mm_types.h   /* For struct mm_struct */
@@ -871,12 +877,6 @@ index 000..af67648
 +#define FCSE_NR_PIDS (TASK_SIZE / FCSE_PID_TASK_SIZE)
 +#define FCSE_PID_MAX (FCSE_NR_PIDS - 1)
 +
-+#ifdef CONFIG_ARM_FCSE_DEBUG
-+#define FCSE_BUG_ON(expr) BUG_ON(expr)
-+#else /* !CONFIG_ARM_FCSE_DEBUG */
-+#define FCSE_BUG_ON(expr) do { } while(0)
-+#endif /* !CONFIG_ARM_FCSE_DEBUG */
-+
 +struct vm_unmapped_area_info;
 +
 +extern unsigned long fcse_pids_cache_dirty[];
@@ -1076,7 +1076,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..112ab17
+index 000..233fbe1
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,274 @@
@@ -1124,13 +1124,13 @@ index 000..112ab17
 +#include linux/jump_label.h
 +#include linux/ipipe_trace.h
 +
-+#define IPIPE_CORE_RELEASE4
++#define IPIPE_CORE_RELEASE5
 +
 +struct ipipe_domain;
 +
-+#define IPIPE_TSC_TYPE_NONE   0
-+#define IPIPE_TSC_TYPE_FREERUNNING1
-+#define IPIPE_TSC_TYPE_DECREMENTER2
++#define IPIPE_TSC_TYPE_NONE   0
++#define IPIPE_TSC_TYPE_FREERUNNING1
++#define IPIPE_TSC_TYPE_DECREMENTER2
 +#define IPIPE_TSC_TYPE_FREERUNNING_COUNTDOWN  3
 +#define IPIPE_TSC_TYPE_FREERUNNING_TWICE  4
 +#define IPIPE_TSC_TYPE_FREERUNNING_ARCH   5
@@ -3032,10 +3032,10 @@ index 160f337..8d77bff 100644
   * have in theory up to 7 arguments to a function - r0 to r6.
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
-index 000..812b8ef
+index 000..5b77cfb
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe.c
-@@ -0,0 +1,627 @@
+@@ -0,0 +1,658 @@
 +/* -*- linux-c -*-
 + * linux/arch/arm/kernel/ipipe.c
 + *
@@ -3259,7 +3259,7 @@ index 000..812b8ef
 +  unsigned long flags;
 +
 +  printk(I-pipe: disabling SMP code\n);
-+  
++
 +  flags = hard_local_irq_save();
 +  static_key_slow_dec(__ipipe_smp_key);
 +  hard_local_irq_restore(flags);
@@ -3393,19 +3393,40 @@ index 000..812b8ef
 +  return ret;
 +}
 +
++#if __LINUX_ARM_ARCH__ = 5
++#define fast_irq_disable() hard_local_irq_save()
++#define fast_irq_enable(flags) hard_local_irq_restore(flags)
++#else
++#define fast_irq_disable()\
++  ({  \
++  hard_local_irq_disable();   \
++  0;  \
++  })
++#define fast_irq_enable(flags)\
++  ({  \
++  hard_local_irq_enable();\
++  (void)(flags);  \
++  })
++#endif
++
 +asmlinkage int __ipipe_syscall_root(unsigned long scno, struct pt_regs *regs)
 +{
++#ifdef CONFIG_OABI_COMPAT
++  const bool oabi = scno + __NR_SYSCALL_BASE != regs-ARM_r7;
++#elif defined(CONFIG_AEABI)
++  const bool oabi = false;
++#else /* OABI */
++  const bool oabi = true;
++#endif
++  struct task_struct *const task = current;
 +  struct ipipe_percpu_domain_data *p;
 +  unsigned long orig_r7;
++  unsigned long flags;
 +  int ret = 0;
 +
++#ifdef CONFIG_IPIPE_DEBUG_INTERNAL
 +  WARN_ON_ONCE(hard_irqs_disabled());
-+
-+  /*
-+   * We use r7 to pass the

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2014-09-23 Thread git repository hosting

Module: xenomai-forge
Branch: next
Commit: f6cdb18e010bcff369aec9c745b5ef2316933ac9
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=f6cdb18e010bcff369aec9c745b5ef2316933ac9

Author: Philippe Gerum r...@xenomai.org
Date:   Tue Sep 23 09:11:35 2014 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-4.patch = ipipe-core-3.10.32-arm-5.patch} |   95 +---
 1 file changed, 63 insertions(+), 32 deletions(-)

diff --git a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-4.patch 
b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-5.patch
similarity index 99%
rename from kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-4.patch
rename to kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-5.patch
index eac0028..d1ec606 100644
--- a/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-4.patch
+++ b/kernel/cobalt/arch/arm/patches/ipipe-core-3.10.32-arm-5.patch
@@ -826,7 +826,7 @@ index 88d6181..b23d57c 100644
  
 diff --git a/arch/arm/include/asm/fcse.h b/arch/arm/include/asm/fcse.h
 new file mode 100644
-index 000..af67648
+index 000..1d42a30
 --- /dev/null
 +++ b/arch/arm/include/asm/fcse.h
 @@ -0,0 +1,201 @@
@@ -849,6 +849,12 @@ index 000..af67648
 +#ifndef __ASM_ARM_FCSE_H
 +#define __ASM_ARM_FCSE_H
 +
++#ifdef CONFIG_ARM_FCSE_DEBUG
++#define FCSE_BUG_ON(expr) BUG_ON(expr)
++#else /* !CONFIG_ARM_FCSE_DEBUG */
++#define FCSE_BUG_ON(expr) do { } while(0)
++#endif /* !CONFIG_ARM_FCSE_DEBUG */
++
 +#ifdef CONFIG_ARM_FCSE
 +
 +#include linux/mm_types.h   /* For struct mm_struct */
@@ -871,12 +877,6 @@ index 000..af67648
 +#define FCSE_NR_PIDS (TASK_SIZE / FCSE_PID_TASK_SIZE)
 +#define FCSE_PID_MAX (FCSE_NR_PIDS - 1)
 +
-+#ifdef CONFIG_ARM_FCSE_DEBUG
-+#define FCSE_BUG_ON(expr) BUG_ON(expr)
-+#else /* !CONFIG_ARM_FCSE_DEBUG */
-+#define FCSE_BUG_ON(expr) do { } while(0)
-+#endif /* !CONFIG_ARM_FCSE_DEBUG */
-+
 +struct vm_unmapped_area_info;
 +
 +extern unsigned long fcse_pids_cache_dirty[];
@@ -1076,7 +1076,7 @@ index bb28af7..780ca50 100644
  static inline void sp804_clockevents_init(void __iomem *base, unsigned int 
irq, const char *name)
 diff --git a/arch/arm/include/asm/ipipe.h b/arch/arm/include/asm/ipipe.h
 new file mode 100644
-index 000..112ab17
+index 000..233fbe1
 --- /dev/null
 +++ b/arch/arm/include/asm/ipipe.h
 @@ -0,0 +1,274 @@
@@ -1124,13 +1124,13 @@ index 000..112ab17
 +#include linux/jump_label.h
 +#include linux/ipipe_trace.h
 +
-+#define IPIPE_CORE_RELEASE4
++#define IPIPE_CORE_RELEASE5
 +
 +struct ipipe_domain;
 +
-+#define IPIPE_TSC_TYPE_NONE   0
-+#define IPIPE_TSC_TYPE_FREERUNNING1
-+#define IPIPE_TSC_TYPE_DECREMENTER2
++#define IPIPE_TSC_TYPE_NONE   0
++#define IPIPE_TSC_TYPE_FREERUNNING1
++#define IPIPE_TSC_TYPE_DECREMENTER2
 +#define IPIPE_TSC_TYPE_FREERUNNING_COUNTDOWN  3
 +#define IPIPE_TSC_TYPE_FREERUNNING_TWICE  4
 +#define IPIPE_TSC_TYPE_FREERUNNING_ARCH   5
@@ -3032,10 +3032,10 @@ index 160f337..8d77bff 100644
   * have in theory up to 7 arguments to a function - r0 to r6.
 diff --git a/arch/arm/kernel/ipipe.c b/arch/arm/kernel/ipipe.c
 new file mode 100644
-index 000..812b8ef
+index 000..5b77cfb
 --- /dev/null
 +++ b/arch/arm/kernel/ipipe.c
-@@ -0,0 +1,627 @@
+@@ -0,0 +1,658 @@
 +/* -*- linux-c -*-
 + * linux/arch/arm/kernel/ipipe.c
 + *
@@ -3259,7 +3259,7 @@ index 000..812b8ef
 +  unsigned long flags;
 +
 +  printk(I-pipe: disabling SMP code\n);
-+  
++
 +  flags = hard_local_irq_save();
 +  static_key_slow_dec(__ipipe_smp_key);
 +  hard_local_irq_restore(flags);
@@ -3393,19 +3393,40 @@ index 000..812b8ef
 +  return ret;
 +}
 +
++#if __LINUX_ARM_ARCH__ = 5
++#define fast_irq_disable() hard_local_irq_save()
++#define fast_irq_enable(flags) hard_local_irq_restore(flags)
++#else
++#define fast_irq_disable()\
++  ({  \
++  hard_local_irq_disable();   \
++  0;  \
++  })
++#define fast_irq_enable(flags)\
++  ({  \
++  hard_local_irq_enable();\
++  (void)(flags);  \
++  })
++#endif
++
 +asmlinkage int __ipipe_syscall_root(unsigned long scno, struct pt_regs *regs)
 +{
++#ifdef CONFIG_OABI_COMPAT
++  const bool oabi = scno + __NR_SYSCALL_BASE != regs-ARM_r7;
++#elif defined(CONFIG_AEABI)
++  const bool oabi = false;
++#else /* OABI */
++  const bool oabi = true;
++#endif
++  struct task_struct *const task = current;
 +  struct ipipe_percpu_domain_data *p;
 +  unsigned long orig_r7;
++  unsigned long flags;
 +  int ret = 0;
 +
++#ifdef CONFIG_IPIPE_DEBUG_INTERNAL
 +  WARN_ON_ONCE(hard_irqs_disabled());
-+
-+  /*
-+   * We use r7 to pass the

[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2014-09-22 Thread git repository hosting

Module: xenomai-forge
Branch: next
Commit: 3835ce0856efbc053229b9c24b8db4d981720e3b
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=3835ce0856efbc053229b9c24b8db4d981720e3b

Author: Philippe Gerum r...@xenomai.org
Date:   Mon Sep 22 16:41:09 2014 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-1.patch = ipipe-core-3.10.32-arm-3.patch} |  846 +-
 .../arm/patches/ipipe-core-3.14.17-arm-3.patch |21854 
 2 files changed, 22481 insertions(+), 219 deletions(-)

Diff:   
http://git.xenomai.org/?p=xenomai-forge.git;a=commitdiff;h=3835ce0856efbc053229b9c24b8db4d981720e3b

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2014-09-22 Thread git repository hosting

Module: xenomai-forge
Branch: next
Commit: 0d66cec451e693c3d63f760117a0f50a679992f5
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=0d66cec451e693c3d63f760117a0f50a679992f5

Author: Philippe Gerum r...@xenomai.org
Date:   Mon Sep 22 16:41:09 2014 +0200

cobalt/arm: upgrade I-pipe support

---

 ...-arm-1.patch = ipipe-core-3.10.32-arm-4.patch} |  844 +-
 .../arm/patches/ipipe-core-3.14.17-arm-4.patch |21852 
 2 files changed, 22477 insertions(+), 219 deletions(-)

Diff:   
http://git.xenomai.org/?p=xenomai-forge.git;a=commitdiff;h=0d66cec451e693c3d63f760117a0f50a679992f5

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2014-02-16 Thread git repository hosting

Module: xenomai-forge
Branch: next
Commit: ed6f9bfefce8269a46f94f4febb623571e350cd3
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=ed6f9bfefce8269a46f94f4febb623571e350cd3

Author: Philippe Gerum r...@xenomai.org
Date:   Sun Feb 16 16:53:26 2014 +0100

cobalt/arm: upgrade I-pipe support

---

 .../arm/patches/ipipe-core-3.10.18-arm-1.patch |20870 
 1 file changed, 20870 insertions(+)

Diff:   
http://git.xenomai.org/?p=xenomai-forge.git;a=commitdiff;h=ed6f9bfefce8269a46f94f4febb623571e350cd3

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[Xenomai-git] Philippe Gerum : cobalt/arm: upgrade I-pipe support

2014-02-16 Thread git repository hosting

Module: xenomai-forge
Branch: next
Commit: 261255d54ef81127d26427f6f54e18f29738c190
URL:
http://git.xenomai.org/?p=xenomai-forge.git;a=commit;h=261255d54ef81127d26427f6f54e18f29738c190

Author: Philippe Gerum r...@xenomai.org
Date:   Sun Feb 16 16:53:26 2014 +0100

cobalt/arm: upgrade I-pipe support

---

 .../arm/patches/ipipe-core-3.10.18-arm-1.patch |20870 
 1 file changed, 20870 insertions(+)

Diff:   
http://git.xenomai.org/?p=xenomai-forge.git;a=commitdiff;h=261255d54ef81127d26427f6f54e18f29738c190

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