[PATCH] Cygwin/X: Fix windres rule for automake silent rules
From: Yaakov Selkowitz yselkow...@users.sourceforge.net Signed-off-by: Yaakov Selkowitz yselkow...@users.sourceforge.net --- hw/xwin/Makefile.am |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/xwin/Makefile.am b/hw/xwin/Makefile.am index 26cae92..6d8f823 100644 --- a/hw/xwin/Makefile.am +++ b/hw/xwin/Makefile.am @@ -152,7 +152,7 @@ XWin_DEPENDENCIES = $(XWIN_LIBS) XWin_LDADD = $(MULTIWINDOWEXTWM_LIBS) $(XWIN_LIBS) $(MAIN_LIB) $(XSERVER_LIBS) $(XSERVER_SYS_LIBS) $(XWIN_SYS_LIBS) .rc.o: - $(WINDRES) --use-temp-file -i $ --input-format=rc -o $@ -O coff -I $(top_builddir)/include + $(AM_V_GEN)$(WINDRES) --use-temp-file -i $ --input-format=rc -o $@ -O coff -I $(top_builddir)/include XWin_LDFLAGS = -mwindows -static -- 1.6.6.1 ___ xorg-devel mailing list xorg-devel@lists.x.org http://lists.x.org/mailman/listinfo/xorg-devel
Re: [PATCH] Cygwin/X: Fix windres rule for automake silent rules
Le 21/02/2010 09:10, Yaakov (Cygwin/X) a écrit : From: Yaakov Selkowitz yselkow...@users.sourceforge.net Signed-off-by: Yaakov Selkowitz yselkow...@users.sourceforge.net Reviewed-by: Rémi Cardona r...@gentoo.org Cheers ___ xorg-devel mailing list xorg-devel@lists.x.org http://lists.x.org/mailman/listinfo/xorg-devel
Improvements to Intel DDX for implementation of DRI2 OML_sync_control extensions.
This series of 2 patches fixes issues in the Intel DDX implementation of I830DRI2ScheduleWaitMSC() and I830DRI2ScheduleSwap(). The previous implementation should mostly work in the simple glXSwapBuffers() case, although it may reduce the maximum swaprate to half the video refresh interval, e.g., max 30 fps at a refresh of 60 Hz. It won't work correctly for the glXSwapBuffersMscOML(target_msc, divisor, remainder) case if divisor or remainder are non-zero or target_msc is not 2 frames ahead of the current vblank count. It doesn't handle the (msc % divisor) == remainder case correctly. A similar problem exists for calls to glXWaitForMscOML(). These patches should fix above issues, or at least make handling more robust. Jesse Barnes already had a look at these patches, but due to lack of suitable hardware, i haven't tested them myself, not even if they compile cleanly. Could somebody please give them some good testing and merge them if appropriate? Thanks, -mario ___ xorg-devel mailing list xorg-devel@lists.x.org http://lists.x.org/mailman/listinfo/xorg-devel
[PATCH xf86-video-intel 2/2] Fix handling of target_msc, divisor, remainder in I830DRI2ScheduleSwap()
The current code in I830DRI2ScheduleSwap() only schedules the
correct vblank events for the case divisor == 0, i.e., the
simple glXSwapBuffers() case.
In a glXSwapBuffersMscOML() request, divisor can be 0, which would go
wrong.
This modified code should handle target_msc, divisor, remainder and
the different cases defined in the OML_sync_control extension
correctly for the divisor 0 case.
It also tries to make sure that the effective framecount of swap satisfies
all constraints, taking the 1 frame delay in pageflipping mode and possible
delays in blitting/exchange mode due to DRM_VBLANK_NEXTONMISS into account.
The swap_interval logic in the X-Servers DRI2SwapBuffers() call expects
the returned swap_target from the DDX to be reasonably accurate, otherwise
implementation of swap_interval for the glXSwapBuffers() as defined in the
SGI_swap_interval extension may become unreliable.
For non-pageflipped mode, the returned swap_target is always correct due to the
adjustments done by drmWaitVBlank(), as DRM_VBLANK_NEXTONMISS is set.
In pageflipped mode, DRM_VBLANK_NEXTONMISS can't be used without
severe impact on performance, so the code in I830DRI2ScheduleSwap()
must make manual adjustments to the returned vbl.reply.sequence number.
This patch adds the needed adjustments.
Signed-off-by: Mario Kleiner mario.klei...@tuebingen.mpg.de
---
src/i830_dri.c | 110 +++
1 files changed, 70 insertions(+), 40 deletions(-)
diff --git a/src/i830_dri.c b/src/i830_dri.c
index d5e085a..f3cd739 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -586,6 +586,7 @@ I830DRI2ScheduleSwap(ClientPtr client, DrawablePtr draw,
DRI2BufferPtr front,
int ret, pipe = I830DRI2DrawablePipe(draw), flip = 0;
DRI2FrameEventPtr swap_info;
enum DRI2FrameEventType swap_type = DRI2_SWAP;
+ CARD64 current_msc;
swap_info = xcalloc(1, sizeof(DRI2FrameEventRec));
@@ -629,6 +630,8 @@ I830DRI2ScheduleSwap(ClientPtr client, DrawablePtr draw,
DRI2BufferPtr front,
return FALSE;
}
+ current_msc = vbl.reply.sequence;
+
/* Flips need to be submitted one frame before */
if (DRI2CanFlip(draw) !intel-shadow_present
intel-use_pageflipping) {
@@ -638,55 +641,81 @@ I830DRI2ScheduleSwap(ClientPtr client, DrawablePtr draw,
DRI2BufferPtr front,
swap_info-type = swap_type;
+ /* Correct target_msc by 'flip' if swap_type == DRI2_FLIP.
+* Do it early, so handling of different timing constraints
+* for divisor, remainder and msc vs. target_msc works.
+*/
+ if (*target_msc 0)
+ *target_msc -= flip;
+
/*
-* If divisor is zero, we just need to make sure target_msc passes
-* before waking up the client.
+* If divisor is zero, or current_msc is smaller than target_msc,
+* we just need to make sure target_msc passes before initiating the
swap.
*/
- if (divisor == 0) {
- vbl.request.type = DRM_VBLANK_NEXTONMISS |
- DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT;
- if (pipe 0)
- vbl.request.type |= DRM_VBLANK_SECONDARY;
-
- vbl.request.sequence = *target_msc;
- vbl.request.sequence -= flip;
- vbl.request.signal = (unsigned long)swap_info;
- ret = drmWaitVBlank(intel-drmSubFD, vbl);
- if (ret) {
- xf86DrvMsg(scrn-scrnIndex, X_WARNING,
- divisor 0 get vblank counter failed: %s\n,
- strerror(errno));
- return FALSE;
- }
-
- *target_msc = vbl.reply.sequence;
- swap_info-frame = *target_msc;
-
- return TRUE;
+ if (divisor == 0 || current_msc *target_msc) {
+ vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT;
+ /* If non-pageflipping, but blitting/exchanging, we need to use
+* DRM_VBLANK_NEXTONMISS to avoid unreliable timestamping later on.
+*/
+ if (flip == 0)
+ vbl.request.type |= DRM_VBLANK_NEXTONMISS;
+ if (pipe 0)
+ vbl.request.type |= DRM_VBLANK_SECONDARY;
+
+ /* If target_msc already reached or passed, set it to
+* current_msc to ensure we return a reasonable value back
+* to the caller. This makes swap_interval logic more robust.
+*/
+ if (current_msc = *target_msc)
+ *target_msc = current_msc;
+
+ vbl.request.sequence = *target_msc;
+ vbl.request.signal = (unsigned long)swap_info;
+ ret = drmWaitVBlank(intel-drmSubFD, vbl);
+ if (ret) {
+ xf86DrvMsg(scrn-scrnIndex, X_WARNING,
+ divisor 0 get vblank counter failed: %s\n,
+
[PATCH xf86-video-intel 1/2] Fix I830DRI2ScheduleWaitMSC() to correctly handle target_msc, divisor and remainder.
Previous code only handled divisor == 0 case correctly. This should
honor a given target_msc for the divisor 0 case and handle the
(msc % divisor) == remainder constraint correctly.
Signed-off-by: Mario Kleiner mario.klei...@tuebingen.mpg.de
---
src/i830_dri.c | 19 +++
1 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/src/i830_dri.c b/src/i830_dri.c
index e1c1470..d5e085a 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -756,6 +756,7 @@ I830DRI2ScheduleWaitMSC(ClientPtr client, DrawablePtr draw,
CARD64 target_msc,
DRI2FrameEventPtr wait_info;
drmVBlank vbl;
int ret, pipe = I830DRI2DrawablePipe(draw);
+CARD64 current_msc;
/* Drawable not visible, return immediately */
if (pipe == -1) {
@@ -785,11 +786,13 @@ I830DRI2ScheduleWaitMSC(ClientPtr client, DrawablePtr
draw, CARD64 target_msc,
return FALSE;
}
+current_msc = vbl.reply.sequence;
+
/*
- * If divisor is zero, we just need to make sure target_msc passes
- * before waking up the client.
+ * If divisor is zero, or current_msc is smaller than target_msc,
+ * we just need to make sure target_msc passes before waking up the client.
*/
-if (divisor == 0) {
+if (divisor == 0 || current_msc target_msc) {
vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT;
if (pipe 0)
vbl.request.type |= DRM_VBLANK_SECONDARY;
@@ -815,16 +818,16 @@ I830DRI2ScheduleWaitMSC(ClientPtr client, DrawablePtr
draw, CARD64 target_msc,
if (pipe 0)
vbl.request.type |= DRM_VBLANK_SECONDARY;
+vbl.request.sequence = current_msc - (current_msc % divisor) + remainder;
+
/*
- * If we have no remainder and the condition isn't satisified, it means
+ * If calculated remainder is larger than requested remainder, it means
* we've passed the last point where seq % divisor == remainder, so we need
* to wait for the next time that will happen.
*/
-if (((vbl.reply.sequence % divisor) != remainder) !remainder)
- vbl.request.sequence += divisor;
+if ((current_msc % divisor) remainder)
+ vbl.request.sequence += divisor;
-vbl.request.sequence = vbl.reply.sequence - (vbl.reply.sequence % divisor)
+
- remainder;
vbl.request.signal = (unsigned long)wait_info;
ret = drmWaitVBlank(intel-drmSubFD, vbl);
if (ret) {
--
1.6.6
___
xorg-devel mailing list
xorg-devel@lists.x.org
http://lists.x.org/mailman/listinfo/xorg-devel
[PATCH] RECORD patch, SetDeviceMode cleanup
Keith, please pull from my repo. Only two patches this time, the SetDeviceMode one and - finally - the patch re-enabling RECORD. Thanks. Cheers, Peter The following changes since commit 4e8bf12b13690afa6d9fee0e339d3819ef16fb3f: Jeremy Huddleston (1): XQuartz: Fix a possible buffer overrun in quartzAudio are available in the git repository at: git://people.freedesktop.org/~whot/xserver.git for-keith Chris Dekter (1): Re-enable RECORD extension. Peter Hutterer (1): Xi: assume BadMode for non-BadMatch errors returned from SetDeviceMode. Xi/exevents.c | 13 +++-- Xi/setmode.c | 10 dix/events.c | 15 +++--- include/dix.h |6 +- include/eventconvert.h |6 +- record/record.c| 123 +++- 6 files changed, 101 insertions(+), 72 deletions(-) ___ xorg-devel mailing list xorg-devel@lists.x.org http://lists.x.org/mailman/listinfo/xorg-devel
