Ethan Gardener writes:
> Is there an implementation of APL or a related language for Plan 9?
For pure APL, I don't think so. Long ago I ran the Thompson APL
interpreter on our Ultrix VAX. It was built from source, but I
forget which tape it came from. It would have been one of V7 or
4.2BSD,
Thanks Richard,
This looks like it fits the bill: open, small, simple. How was it formally
verified?
This doesn’t seem to need any of the chisel/scala suff, which is great.
How can I help with the compiler port? Which fpga board do you recommend?
Chris
On Sep 6, 2018, at 1:48 PM, Richard
Thank you. This is fantastic.
I've been looking into running Plan 9 in JSLinux (
https://bellard.org/jslinux/ and https://bellard.org/jslinux/tech.html)
and came across riscvemu (https://bellard.org/riscvemu/). I wonder if it
might be a useful for trying things on.
On Thu, Sep 6, 2018 at 10:48
> It could be, but after having looked briefly at the size of the design for
> RISC-V Rocket and especially BOOM I wonder if it's all overly complicated.
> They even built their own high level hardware language (Chisel) that
> generates Verilog using Scala. Yuck.
It's possible to build a simple
On 2009-07-10 I announced this in 9fans:
> There's a Plan 9 port of J 3.02 in /n/sources/contrib/miller/j/8.j
>
> 386 executable only, as I don't have permission to share source, but I can
> compile for other $objtypes on request.
I recall the port being very simple to do, so it would probably
and there is J, from the same stable as APL and its natural successor
but using only ascii characters:
http://www.jsoftware.com/ - sources under GPL v3 dual licence
On Thu, 6 Sep 2018 at 14:42, Ethan Gardener wrote:
>
> Is there an implementation of APL or a related language for Plan 9?
>
> --
On Sep 6, 2018, at 6:41 AM, Ethan Gardener wrote:
>
> Is there an implementation of APL or a related language for Plan 9?
http://t3x.org/klong/ Though it is not as nice as k or kona. Rob Pike’s
ivy may compile on plan9, it being implemented in go.
I know nothing of any pure APL for p9 or related systems,
but theres A+:
http://www.aplusdev.org/
which is GPLed, so could, theoretically, be ported.
On Sep 06, 2018, at 02:43 PM, Ethan Gardener wrote:
Is there an implementation of APL or a related language for Plan 9?
--
The lyf so short,
Is there an implementation of APL or a related language for Plan 9?
--
The lyf so short, the craft so long to lerne. -- Chaucer
On Thu, Sep 6, 2018, at 1:32 AM, Bakul Shah wrote:
> On Wed, 05 Sep 2018 07:42:52 -0400 Chris McGee wrote:
> > Could you get away with a much simpler, smaller hardware design and still
> > run Plan 9 in a reasonable way? Maybe one side of the software/hardware
> > divide has to take on more
> What one wants is Plan 9 as a
> model for what may be a family of hardware APIs. It makes sense to
> promote massive parallelism, but the API to it should be sufficiently
> simple for a single individual to manage.
>
This is the what I wonder about. Is this possible at the hardware level and
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