Hi,
Erik's thread about a 16-processor x86 machine convinced me to try something
related to spinlocks.
The current 9 spinlocks are portable code, calling an arch-provided tas() in
a loop to do their thing. On i386, Intel recommends 'PAUSE' in the core of a
spin-lock loop; I modified tas to PAUSE
In a crude test on a 1.5GHz p4 willamette with a local fossil/venti and
256mb of ram, 'time mk 'CONF=pcf' /dev/null' in /sys/src/9/pc, on a
fully-built source tree, adding the PAUSE reduced times from an average of
18.97s to 18.84s (across ten runs).
we tried this at coraid years ago. it's
2. if today 16 machs are possible (and 128 on an intel xeon mp 7500?
8 sockets * 8 core * 2t = 128), what do we expect in 5 years? 128?
www.seamicro.com
On Mon, Jun 21, 2010 at 9:28 AM, Lyndon Nerenberg lyn...@orthanc.ca wrote:
2. if today 16 machs are possible (and 128 on an intel xeon mp 7500?
8 sockets * 8 core * 2t = 128), what do we expect in 5 years? 128?
www.seamicro.com
There's a 100 core MIPS-like board available now too.
