Quoting Vinicius Tinti (2021-01-30 12:34:11)
> On Fri, Jan 29, 2021 at 08:55:54PM +0000, Chris Wilson wrote:
> > Quoting Vinicius Tinti (2021-01-29 18:15:19)
> > > By enabling -Wunreachable-code-aggressive on Clang the following code
> > > paths are unreachable.
&
Quoting Matt Roper (2021-01-30 00:16:20)
> PGTBL_ER (0x2024) isn't documented in the bspec of any recent (SNB+)
> platform; it seems this register was removed ages ago and we probably
> shouldn't still be trying to clear it at init or read it during error
> state dump.
We do support decoding of PG
Quoting Vinicius Tinti (2021-01-29 18:15:19)
> By enabling -Wunreachable-code-aggressive on Clang the following code
> paths are unreachable.
That code exists as commentary and, especially for sdvo, library
functions that we may need in future.
The ivb-gt1 case => as we now set the gt level for i
Quoting Vinicius Tinti (2021-01-29 18:15:19)
> By enabling -Wunreachable-code-aggressive on Clang the following code
> paths are unreachable.
That code exists as commentary and, especially for sdvo, library
functions that we may need in future.
The ivb-gt1 case => as we now set the gt level for i
Quoting Vinicius Tinti (2021-01-29 18:15:19)
> By enabling -Wunreachable-code-aggressive on Clang the following code
> paths are unreachable.
That code exists as commentary and, especially for sdvo, library
functions that we may need in future.
The ivb-gt1 case => as we now set the gt level for i
Quoting Maarten Lankhorst (2021-01-29 13:11:37)
> In reloc_iomap we swallow the -EDEADLK error, but this needs to
> be returned for -EDEADLK handling. Add the missing check to
> make bsw pass again.
What lock? You already have the pages reserved, why are we not just using
the earlier reservation.
Since userspace cannot run without any subslices, it seems remarkable
that any system would be configured with all fused off. Ignore the fuse
register if it says 0.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/3022
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt
Quoting Chris Wilson (2021-01-29 12:06:20)
> To capture a context after a gpu hang, we suspend the request and then
> resume its execution afterwards. If the context is already closed, we
> can assume that no one is interested in the result, but instead we are
> trying to termina
, do not waste time in suspending the request, capturing
the error, and just cancel it instead.
Testcase: igt/gem_ctx_persistence/many-contexts
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions
It appears that Elkhart Lake uses the same clock for CTX_TIMESTAMP as
CS_TIMESTAMP, leaving Icelake as the odd one out.
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3024
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c | 2 +-
1 file changed, 1
Quoting Jani Nikula (2021-01-29 11:12:02)
> On Thu, 28 Jan 2021, Matt Roper wrote:
> > From: Vandita Kulkarni
> >
> > Add the qp table for 444 formats, for 8bpc, 10bpc and 12bpc, as given by
> > the VESA C model for DSC 1.1
> >
> > Cc: Manasi Navare
> > Signed-off-by: Vandita Kulkarni
> > Signe
Quoting Matthew Brost (2021-01-28 22:56:04)
> On Mon, Jan 25, 2021 at 02:01:15PM +0000, Chris Wilson wrote:
> > Replace the priolist rbtree with a skiplist. The crucial difference is
> > that walking and removing the first element of a skiplist is O(1), but
> > O(lgN) for an
Quoting Tvrtko Ursulin (2021-01-29 09:37:27)
>
> On 28/01/2021 16:26, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-28 15:56:19)
>
> >>> -static void assert_priolists(struct i915_sched_engine * const se)
> >>> -{
> >>> -
Quoting Tvrtko Ursulin (2021-01-29 09:18:50)
>
>
> On 26/01/2021 13:05, Chris Wilson wrote:
> > The client id used is a cyclic allocator as that reduces the likelihood
> > of userspace seeing the same id used again (and so confusing the new
> > client as the old). Veri
t to update cmd accessible
reg whitelist")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Kevin Tian
Cc: Wang Zhi
Cc: Yan Zhao
Cc: Zhenyu Wang
Cc: Zhi Wang
---
drivers/gpu/drm/i915/gvt/cmd_parser.c | 93 ++-
1 file changed, 20 insertions(+), 73 deletions(-)
Use the right intel_gt stored as a backpointer in intel_vgpu.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gvt/execlist.c | 8 +++-
drivers/gpu/drm/i915/gvt/scheduler.c | 3 +--
2 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/execlist.c
b
Quoting Tvrtko Ursulin (2021-01-28 16:42:44)
>
> On 28/01/2021 16:26, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-28 15:56:19)
> >> On 25/01/2021 14:01, Chris Wilson wrote:
> >>> diff --git a/drivers/gpu/drm/i915/i915_priolist_type
Quoting Tvrtko Ursulin (2021-01-28 16:42:44)
>
> On 28/01/2021 16:26, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-28 15:56:19)
> >> On 25/01/2021 14:01, Chris Wilson wrote:
> >>>struct i915_priolist {
> >>>struct list_head r
This series still willfully breaks ABI resulting in iris aborting among
others, introduces an unrecoverable dos, despite knowing how to avoid
both.It is unconscionable that this design was not revised to avoid
such breakage, after being rejected.
-Chris
_
Quoting Tvrtko Ursulin (2021-01-28 15:56:19)
> On 25/01/2021 14:01, Chris Wilson wrote:
> > diff --git a/drivers/gpu/drm/i915/i915_priolist_types.h
> > b/drivers/gpu/drm/i915/i915_priolist_types.h
> > index bc2fa84f98a8..1200c3df6a4a 100644
> > --- a/drivers/gpu/drm
Quoting Tvrtko Ursulin (2021-01-28 11:35:59)
>
> On 25/01/2021 14:01, Chris Wilson wrote:
> > The first "scheduler" was a topographical sorting of requests into
> > priority order. The execution order was deterministic, the earliest
> > submitted, highest priori
Quoting Tvrtko Ursulin (2021-01-27 15:58:12)
> Okay makes sense. The change in key drives the requirement so just
> please mention in the commit message and I'll tackle the skip list
> mechanics in the meantime.
In the following patches, we introduce a new sort key to the scheduler,
a virtual de
Quoting Randy Dunlap (2021-01-27 20:28:05)
> On 1/27/21 11:30 AM, Randy Dunlap wrote:
> > On 1/27/21 11:08 AM, Randy Dunlap wrote:
> >> On 1/27/21 6:44 AM, Stephen Rothwell wrote:
> >>> Hi all,
> >>>
> >>> Note: the patch file has failed to upload :-(
> >>>
> >>> Changes since 20210125:
> >>>
> >>
Quoting Randy Dunlap (2021-01-27 20:28:05)
> On 1/27/21 11:30 AM, Randy Dunlap wrote:
> > On 1/27/21 11:08 AM, Randy Dunlap wrote:
> >> On 1/27/21 6:44 AM, Stephen Rothwell wrote:
> >>> Hi all,
> >>>
> >>> Note: the patch file has failed to upload :-(
> >>>
> >>> Changes since 20210125:
> >>>
> >>
Quoting Randy Dunlap (2021-01-27 20:28:05)
> On 1/27/21 11:30 AM, Randy Dunlap wrote:
> > On 1/27/21 11:08 AM, Randy Dunlap wrote:
> >> On 1/27/21 6:44 AM, Stephen Rothwell wrote:
> >>> Hi all,
> >>>
> >>> Note: the patch file has failed to upload :-(
> >>>
> >>> Changes since 20210125:
> >>>
> >>
Quoting Chris Wilson (2021-01-27 15:33:05)
> Quoting Tvrtko Ursulin (2021-01-27 15:10:43)
> >
> > On 25/01/2021 14:01, Chris Wilson wrote:
> > > Replace the priolist rbtree with a skiplist. The crucial difference is
> > > that walking and removing the first e
Quoting Tvrtko Ursulin (2021-01-27 15:10:43)
>
> On 25/01/2021 14:01, Chris Wilson wrote:
> > Replace the priolist rbtree with a skiplist. The crucial difference is
> > that walking and removing the first element of a skiplist is O(1), but
>
> I wasn't (and am
Quoting Pandey, Hariom (2021-01-27 15:10:53)
> Hi Chris,
>
> (i) To your concern on the GPU dying issue gitlab#2743 --> this issue has
> been resolved and not observed in last 3 runs --> The gitlab had been updated
> with the pass results and closed.
> (ii) RocketLate platform has been setup in
Quoting Tvrtko Ursulin (2021-01-27 14:50:19)
>
> On 27/01/2021 14:35, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-27 14:13:11)
> >>
> >> On 25/01/2021 14:01, Chris Wilson wrote:
> >>> Move the scheduler pretty printer from out of the exec
Quoting Tvrtko Ursulin (2021-01-27 14:13:11)
>
> On 25/01/2021 14:01, Chris Wilson wrote:
> > Move the scheduler pretty printer from out of the execlists state to
> > match its more common location.
> >
> > Signed-off-by: Chris Wilson
> > ---
> > driv
or GuC as well, in
> principle.
>
> A small comment or two below:
>
> On 25/01/2021 14:01, Chris Wilson wrote:
> > Move the scheduling tasklists out of the execlists backend into the
> > per-engine scheduling bookkeeping.
> >
> > Signed-off-by: Chris Wil
: Mika Kuoppala
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index b5f2459cac2c
Quoting Matthew Auld (2021-01-27 12:48:06)
> static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
> {
> struct drm_i915_private *i915 = gt->i915;
> @@ -167,6 +202,16 @@ static struct intel_memory_region *setup_lmem(struct
> intel_gt *gt)
>
struct intel_memory_region *mem)
> +{
> + u64 reserve_start;
> + u32 reserve_size;
> + int ret;
> +
> + if (!get_legacy_lowmem_region(uncore, &reserve_start, &reserve_size))
> + return 0;
> +
start as a copy of module parameters. */
Stick the mock
- i915->drm.pdev = pdev;
in this patch, and I'm happy.
With that, the series is
Reviewed-by: Chris Wilson
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
start as a copy of module parameters. */
Stick the mock
- i915->drm.pdev = pdev;
in this patch, and I'm happy.
With that, the series is
Reviewed-by: Chris Wilson
-Chris
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
Quoting Thomas Zimmermann (2021-01-27 12:41:31)
> diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> index 0188f877cab2..2a07a008de2e 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> +++ b/drivers/gpu/drm/i915/selft
Quoting Thomas Zimmermann (2021-01-27 12:41:31)
> diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> index 0188f877cab2..2a07a008de2e 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
> +++ b/drivers/gpu/drm/i915/selft
Quoting Chris Wilson (2021-01-27 12:19:38)
> Quoting Matthew Auld (2021-01-27 12:03:13)
> > From: Imre Deak
> >
> > On DG1 A0/B0 steppings the first 1MB of local memory must be reserved.
> > One reason for this is that the 0xA-0xB range is not accessible
&
Quoting Matthew Auld (2021-01-27 12:03:13)
> From: Imre Deak
>
> On DG1 A0/B0 steppings the first 1MB of local memory must be reserved.
> One reason for this is that the 0xA-0xB range is not accessible
> by the display, probably since this region is redirected to another
> memory location
Quoting Tvrtko Ursulin (2021-01-27 09:12:00)
>
> On 26/01/2021 22:04, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-26 16:47:14)
> >> On 26/01/2021 13:05, Chris Wilson wrote:
> >>> The client id used is a cyclic allocator as that reduces the likelihood
&
one fewer rq->engine pointer chasing we have to
eliminate later when we remove rq->engine.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
b/drivers/gpu/dr
-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c | 2 +-
drivers/gpu/drm/i915/i915_scheduler.c | 65 +
drivers/gpu/drm/i915/i915_scheduler.h | 2 +-
drivers/gpu/drm/i915/i915_scheduler_types.h | 2 +
4 files changed, 46 insertions(+), 25 deleti
Quoting Chris Wilson (2021-01-26 22:04:35)
> I do expect userspace to search for its own client/ upon creation, and I
> expect there to be many clients being opened at once. So I think so long
> as the use of the library readdir is correct (distinct processes with
> distinct direct
Quoting Tvrtko Ursulin (2021-01-26 16:47:14)
>
> On 26/01/2021 13:05, Chris Wilson wrote:
> > The client id used is a cyclic allocator as that reduces the likelihood
> > of userspace seeing the same id used again (and so confusing the new
> > client as the old). Verify tha
Quoting Andi Shyti (2021-01-26 17:34:48)
> Hi Chris,
>
> On Wed, Jan 20, 2021 at 12:22:05PM +0000, Chris Wilson wrote:
> > The core of the scheduling algorithm is that we compute the topological
> > order of the fence DAG. Knowing that we have a DAG, we should be able to
>
Quoting Andi Shyti (2021-01-26 18:05:38)
> On Wed, Jan 20, 2021 at 12:22:03PM +0000, Chris Wilson wrote:
> > As a topological sort, we expect it to run in linear graph time,
> > O(V+E). In removing the recursion, it is no longer a DFS but rather a
> > BFS, and performs as O(V
Quoting Andi Shyti (2021-01-26 17:18:22)
> Hi Chris,
>
> > + local_bh_disable();
> > + i915_request_set_priority(rq, prio);
> > + local_bh_enable();
> > +
> > + i915_request_put(rq);
> > + rq = ptr_mask_bits(rn, 1);
>
> why are you using
Quoting Tvrtko Ursulin (2021-01-26 17:13:24)
>
>
> On 06/01/2020 23:47, Matthew Auld wrote:
> > Attempt to split i915_gem_gtt.[ch] into more manageable chunks.
>
> > +void clear_pages(struct i915_vma *vma)
> > +{
> > + GEM_BUG_ON(!vma->pages);
> > +
> > + if (vma->pages != vma->obj->mm.p
Quoting Tvrtko Ursulin (2021-01-26 16:42:37)
>
> On 26/01/2021 16:26, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-26 16:22:58)
> >>
> >>
> >> On 25/01/2021 14:01, Chris Wilson wrote:
> >>> The core of the scheduling algorithm is that
Quoting Tvrtko Ursulin (2021-01-26 16:22:58)
>
>
> On 25/01/2021 14:01, Chris Wilson wrote:
> > The core of the scheduling algorithm is that we compute the topological
> > order of the fence DAG. Knowing that we have a DAG, we should be able to
> > use a DFS to comp
Quoting Matthew Auld (2021-01-26 15:12:59)
> From: Michel Thierry
>
> Prefer allocating the cmd ring from LMEM on dgfx.
>
> Signed-off-by: Michel Thierry
> Signed-off-by: Matthew Auld
Reviewed-by: Chris Wilson
-Chris
___
Inte
Quoting Matthew Auld (2021-01-26 15:12:57)
> Prefer allocating the context from LMEM on dgfx.
>
> Based on a patch from Michel Thierry.
>
> v2: flatten the chain
>
> Signed-off-by: Matthew Auld
Reviewed-by: Chris Wilson
-Chris
Quoting Matthew Auld (2021-01-26 15:12:56)
> From: Imre Deak
>
> On DG1 A0/B0 steppings the first 1MB of local memory must be reserved.
> One reason for this is that the 0xA-0xB range is not accessible
> by the display, probably since this region is redirected to another
> memory location
Quoting Matthew Auld (2021-01-26 15:12:55)
> From: Abdiel Janulgue
>
> In the following patch we need to reserve regions unaccessible to the
> driver during initialization, so add mem->reserved for collecting such
> regions.
>
> Cc: Imre Deak
> Signed-off-by: Abdiel Janulgue
> Signed-off-by: M
Quoting Matthew Auld (2021-01-26 15:12:54)
> From: CQ Tang
>
> The lmem region needs to remove the stolen part, which should just be a
> case of snipping it off the end.
>
> Signed-off-by: CQ Tang
> Signed-off-by: Matthew Auld
> ---
> drivers/gpu/drm/i915/gt/intel_region_lmem.c | 12 -
Quoting Chris Wilson (2021-01-26 15:22:15)
> Quoting Matthew Auld (2021-01-26 15:12:52)
> > Device local memory is very much a GT thing, therefore it should be the
> > responsibility of the GT to setup the device local memory region.
> >
> > Suggested-by: Tvrtko
Quoting Matthew Auld (2021-01-26 15:12:53)
> Hook up the LMEM region. Addresses will start from zero, and for CPU
> access we get LMEM_BAR which is just a 1:1 mapping of said region.
>
> Based on a patch from Michel Thierry.
>
> v2 by Jani:
> - use intel_uncore_read/intel_uncore_write
> - remove
Quoting Matthew Auld (2021-01-26 15:12:52)
> Device local memory is very much a GT thing, therefore it should be the
> responsibility of the GT to setup the device local memory region.
>
> Suggested-by: Tvrtko Ursulin
> Signed-off-by: Matthew Auld
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c
Quoting Chris Wilson (2021-01-25 21:46:19)
> Quoting Mike Rapoport (2021-01-25 21:33:48)
> > On Mon, Jan 25, 2021 at 12:49:39PM -0800, Linus Torvalds wrote:
> > > Mike: should we perhaps revert the first patch too (commit
> > > bde9cfa3afe4: "x86/setup: don&
next
Ta. Saves me having to do the fixup.
Reviewed-by: Chris Wilson
Will be applied to drm-intel-gt-next which is scheduled for inclusion in
5.13. It should apply against the 5.12 merge window if there's a tree
through which you want to migrate the tasklet API faster.
-Chris
Quoting Matthew Auld (2021-01-26 15:12:52)
> Device local memory is very much a GT thing, therefore it should be the
> responsibility of the GT to setup the device local memory region.
>
> Suggested-by: Tvrtko Ursulin
> Signed-off-by: Matthew Auld
> ---
> drivers/gpu/drm/i915/gt/intel_gt.c
next
Ta. Saves me having to do the fixup.
Reviewed-by: Chris Wilson
Will be applied to drm-intel-gt-next which is scheduled for inclusion in
5.13. It should apply against the 5.12 merge window if there's a tree
through which you want to migrate the tasklet API faster.
-Chris
___
next
Ta. Saves me having to do the fixup.
Reviewed-by: Chris Wilson
Will be applied to drm-intel-gt-next which is scheduled for inclusion in
5.13. It should apply against the 5.12 merge window if there's a tree
through which you want to migrate the tasklet API faster.
-Chris
_
Quoting Chris Wilson (2021-01-26 13:24:07)
> Quoting Tvrtko Ursulin (2021-01-26 13:15:29)
> >
> > On 26/01/2021 11:55, Chris Wilson wrote:
> > > Quoting Tvrtko Ursulin (2021-01-26 11:40:24)
> > >>
> > >> On 26/01/2021 11:30, Chris Wilson wrote:
>
Quoting Tvrtko Ursulin (2021-01-26 13:15:29)
>
> On 26/01/2021 11:55, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-26 11:40:24)
> >>
> >> On 26/01/2021 11:30, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2021-01-26 11:12:53)
> >>
The client id used is a cyclic allocator as that reduces the likelihood
of userspace seeing the same id used again (and so confusing the new
client as the old). Verify that each new client has an id greater than
the last.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
tests/i915
An earlier client from an old test may still be lingering and disappear
as we scan the sysfs. Be graceful and let it go without tripping over it.
Signed-off-by: Chris Wilson
---
tests/i915/sysfs_clients.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a
Quoting Tvrtko Ursulin (2021-01-26 11:40:24)
>
> On 26/01/2021 11:30, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2021-01-26 11:12:53)
> >>
> >>
> >> On 25/01/2021 14:01, Chris Wilson wrote:
> >>> +static void ipi_schedule(struct work_stru
Quoting Tvrtko Ursulin (2021-01-26 11:12:53)
>
>
> On 25/01/2021 14:01, Chris Wilson wrote:
> > +static void ipi_schedule(struct work_struct *wrk)
> > +{
> > + struct i915_sched_ipi *ipi = container_of(wrk, typeof(*ipi), work);
> > + struct i915_re
Quoting Matthew Auld (2021-01-26 10:38:09)
> On 26/01/2021 10:09, Tvrtko Ursulin wrote:
> >
> > On 26/01/2021 09:46, Matthew Auld wrote:
> >> +struct intel_memory_region *
> >> +i915_gem_setup_lmem(struct drm_i915_private *i915)
> >> +{
> >> + return setup_lmem(i915);
> >> +}
> >
> > Was it ev
The client id used is a cyclic allocator as that reduces the likelihood
of userspace seeing the same id used again (and so confusing the new
client as the old). Verify that each new client has an id greater than
the last.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
tests/i915
An earlier client from an old test may still be lingering and disappear
as we scan the sysfs. Be graceful and let it go without tripping over it.
Signed-off-by: Chris Wilson
---
tests/i915/sysfs_clients.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a
Quoting Matthew Auld (2021-01-26 09:46:07)
> @@ -162,7 +165,8 @@ setup_lmem(struct drm_i915_private *i915)
> drm_dbg(&i915->drm, "Intel graphics LMEM: %pR\n",
> &mem->region);
> drm_dbg(&i915->drm, "Intel graphics LMEM IO start: %pa\n",
> &m
Quoting Arnd Bergmann (2021-01-25 12:26:44)
> From: Arnd Bergmann
>
> CONFIG_DRM_I915_DEBUG now selects CONFIG_DRM_I915_WERROR, but fails
> to honor its dependencies:
>
> WARNING: unmet direct dependencies detected for DRM_I915_WERROR
> Depends on [n]: HAS_IOMEM [=y] && DRM_I915 [=m] && EXPERT
This reverts commit bde9cfa3afe4324ec251e4af80ebf9b7afaf7afe.
---
arch/x86/kernel/setup.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 3412c4595efd..740f3bdb3f61 100644
--- a/arch/x86/kernel/setup.
duals")
Testcase: igt/gem_render_tiled_blits # hsw-gt1
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Akeem G Abodunrin
---
drivers/gpu/drm/i915/gt/gen7_renderclear.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c
b/drivers/gpu/drm/i915/gt/gen7_ren
Ekstrand
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110998
Signed-off-by: Chris Wilson
Cc: Jason Ekstrand
Cc: Mika Kuoppala
Cc: Tvrtko Ursulin
Reviewed-by: Jason Ekstrand
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 8
drivers/gpu/drm/i915/i915_reg.h | 7
Ekstrand
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110998
Signed-off-by: Chris Wilson
Cc: Jason Ekstrand
Cc: Mika Kuoppala
Cc: Tvrtko Ursulin
Reviewed-by: Jason Ekstrand
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 8
drivers/gpu/drm/i915/i915_reg.h | 7
Quoting Mike Rapoport (2021-01-25 21:33:48)
> On Mon, Jan 25, 2021 at 12:49:39PM -0800, Linus Torvalds wrote:
> > On Mon, Jan 25, 2021 at 12:35 PM Chris Wilson
> > wrote:
> > >
> > > Quoting Linus Torvalds (2021-01-25 01:06:40)
> > > > Mike
This reverts commit bde9cfa3afe4324ec251e4af80ebf9b7afaf7afe.
---
arch/x86/kernel/setup.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 3412c4595efd..740f3bdb3f61 100644
--- a/arch/x86/kernel/setup.
Quoting Tvrtko Ursulin (2021-01-25 15:34:53)
>
> On 25/01/2021 14:00, Chris Wilson wrote:
> > @@ -390,24 +410,27 @@ bool __i915_sched_node_add_dependency(struct
> > i915_sched_node *node,
> > {
> > bool ret = false;
> >
> > - spin_lock_ir
Quoting Mike Rapoport (2021-01-25 21:04:56)
> On Mon, Jan 25, 2021 at 08:34:34PM +0000, Chris Wilson wrote:
> > Quoting Linus Torvalds (2021-01-25 01:06:40)
> > > Mike Rapoport (3):
> > ...
> > > mm: fix initialization of struct page for holes in memory lay
This reverts commit d3921cb8be29ce5668c64e23ffdaeec5f8c69399.
---
mm/page_alloc.c | 84 -
1 file changed, 34 insertions(+), 50 deletions(-)
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index 783913e41f65..519a60d5b6f7 100644
--- a/mm/page_alloc.c
Quoting Linus Torvalds (2021-01-25 01:06:40)
> Mike Rapoport (3):
...
> mm: fix initialization of struct page for holes in memory layout
We have half a dozen or so different machines in CI that are silently
failing to boot, that we believe is bisected to this patch.
17:56 tsa :
The client id used is a cyclic allocator as that reduces the likelihood
of userspace seeing the same id used again (and so confusing the new
client as the old). Verify that each new client has an id greater than
the last.
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
---
tests/i915
Instead of manipulating the object's cache domain, just use the device
coherent map to write the batch buffer.
Signed-off-by: Chris Wilson
---
.../drm/i915/gem/selftests/i915_gem_context.c| 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gp
Only perform the domain transition under the object lock, and push the
required waits to outside the lock.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 9 +-
drivers/gpu/drm/i915/gem/i915_gem_clflush.h | 2 -
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
Let's prefer to use explicit request tracking and bounded timeouts in
our selftests.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gt/selftest_workarounds.c| 106 +++---
1 file changed, 40 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i9
Since the vma's backing store is flushed upon first creation, remove the
manual calls to set-to-gtt-domain.
Signed-off-by: Chris Wilson
---
.../gpu/drm/i915/gem/selftests/i915_gem_mman.c | 16
drivers/gpu/drm/i915/selftests/i915_vma.c| 6 --
2 files change
.
Signed-off-by: Chris Wilson
---
.../i915/gem/selftests/i915_gem_client_blt.c | 26 ++-
1 file changed, 20 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
index
After the memory-region test completes, it flushes the test by calling
set-to-cpu-domain. Use the igt_flush_test as it includes a timeout,
recovery and reports and error for miscreant tests.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/selftests/intel_memory_region.c | 7 +++
1 file
In construction the rpcs_query batch we know that it is device coherent
and ready for execution, the set-to-gtt-domain here is redudant.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm
Set the cache coherency and status using the set-coherency helper.
Otherwise, we forget to mark the new pages as cache dirty.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a
Verify that one context running on engine A cannot manipulate another
client's context concurrently running on engine B using unprivileged
access.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 275 +
1 file changed, 238 insertions(+
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend. It already
operates on the common structs, so just a matter of moving and renaming.
Signed-off-by: Chris Wilson
---
.../drm/i915/gt/intel_execlists_submission.c | 55
Move the scheduler pretty printer from out of the execlists state to
match its more common location.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 34 +--
1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt
In the process of preparing to reuse the request submission logic for
other backends, lift it out of the execlists backend.
While this operates on the common structs, we do have a bit of backend
knowledge, which is harmless for !lrc but still unsightly.
Signed-off-by: Chris Wilson
---
drivers
The current implementation of walking the children of a deferred
requests lacks the backtracking required to reduce the dfs to linear.
Having pulled it from execlists into the common layer, we can reuse the
dfs code for priority inheritance.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915
Move the scheduling tasklists out of the execlists backend into the
per-engine scheduling bookkeeping.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gt/intel_engine.h| 14
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 11 ++--
drivers/gpu/drm/i915/gt/intel_engine_types.h
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