shiltian wrote:
> I would like to avoid adding additional special properties to AS0, or
> defining the flat concept.
How can we add a new specification w/o defining it?
> The simple solution is just have a switch over the target architecture in
> Attributor.
That means in the future when a n
shiltian wrote:
> Is there a value in not defining 0 as flat?
Like @AlexVlx mentioned, as well as the wording I put into `LangRef.rst`,
SPIR/SPIR-V uses AS 4 as flat AS.
> It's what we basically assume everywhere already, isn't it?
I don't think this is technically true, but it is unfortunate
shiltian wrote:
ping
https://github.com/llvm/llvm-project/pull/108786
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shiltian wrote:
> Why is that a DL property and not just a target property?
It is indeed a target property. DL is one choice here (if it is not the most
preferable one). Like I mentioned before, TTI and `TargetMachine` could have
been one, but not feasible. Where else do you suggest?
> Or eve
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https://github.com/llvm/llvm-project/pull/109366
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shiltian wrote:
The fix looks good. A test would be preferred.
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shiltian wrote:
It's a good idea to make it more generic. Potentially we can add an API like
`isAddressSpaceOptimizable(unsigned AS)`. If we want to do that, the question
would be, where to put this API? Like I mentioned in the description, I tried
some similar approach but they didn't pan out
shiltian wrote:
I like this direction and I think it should be the right way. However, IMHO, I
think it needs discussion (and potentially an RFC).
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shiltian wrote:
I'm not sure about this. What does `compiler-rt` provide?
https://github.com/llvm/llvm-project/pull/109152
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https://github.com/llvm/llvm-project/pull/108786
>From cad9ac7478a158c455b8865cab8bb553a46f7773 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Sep 2024 21:47:45 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108786
>From 3052d9ab2225f32f0bed254f3d6eb64a096f3d5e Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Sep 2024 21:47:45 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
shiltian wrote:
> Would it be possible to update the SPIR-V DataLayout(s) as well please?
> Caveat, those targets use 4 to denote Flat/Generic, see e.g.
> [here](https://github.com/llvm/llvm-project/blob/47c3df2a7fcdfb33064d4d5e7d82dde1ea379023/llvm/lib/Target/SPIRV/SPIRVUtils.cpp#L176)
> and
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108786
>From 4d86d8dc50b526ddca3de21709fe78ddafa7280e Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Sep 2024 21:47:45 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108786
>From 7b6a66d635fdb522d6fe0046157971f9d5112982 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Sep 2024 21:47:45 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108786
>From a4187bb5ca769ae3eac4dfe6ec57642640bb6e74 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Sep 2024 21:47:45 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
@@ -245,6 +246,7 @@ class DataLayout {
unsigned getDefaultGlobalsAddressSpace() const {
return DefaultGlobalsAddrSpace;
}
+ unsigned getFlatAddressSpace() const { return FlatAddressSpace; }
shiltian wrote:
I added an enum such that all the checks can
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108786
>From feadf29036d9157fec452343cf768a6b78d018e5 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Sep 2024 21:47:45 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108786
>From 89eb7686f8304b33a8cacb639ced6c229b70f6ea Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 17 Sep 2024 21:47:45 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
shiltian wrote:
Thank all for the valuable input. I changed the wording in `LangRef.rst`.
Hopefully it can make it more clear.
https://github.com/llvm/llvm-project/pull/108786
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>From 2546b9cef422ab60f75dfc1321a097ae22415a82 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 15 Sep 2024 21:53:50 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/109004
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@@ -3377,7 +3377,8 @@ static void encodeTypeForFunctionPointerAuth(const
ASTContext &Ctx,
#include "clang/Basic/HLSLIntangibleTypes.def"
case BuiltinType::Dependent:
llvm_unreachable("should never get here");
-case BuiltinType::AMDGPUBufferRsrc:
+#define AMDGPU_T
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shiltian wrote:
> Just to clarify, does this mean any two non-flat address space pointers
> _cannot_ alias?
If I read it correctly, it is equivalent to ask, whether an AS X pointer can
alias an AS Y pointer, assuming neither X nor Y is the flat address space. I
think that is orthogonal to thi
@@ -245,6 +246,7 @@ class DataLayout {
unsigned getDefaultGlobalsAddressSpace() const {
return DefaultGlobalsAddrSpace;
}
+ unsigned getFlatAddressSpace() const { return FlatAddressSpace; }
shiltian wrote:
@arsenm made a point in
https://github.com/l
shiltian wrote:
I updated the PR description. Hopefully it can make the motivation of this
patch more clear. I think the central question is, why it can't be just address
space 0. I don't have a clear answer to that. @arsenm first introduced this
concept to LLVM at least 8 years ago. I agree t
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@@ -245,6 +246,7 @@ class DataLayout {
unsigned getDefaultGlobalsAddressSpace() const {
return DefaultGlobalsAddrSpace;
}
+ unsigned getFlatAddressSpace() const { return FlatAddressSpace; }
shiltian wrote:
It is optional from a target's perspective, b
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108713
>From 0518fe9d148b371a1a148032f3738fb2fe4fd927 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 15 Sep 2024 21:53:50 -0400
Subject: [PATCH 1/3] [IR] Introduce `T` to `DataLayout` to
represent flat address
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/108786
>From 0518fe9d148b371a1a148032f3738fb2fe4fd927 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 15 Sep 2024 21:53:50 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat address spa
@@ -66,12 +66,12 @@ NVPTXTargetInfo::NVPTXTargetInfo(const llvm::Triple &Triple,
HasFloat16 = true;
if (TargetPointerWidth == 32)
-resetDataLayout("e-p:32:32-i64:64-i128:128-v16:16-v32:32-n16:32:64");
+resetDataLayout("e-p:32:32-i64:64-i128:128-v16:16-v32:32-n16:32
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@@ -579,7 +579,7 @@ static StringRef computeDataLayout(const Triple &TT) {
"-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-"
"v32:32-v48:64-v96:"
"128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-"
- "G
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shiltian wrote:
* **#108786** https://app.graphite.dev/github/pr/llvm/llvm-project/108786?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
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None
>From 56b15c3dc7d0b6967047c6cc79ef2145a93f8dfc Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 15 Sep 2024 21:53:50 -0400
Subject: [PATCH] [IR] Introduce `T` to `DataLayout` to
represent flat addre
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https://github.com/llvm/llvm-project/pull/104661
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@@ -45,7 +45,7 @@ void test3(packedfloat3 *p) {
*p = (packedfloat3) { 3.2f, 2.3f, 0.1f };
}
// CHECK: @test3(
-// CHECK: store <4 x float> {{.*}}, align 4
+// CHECK: store <3 x float> {{.*}}, align 4
shiltian wrote:
Then I guess this can be more general: add
https://github.com/shiltian approved this pull request.
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@@ -0,0 +1,136 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1200 < %s | FileCheck
--check-prefixes=GCN,SDAG %s
+; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1200 < %s
@@ -0,0 +1,136 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1200 < %s | FileCheck
--check-prefixes=GCN,SDAG %s
+; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1200 < %s
@@ -45,7 +45,7 @@ void test3(packedfloat3 *p) {
*p = (packedfloat3) { 3.2f, 2.3f, 0.1f };
}
// CHECK: @test3(
-// CHECK: store <4 x float> {{.*}}, align 4
+// CHECK: store <3 x float> {{.*}}, align 4
shiltian wrote:
Does it make sense to move the logic to ba
@@ -45,7 +45,7 @@ void test3(packedfloat3 *p) {
*p = (packedfloat3) { 3.2f, 2.3f, 0.1f };
}
// CHECK: @test3(
-// CHECK: store <4 x float> {{.*}}, align 4
+// CHECK: store <3 x float> {{.*}}, align 4
shiltian wrote:
Hmm, that sounds essentially what the opti
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@@ -19489,6 +19489,12 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
F, {EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)),
EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3))});
}
+ case AMDGPU::BI__builtin_amdgcn_s
@@ -19489,6 +19489,12 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned
BuiltinID,
F, {EmitScalarExpr(E->getArg(0)), EmitScalarExpr(E->getArg(1)),
EmitScalarExpr(E->getArg(2)), EmitScalarExpr(E->getArg(3))});
}
+ case AMDGPU::BI__builtin_amdgcn_s
@@ -45,7 +45,7 @@ void test3(packedfloat3 *p) {
*p = (packedfloat3) { 3.2f, 2.3f, 0.1f };
}
// CHECK: @test3(
-// CHECK: store <4 x float> {{.*}}, align 4
+// CHECK: store <3 x float> {{.*}}, align 4
shiltian wrote:
So what is the conclusion here? Do we want
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@@ -0,0 +1,12 @@
+// RUN: clang -x hip -O3 -fgpu-rdc %s -mllvm -debug-only=amdgpu-attributor -o
- | FileCheck %s
shiltian wrote:
This should not be a clang test. You can have an opt test.
https://github.com/llvm/llvm-project/pull/105845
https://github.com/shiltian requested changes to this pull request.
Oops, replied the wrong PR. Sorry.
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LGTM with one nit
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@@ -761,7 +761,8 @@ void
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
if (EnableLowerModuleLDS)
PM.addPass(AMDGPULowerModuleLDSPass(*this));
if (EnableAMDGPUAttributor && Level != OptimizationLevel::O0)
- PM.addPass(AM
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* **#104661** https://app.graphite.dev/github/pr/llvm/llvm-project/104661?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
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https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/104661
Clang uses a long-time special handling of the case where 3 element vector
loads
and stores are performed as 4 element, and then a shufflevector is used to
extract
the used elements. Odd sized vector codegen
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shiltian wrote:
@alexey-bataev any other comment?
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shiltian wrote:
ping
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shiltian wrote:
The BB failures look unrelated to the PR.
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>From 5f168adb3ce6935ad4d0c48ee29285a2a1053d74 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 9 Aug 2024 23:11:43 -0400
Subject: [PATCH] [Clang][OpenMP] Fix the wrong transform of `num_teams`
claused in
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/102716
>From 838e1ccc1593a12107fd96b36eea048dd9d38869 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 9 Aug 2024 23:11:43 -0400
Subject: [PATCH] [Clang][OpenMP] Fix the wrong transform of `num_teams`
claused in
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/102717
>From 998bb28ebbb72eccbf4461ba456bbc07499f10d4 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 9 Aug 2024 23:25:21 -0400
Subject: [PATCH] [Clang][OMPX] Add the code generation for multi-dim
`thread_limit
shiltian wrote:
> > > A test is required
> >
> >
> > I literally don't know how to test this TBH. I think our current OpenMP
> > tests generally don't cover this at all.
>
> They do. To test this, you need to use clause in the template and check that
> template params successfully replaced u
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/102717
>From 323ab9b867ade1b029bf55bff07d71abfc9d09ac Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 9 Aug 2024 23:25:21 -0400
Subject: [PATCH] [Clang][OMPX] Add the code generation for multi-dim
`thread_limit
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shiltian wrote:
> A test is required
I literally don't know how to test this TBH. I think our current OpenMP tests
generally don't cover this at all.
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>From fd59f45bbe6912e3683f4a684fccdcc459bdd58a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 9 Aug 2024 22:14:36 -0400
Subject: [PATCH] [Clang][Sema][OpenMP] Allow `thread_limit` to accept multiple
exp
shiltian wrote:
* **#102716** https://app.graphite.dev/github/pr/llvm/llvm-project/102716?utm_source=stack-comment-icon";
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>From 2850033e440d7c43fcd7bdf55ed05de482697eaa Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 9 Aug 2024 23:11:43 -0400
Subject: [PATCH] [Clang][OpenMP] Fix the wrong transform of `num_teams`
clau
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https://github.com/llvm/llvm-project/pull/102715
>From ef8bfef43762120d25dda14ff003a322f63d4898 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 9 Aug 2024 22:14:36 -0400
Subject: [PATCH] [Clang][Sema][OpenMP] Allow `thread_limit` to accept multiple
exp
shiltian wrote:
* **#102715** https://app.graphite.dev/github/pr/llvm/llvm-project/102715?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
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>From 9925e4dc538ffddb86ceff2cc068e3f1ba9f0602 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 9 Aug 2024 22:14:36 -0400
Subject: [PATCH] [Clang][Sema][OpenMP] Allow `thread_limit` to accept multipl
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/101407
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shiltian wrote:
This PR is no longer needed. We decided to move the `AMDGPUAttributorPass` to
full LTO.
https://github.com/llvm/llvm-project/pull/100953
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https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/100953
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/100953
>From 0110da5be4f0430826bac7ede96bc71b238ef0fc Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 28 Jul 2024 15:28:09 -0400
Subject: [PATCH] [LLVM][PassBuilder] Extend the function signature of callback
fo
shiltian wrote:
This PR will not be needed if we decide to move `AMDGPUAttributorPass` to full
LTO stage (https://github.com/llvm/llvm-project/pull/102086).
https://github.com/llvm/llvm-project/pull/100953
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https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/99732
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@@ -363,5 +363,7 @@ considered for standardization. Please post on the
| device extension | `'ompx_bare' clause on 'target teams'
construct | :good:`prototyped` |
#66844, #70612 |
|
Author: Shilei Tian
Date: 2024-08-06T13:28:35-04:00
New Revision: 31a999c1ad2e24e16b85915b2a47b91627644a9e
URL:
https://github.com/llvm/llvm-project/commit/31a999c1ad2e24e16b85915b2a47b91627644a9e
DIFF:
https://github.com/llvm/llvm-project/commit/31a999c1ad2e24e16b85915b2a47b91627644a9e.diff
L
@@ -3332,6 +3331,13 @@ OMPClause *Parser::ParseOpenMPClause(OpenMPDirectiveKind
DKind,
? ParseOpenMPSimpleClause(CKind, WrongDirective)
: ParseOpenMPClause(CKind, WrongDirective);
break;
+ case OMPC_num_teams:
+if (!FirstClause) {
+
Author: Shilei Tian
Date: 2024-08-06T12:45:29-04:00
New Revision: 0c2ded670652c73cb0245b2a8ec065cd1b4f0c6f
URL:
https://github.com/llvm/llvm-project/commit/0c2ded670652c73cb0245b2a8ec065cd1b4f0c6f
DIFF:
https://github.com/llvm/llvm-project/commit/0c2ded670652c73cb0245b2a8ec065cd1b4f0c6f.diff
L
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/101407
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https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/99732
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/99732
>From f9e58d7acdd6a61a811c838efa2aae377233c608 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 19 Jul 2024 22:07:06 -0400
Subject: [PATCH] [Clang][OpenMP] Allow `num_teams` to accept multiple
expressions
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/99732
>From 0bd0ff8f905c4e430c7203cede19d7e2179d89ef Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 19 Jul 2024 22:07:06 -0400
Subject: [PATCH] [Clang][OpenMP] Allow `num_teams` to accept multiple
expressions
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/99732
>From d27b78670ae334bd05c845d14512ee1e3e8d077b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 19 Jul 2024 22:07:06 -0400
Subject: [PATCH] [Clang][OpenMP] Allow `num_teams` to accept multiple
expressions
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/99732
>From 1ddc3ba30a0aadf69e66082c1edc434c6e9bd6d5 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 19 Jul 2024 22:07:06 -0400
Subject: [PATCH] [Clang][OpenMP] Allow `num_teams` to accept multiple
expressions
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/99732
>From c983a11e3d317714e4fe7abbcaf46efeda4a7516 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 19 Jul 2024 22:07:06 -0400
Subject: [PATCH] [Clang][OpenMP] Allow `num_teams` to accept multiple
expressions
shiltian wrote:
ping +1
https://github.com/llvm/llvm-project/pull/100953
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