Re: [PATCH 25/81] drm/amd/display: Remove unblanaced drm_vblank_put.

2017-07-25 Thread Michel Dänzer
m_atomic_state_put(state); > > return ret; > backoff: > This kind of fixup should generally be squashed into the previous patch which introduced the bug. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast

[PATCH xf86-video-amdgpu 03/10] Create drmmode_wait_vblank helper

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Allows cleaning up the code considerably. (Ported from radeon commit 99f1d7a474af3683fe1a66f50c0bb8935478ff0a) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/amdgpu_dri

[PATCH xf86-video-amdgpu 02/10] Pass reference CRTC to amdgpu_do_pageflip directly

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Simplifies the code slightly. (Ported from radeon commit 49cc61ab970ee28d4509b4e2dd0a57165136889f) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/amdgpu_dri2.c | 4 +--- src/amdgpu_present.c | 6 ++ src/drmmo

[PATCH xf86-video-amdgpu 01/10] Remove drmmode_crtc->scanout_destroy[] array

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> No longer necessary since we're reference counting framebuffers. (Ported from radeon commit 3f120fa1d5d921656a367751bc079e020e9ab105) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/drmmode_display.c | 22 ---

[PATCH xf86-video-amdgpu 05/10] Wait for pending flips synchronously before turning off a CRTC

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Allows removing drmmode_clear_pending_flip and the pending_dpms_mode field and cleaning up the code considerably. (Ported from radeon commit e6d7dc2070f4d21a6900916bb70a31839112882c) Signed-off-by: Michel Dänzer <michel.daen...@amd.com&

[PATCH xf86-video-amdgpu 08/10] Pass extents to amdgpu_scanout_do_update

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Preparation for following change, no functional change intended yet. (Ported from radeon commit 65e0c5ea1b4adff21d673dbf54af99704c429627) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/amdgpu_drv.h | 2 +- src/

[PATCH xf86-video-amdgpu 06/10] Handle multiple "pending" Present flips

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> The xserver Present code can submit a flip in response to notifying it that a vblank event arrived. This can happen before the completion event of the previous flip is processed. In that case, we were clearing the drmmode_crtc->flip_pend

[PATCH xf86-video-amdgpu 09/10] Always allow Present page flipping with TearFree

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Even if TearFree is active for the the CRTC we're synchronizing to. In that case, for Present flips synchronized to vertical blank, the other scanout buffer is immediately synchronized and flipped to during the target vertical blank period. For P

[PATCH xf86-video-amdgpu 2/3] Use xorg_list_append for the DRM event list

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> We were adding entries at the start of the list, i.e. the list was ordered from most recently added to least recently added. However, the corresponding DRM events are generally expected to arrive in the same order as they are queued, which

[PATCH xf86-video-amdgpu 3/3] Make amdgpu_scanout_do_update take a PixmapPtr instead of a DrawablePtr

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> All callers were already passing in a pixmap. This allows simplifying the rotated scanout case slightly. (Ported from radeon commit d822a0f47070374ad0c1a97b559bae27724dc52a) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/

[PATCH xf86-video-amdgpu 10/10] Always allow DRI2 page flipping with TearFree

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Even if TearFree is enabled for the CRTC we're synchronizing to. (Ported from radeon commit d314cbfb228bb4b8762714f98d0c114a8ee3f061) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- man/amdgpu.man| 6 ++ src/amdgpu_dri2

[PATCH xf86-video-amdgpu 04/10] Create drmmode_crtc_wait_pending_event helper macro

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Preparation for following change, no functional change intended yet. (Ported from radeon commit f87acdbfb1b0b6d2769764772a52ea8b81675e20) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/drmmode_display.c | 14 ++

[PATCH xf86-video-amdgpu 07/10] Add source drawable parameter to amdgpu_scanout_do_update

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Preparation for following changes, no functional change intended yet. (Ported from radeon commit 1443270e52e8562bd8dc3603f301963bd4027cef) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/amdgpu_drv.h | 3 ++- src/

Re: [PATCH] drm/amdgpu/virtual_dce: Virtual display doesn't support disable vblank immediately

2017-08-18 Thread Michel Dänzer
an this be enabled for DC? */ > + adev->ddev->vblank_disable_immediate = true; > + } > > r = drm_vblank_init(adev->ddev, adev->mode_info.num_crtc); > if (r) > Reviewed-by: Michel Dänzer <miche

[PATCH xf86-video-amdgpu 1/3] Consolidate amdgpu_scanout_flip_abort/handler helpers

2017-08-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> While at it, make them use crtc->driver_private. (Ported from radeon commit 36ce7920136c0d723c9397a84e7dd5926a9c7943) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/am

[PATCH xf86-video-ati] modesetting: re-set the crtc's mode when link-status goes BAD

2017-08-17 Thread Michel Dänzer
o pass the Display Port compliance tests. (Ported from xserver commit bcee1b76aa0db8525b491485e90b8740763d7de6) [ Michel: Bump libdrm dependency to >= 2.4.78 for DRM_MODE_LINK_STATUS_BAD ] Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- configure.ac | 2 +- src/dr

Re: [PATCH 1/1] amdgpu: move asic id table to a separate file

2017-05-11 Thread Michel Dänzer
On 12/05/17 06:13 AM, Li, Samuel wrote: > Submitted a request to create a new repo on freedesktop. What's the point of having a separate repository upstream? Can't we just keep it in the libdrm repository? -- Earthling Michel Dänzer | http://www.amd.com Li

Re: [PATCH] drm/amdgpu: properly byteswap gpu_info firmware

2017-05-11 Thread Michel Dänzer
buff_depth); > adev->gfx.config.double_offchip_lds_buf = > - gpu_info_fw->gc_double_offchip_lds_buffer; > - adev->gfx.cu_info.wave_front_size = gpu_info_fw->gc_wave_size; > + le32_to_cpu(gpu_info_fw->gc_double_offchip_lds_buf

Re: [PATCH 1/1] amdgpu: move asic id table to a separate file

2017-05-14 Thread Michel Dänzer
rovide specific reasons why this file cannot be in the libdrm repository upstream. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing li

Re: Plan: BO move throttling for visible VRAM evictions

2017-05-14 Thread Michel Dänzer
On 14/05/17 06:31 AM, Marek Olšák wrote: > On Mon, Apr 17, 2017 at 11:55 AM, Michel Dänzer <mic...@daenzer.net> wrote: >> On 17/04/17 07:58 AM, Marek Olšák wrote: >>> On Fri, Apr 14, 2017 at 12:14 PM, Michel Dänzer <mic...@daenzer.net> wrote: >>>&g

Re: [PATCH libdrm] amdgpu: add missing extern "C" headers

2017-05-14 Thread Michel Dänzer
On 15/05/17 11:09 AM, Michel Dänzer wrote: > > BTW, don't send patches for review as HTML. Ideally use git send-email. Sorry Alex, I was confused and thought you sent the patch. -- Earthling Michel Dänzer | http://www.amd.com Libre software enth

Re: [PATCH libdrm] amdgpu: add missing extern "C" headers

2017-05-14 Thread Michel Dänzer
On 15/05/17 10:10 AM, Xie, AlexBin wrote: > amdgpu/amdgpu.h | 8 > 1 file changed, 8 insertions(+) This header is synchronized with the kernel, see include/drm/README. BTW, don't send patches for review as HTML. Ideally use git send-email. -- Earthling Michel

[PATCH xf86-video-amdgpu] Simplify tracking of PRIME scanout pixmap

2017-05-12 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Remember the shared pixmap passed to drmmode_set_scanout_pixmap for each CRTC, and just compare against that. Fixes leaving stale entries in ScreenRec::pixmap_dirty_list under some circumstances, which would usually result in use-afte

[PATCH xf86-video-amdgpu] Remove unused struct members from drmmode_display.h

2017-05-10 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/drmmode_display.c | 1 - src/drmmode_display.h | 3 --- 2 files changed, 4 deletions(-) diff --git a/src/drmmode_display.c b/src/drmmode_display.c index 5b2431495..9996

[PATCH xf86-video-amdgpu] Don't enable DRI3 without glamor

2017-05-10 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Can't work currently. Fixes crash when trying to run a DRI3 client when glamor isn't enabled. Bugzilla: https://bugs.freedesktop.org/100968 Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/amdgpu_kms.c | 5 - 1 fil

[PATCH xf86-video-ati 2/2] Use reference counting for tracking KMS framebuffer lifetimes

2017-05-10 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> References are held by the pixmaps corresponding to the FBs (so the same KMS FB can be reused as long as the pixmap exists) and by the CRTCs scanning out from them (so a KMS FB is only destroyed once it's not being scanned out anymore, prev

[PATCH xf86-video-ati 1/2] Pass pixmap instead of handle to radeon_do_pageflip

2017-05-10 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> This brings us in line with amdgpu and prepares for the following change, no functional change intended. (Ported from amdgpu commit e463b849f3e9d7b69e64a65619a22e00e78d297b) v2: * Be more consistent with the amdgpu code, which should make p

[PATCH xf86-video-ati] Simplify tracking of PRIME scanout pixmap

2017-05-10 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Remember the shared pixmap passed to drmmode_set_scanout_pixmap for each CRTC, and just compare against that. Fixes leaving stale entries in ScreenRec::pixmap_dirty_list under some circumstances, which would usually result in use-afte

Re: (radeon?) WARNING: drivers/gpu/drm/drm_irq.c:1195 drm_vblank_put (v4.11-12441-g56868a4)

2017-05-10 Thread Michel Dänzer
vent_percpu+0x20/0x90 > [ 249.952892] handle_irq_event+0x46/0xb0 > [ 249.952897] handle_edge_irq+0x13d/0x370 > [ 249.952903] handle_irq+0x66/0x210 > [ 249.952908] ? __local_bh_enable+0x34/0x50 > [ 249.952914] do_IRQ+0x7e/0x1b0 > [ 249.952920] common_interrupt+0x95/0x95 Weird, not

Re: [PATCH 0/3] GPU-DRM-Radeon: Fine-tuning for three function implementations

2017-05-10 Thread Michel Dänzer
On 10/05/17 08:30 PM, Christian König wrote: > Am 10.05.2017 um 02:23 schrieb Michel Dänzer: >> On 03/05/17 09:46 PM, Christian König wrote: >>> Am 02.05.2017 um 22:04 schrieb SF Markus Elfring: >>>> From: Markus Elfring <elfr...@users.sourceforge.net> >&

Re: [PATCH 1/1] amdgpu: move asic id table to a separate file

2017-05-10 Thread Michel Dänzer
usr/share/libdrm. What is the canonical location where distros or users building upstream libdrm can get this file from? There needs to be a good solution for that before this can land. -- Earthling Michel Dänzer | http://www.amd.com Libre software e

[PATCH xf86-video-ati] Remove unused struct members from drmmode_display.h

2017-05-11 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> (Ported from amdgpu commit 462ac3341e5bfbded9086d3d9043821d19352b3e) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/drmmode_display.c | 1 - src/drmmode_display.h | 2 -- 2 files changed, 3 deletions(-) diff

[PATCH xf86-video-ati] Update URLs

2017-05-17 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> * Point to the amd-gfx mailing list * Specify the component in all bugzilla URLs * Use https:// for all HTML URLs Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- README | 14 +++--- configure.ac | 2 +- ma

[PATCH 3/3] drm/amdgpu: Try evicting from CPU visible to invisible VRAM first

2017-05-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> In exchange, move BOs with the AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED flag set to CPU visible VRAM with more force. For other BOs, this gives another chance to stay in VRAM if they happened to lie in the CPU visible part and another BO needs

Re: [PATCH 1/3] drm/amdgpu: Drop useless loops for placement restrictions

2017-05-18 Thread Michel Dänzer
On 18/05/17 06:17 PM, Christian König wrote: > Am 18.05.2017 um 11:08 schrieb Michel Dänzer: >> From: Michel Dänzer <michel.daen...@amd.com> >> >> We know how the placements were initialized in these cases, so we can >> set the restrictions directly without a

[PATCH 0/3] drm/amdgpu: Tweaks for high pressure on CPU visible VRAM

2017-05-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> This series was developed and tested under the following scenario: Running the PTS dirt-rally benchmark (1920x1080, Ultra) on Tonga with 2G, with CPU visible VRAM artificially restricted to 64 MB. Without this series, there's a lot of stutter

[PATCH 1/3] drm/amdgpu: Drop useless loops for placement restrictions

2017-05-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> We know how the placements were initialized in these cases, so we can set the restrictions directly without a loop. Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 13 +++--

[PATCH 2/3] drm/amdgpu: Don't evict other BOs from VRAM for page faults

2017-05-18 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> If there is no free space in CPU visible VRAM for the faulting BO, move it to GTT instead of evicting other BOs from CPU visible VRAM. Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_o

Re: Plan: BO move throttling for visible VRAM evictions

2017-05-18 Thread Michel Dänzer
On 17/05/17 09:35 PM, Marek Olšák wrote: > On May 16, 2017 3:57 AM, "Michel Dänzer" <mic...@daenzer.net > <mailto:mic...@daenzer.net>> wrote: > On 15/05/17 07:11 PM, Marek Olšák wrote: > > On May 15, 2017 4:29 AM, "Michel Dänzer" <m

Re: [PATCH 4/4] drm/amdgpu: reset fpriv vram_lost_counter

2017-05-16 Thread Michel Dänzer
On 17/05/17 12:04 PM, zhoucm1 wrote: > On 2017年05月17日 09:18, Michel Dänzer wrote: >> On 16/05/17 06:25 PM, Chunming Zhou wrote: >>> Change-Id: I8eb6d7f558da05510e429d3bf1d48c8cec6c1977 >>> Signed-off-by: Chunming Zhou <david1.z...@amd.com> >>> --- >&g

[PATCH xf86-video-amdgpu] Use plain glamor_egl_create_textured_screen().

2017-05-17 Thread Michel Dänzer
35552000c958) Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/amdgpu_glamor.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/amdgpu_glamor.c b/src/amdgpu_glamor.c index 1c5dfc2d1..5583cd382 100644 --- a/src/amdgpu_glamor.c +++ b/src/amdgpu_glamor

Re: [PATCH 4/4] drm/amdgpu: reset fpriv vram_lost_counter

2017-05-17 Thread Michel Dänzer
On 17/05/17 01:28 PM, zhoucm1 wrote: > On 2017年05月17日 11:15, Michel Dänzer wrote: >> On 17/05/17 12:04 PM, zhoucm1 wrote: >>> On 2017年05月17日 09:18, Michel Dänzer wrote: >>>> On 16/05/17 06:25 PM, Chunming Zhou wrote: >>>>> Change-Id: I8eb6d7f558da

Re: [PATCH 4/4] drm/amdgpu: reset fpriv vram_lost_counter

2017-05-17 Thread Michel Dänzer
On 17/05/17 04:13 PM, zhoucm1 wrote: > On 2017年05月17日 14:57, Michel Dänzer wrote: >> On 17/05/17 01:28 PM, zhoucm1 wrote: >>> On 2017年05月17日 11:15, Michel Dänzer wrote: >>>> On 17/05/17 12:04 PM, zhoucm1 wrote: >>>>> On 2017年05月17日 09:18, Michel Dänzer

Re: [PATCH 4/4] drm/amdgpu: reset fpriv vram_lost_counter

2017-05-17 Thread Michel Dänzer
On 17/05/17 05:46 PM, zhoucm1 wrote: > > > On 2017年05月17日 16:40, Christian König wrote: >> Am 17.05.2017 um 10:01 schrieb Michel Dänzer: >>> On 17/05/17 04:13 PM, zhoucm1 wrote: >>>> On 2017年05月17日 14:57, Michel Dänzer wrote: >>>>> On 17/05/17 0

[PATCH xf86-video-ati] Apply gamma correction to HW cursor

2017-05-10 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> The display hardware CLUT we're currently using for gamma correction doesn't affect the HW cursor, so we have to apply it manually when uploading the HW cursor data. This currently only works in depth 24/32. (Ported from amdgpu

Re: [PATCH 2/4] drm/radeon: Allow vblank_disable_immediate.

2017-06-21 Thread Michel Dänzer
;mario.kleiner...@gmail.com> > Cc: Alex Deucher <alexander.deuc...@amd.com> > Cc: Michel Dänzer <michel.daen...@amd.com> My only doubt is whether this is also reliable on older (e.g. pre-R600) GPUs. For newer GPUs (tested on Kaveri): Reviewed-and-Tested-by: Michel Dänzer <m

Re: [Nouveau] [PATCH 01/11] drm/fb-helper: do a generic fb_setcmap helper in terms of crtc .gamma_set

2017-06-21 Thread Michel Dänzer
On 21/06/17 05:14 PM, Daniel Vetter wrote: > On Wed, Jun 21, 2017 at 04:59:31PM +0900, Michel Dänzer wrote: >> On 21/06/17 04:38 PM, Daniel Vetter wrote: >>> On Tue, Jun 20, 2017 at 09:25:25PM +0200, Peter Rosin wrote: >>>> This makes the redundant fb helpers .load_

Re: [PATCH 3/4] drm/amdgpu: Allow vblank_disable_immediate.

2017-06-21 Thread Michel Dänzer
ario Kleiner <mario.kleiner...@gmail.com> > Cc: Alex Deucher <alexander.deuc...@amd.com> > Cc: Michel Dänzer <michel.daen...@amd.com> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/a

Re: [PATCH 01/11] drm/fb-helper: do a generic fb_setcmap helper in terms of crtc .gamma_set

2017-06-21 Thread Michel Dänzer
be yet another bug, > but might be relevant for your use-case. Just try to run both an fbdev > application and some kms-native thing, and then SIGKILL the native kms > app. > > But since pre-existing not really required, and probably too much effort. I suspect something like

[PATCH xf86-video-amdgpu] Improve drmmode_fb_reference debugging code

2017-06-22 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> If a reference count is <= 0, call FatalError with the call location (in case it doesn't get resolved in the backtrace printed by FatalError). Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/drmmode

Re: [PATCH 2/3] drm/amdgpu: change a function to static function

2017-06-21 Thread Michel Dänzer
On 22/06/17 11:42 AM, Alex Xie wrote: > The function is called only once inside the .c file. > > Signed-off-by: Alex Xie <alexbin@amd.com> The shortlog should explicitly say "drm/amdgpu: Make amdgpu_cs_parser_init static". With that, this patch and patch 1 are R

[PATCH xf86-video-ati] Only call drmmode_scanout_free for non-GPU screens in LeaveVT

2017-06-21 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Destroying the scanout buffers of GPU screens resulted in a crash when switching back to the Xorg VT. Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/radeon_kms.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[PATCH xf86-video-amdgpu] Increase reference count of FB assigned to drmmode_crtc->flip_pending

2017-06-21 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Otherwise, it could happen that we destroy the FB before the flip completes, resulting in use-after-free and most likely a crash. Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- src/amdgpu_kms.c | 8 src/drmmode_d

Re: [PATCH] drm/amdgpu: optimize out a spin lock (v2)

2017-06-21 Thread Michel Dänzer
return us_to_bytes(adev, accum_us); and remove the max_bytes local. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gf

Re: [PATCH 3/3] drm/amdgpu: add gtt_sys_limit

2017-06-26 Thread Michel Dänzer
ld limit the maximum BO size to < 256MB, if I understand correctly. Pretty sure that would cause failures with real world apps. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___

Re: [PATCH] amdgpu: sync amdgpu_drm with kernel.

2017-06-26 Thread Michel Dänzer
ted using make headers_install. > Generated from git://people.freedesktop.org/~airlied/linux drm-next commit > 6d61e70ccc2. > > Signed-off-by: Dave Airlie <airl...@redhat.com> Reviewed-by: Michel Dänzer <michel.daen...@amd.com> -- Earthling Michel Dänzer |

Re: [PATCH 1/3] drm/amdgpu: fix a typo

2017-06-26 Thread Michel Dänzer
ioctls in a separate thread (in parallel > with the UMD) except for the last IB that's submitted by SwapBuffers. ... or by an explicit glFinish or glFlush (at least when the current draw buffer isn't a back buffer) call, right? > For us, it's certainly useful to optimize

Re: [PATCH libdrm] amdgpu: update the exported always on CU bitmap

2017-06-26 Thread Michel Dänzer
Right. Also, include/drm/amdgpu_drm.h should be updated in a separate patch, see include/drm/README (in particular the "When and how to update these files"). -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast

Re: [PATCH 2/9] drm/amdgpu: Add vis_vramlimit module parameter

2017-06-26 Thread Michel Dänzer
On 24/06/17 02:39 AM, John Brooks wrote: > Allow specifying a limit on visible VRAM via a module parameter. This is > helpful for testing performance under visible VRAM pressure. > > Signed-off-by: John Brooks <j...@fastquake.com> Reviewed-by: Michel Dänzer <m

Re: [PATCH 6/9] drm/amdgpu: Set/clear CPU_ACCESS_REQUIRED flag on page fault and CS

2017-06-26 Thread Michel Dänzer
to VRAM. That way, any BO which was ever accessed by the CPU since it was last moved to VRAM will be preferably put in the CPU visible part of VRAM. Not sure which way is better though. -- Earthling Michel Dänzer | http://www.amd.com Libre

Re: [PATCH 3/9] drm/amdgpu: Don't force BOs into visible VRAM for page faults

2017-06-26 Thread Michel Dänzer
> return 0; > AFAICT this is essentially the same as https://patchwork.freedesktop.org/patch/156993/ . I retracted that patch due to it causing Rally Dirt performance degradation for Marek. Presumably other patches in this series compensate for that, but at the least this patch should be moved

Re: [PATCH 7/9] drm/amdgpu: Throttle visible VRAM moves separately

2017-06-26 Thread Michel Dänzer
M is CPU visible. Can that be avoided somehow? -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https

[PATCH xf86-video-ati 1/2] Increase reference count of FB assigned to drmmode_crtc->flip_pending

2017-06-27 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Otherwise, it could happen that we destroy the FB before the flip completes, resulting in use-after-free and most likely a crash. (Ported from amdgpu commit af7221e1c4d2dbdfd488eb0976a835584ea8441c) Signed-off-by: Michel Dänzer <mi

[PATCH xf86-video-ati 2/2] Improve drmmode_fb_reference debugging code

2017-06-27 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> If a reference count is <= 0, call FatalError with the call location (in case it doesn't get resolved in the backtrace printed by FatalError). (Ported from amdgpu commit 1b6ff5fd9933c00ec1ec90dfc62e0b531927749b) Signed-off-by: Mich

[PATCH xf86-video-amdgpu] Only call drmmode_scanout_free for non-GPU screens in LeaveVT

2017-06-27 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Destroying the scanout buffers of GPU screens resulted in a crash when switching back to the Xorg VT. Fixes: b10ecdbd89b0 ("Use drmmode_crtc_scanout_* helpers for RandR 1.4 scanout pixmaps") (Ported fr

Re: [PATCH 7/9] drm/amdgpu: Throttle visible VRAM moves separately

2017-06-27 Thread Michel Dänzer
On 27/06/17 07:29 AM, John Brooks wrote: > On Mon, Jun 26, 2017 at 06:44:30PM +0900, Michel Dänzer wrote: >> On 24/06/17 02:39 AM, John Brooks wrote: >>> The BO move throttling code is designed to allow VRAM to fill quickly if it >>> is relatively empty. However, this

Re: [PATCH 0/3] drm/amdgpu: Tweaks for high pressure on CPU visible VRAM

2017-05-19 Thread Michel Dänzer
's only little if any improvement of the average framerate >> reported, but the minimum framerate as seen on the HUD goes from ~10 fps >> to ~17. I.e. it mostly affects the minimum framerate and smoothness for me as well. -- Earthling Michel Dänzer |

Re: [PATCH] drm/amdgpu: Place new CPU-accessbile BOs in GTT if visible VRAM is full

2017-05-19 Thread Michel Dänzer
On 20/05/17 12:52 AM, Marek Olšák wrote: > On Fri, May 19, 2017 at 9:03 AM, Michel Dänzer <mic...@daenzer.net> wrote: >> On 19/05/17 12:04 PM, John Brooks wrote: >>> Set GTT as the busy placement for newly created BOs that have the >>> AMDGPU_GEM_CREATE_CPU_ACCESS_

Re: [PATCH] drm/amdgpu: Place new CPU-accessbile BOs in GTT if visible VRAM is full

2017-05-19 Thread Michel Dänzer
On 20/05/17 04:23 AM, John Brooks wrote: > On Fri, May 19, 2017 at 04:03:28PM +0900, Michel Dänzer wrote: >> On 19/05/17 12:04 PM, John Brooks wrote: >>> Set GTT as the busy placement for newly created BOs that have the >>> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED fla

Re: [PATCH] drm/radeon: Fix oops upon driver load on PowerXpress laptops

2017-05-22 Thread Michel Dänzer
On 23/05/17 12:50 PM, Lukas Wunner wrote: > On Tue, May 23, 2017 at 12:09:49PM +0900, Michel Dänzer wrote: >> On 22/05/17 11:04 PM, Lukas Wunner wrote: >>> On Sun, May 21, 2017 at 09:31:09AM +0200, Nicolai Stange wrote: >>>> On Thu, May 18 2017, Lukas Wunner wr

Re: [PATCH] drm/radeon: Fix oops upon driver load on PowerXpress laptops

2017-05-22 Thread Michel Dänzer
that Alex is on vacation. Christian König is standing in for Alex. > I've pushed the patch to drm-misc-fixes so that the issue is fixed in > 4.12-rc3. I don't think there was any particular need to bypass the normal radeon tree for this. There was plenty of time for the f

Re: [PATCH 0/3] drm/amdgpu: Tweaks for high pressure on CPU visible VRAM

2017-05-22 Thread Michel Dänzer
On 22/05/17 07:09 PM, Marek Olšák wrote: > On Mon, May 22, 2017 at 12:00 PM, Michel Dänzer <mic...@daenzer.net> wrote: >> On 20/05/17 06:26 PM, Marek Olšák wrote: >>> On May 20, 2017 3:26 AM, "Michel Dänzer" <mic...@daenzer.net >>> <mailto:mic...@d

Re: [PATCH] drm/amd/display: Limit DCN to x86 arch

2017-05-23 Thread Michel Dänzer
executed when resizing an underlay surface, such as > a video player. That should still only happen once per frame though, i.e. on the order of 10s to 100s of times per second. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast

[PATCH xf86-video-amdgpu 1/1] Update URLs

2017-05-23 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> * Point to the amd-gfx mailing list * Specify the component in all bugzilla URLs * Use https:// for all HTML URLs (Ported from radeon commit d80d01a73c2eaba2e3649b7bc0a3541b3ff782f6) Signed-off-by: Michel Dänzer <michel.daen...@amd.com>

Re: [PATCH 0/3] drm/amdgpu: Tweaks for high pressure on CPU visible VRAM

2017-05-24 Thread Michel Dänzer
+n jiffies or > something like that. I also feel like something like this will be more useful than the number of CPU page faults per se. But I'm curious what Marek comes up with. :) -- Earthling Michel Dänzer | http://www.amd.com

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

2017-05-22 Thread Michel Dänzer
On 22/05/17 10:54 AM, Michel Dänzer wrote: > On 20/05/17 03:55 AM, Felix Kuehling wrote: >> On 17-05-18 09:17 PM, Michel Dänzer wrote: > >>>>> The default at this point should possibly still be for CIK GPUs to be >>>>> driven by radeon, even if C

Re: [PATCH 0/3] drm/amdgpu: Tweaks for high pressure on CPU visible VRAM

2017-05-25 Thread Michel Dänzer
On 25/05/17 08:24 PM, Marek Olšák wrote: > On Thu, May 25, 2017 at 5:31 AM, Michel Dänzer <mic...@daenzer.net> wrote: >> On 24/05/17 08:27 PM, Christian König wrote: >>> Am 24.05.2017 um 13:03 schrieb Marek Olšák: >>>>> >>>> I think the f

Re: [PATCH 1/1] amdgpu: move asic id table to a separate file

2017-05-24 Thread Michel Dänzer
it can be automated, we'll see. :) -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://li

Re: [PATCH] drm: Harmonize CIK ASIC support in radeon and amdgpu (v2)

2017-05-18 Thread Michel Dänzer
On 19/05/17 04:35 AM, Felix Kuehling wrote: > On 17-04-27 05:22 AM, Michel Dänzer wrote: >> On 27/04/17 05:15 AM, Felix Kuehling wrote: >>> Hi Michel, >>> >>> You said in an earlier email that it doesn't have to be convenient. With >>> that in

Re: [PATCH 3/3] drm/amdgpu: Try evicting from CPU visible to invisible VRAM first

2017-05-18 Thread Michel Dänzer
On 19/05/17 12:43 AM, John Brooks wrote: > On Thu, May 18, 2017 at 06:08:09PM +0900, Michel Dänzer wrote: >> From: Michel Dänzer <michel.daen...@amd.com> >> >> In exchange, move BOs with the AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED >> flag set to CPU visible VRAM wit

Re: [PATCH] iommu/amd: flush IOTLB for specific domains only

2017-05-18 Thread Michel Dänzer
; > Its better to either add a flush-flag to the domains and evaluate that > in __queue_flush or keep a list of domains to flush to make the flushing > really more efficient. Arindam, can you incorporate Joerg's feedback? FWIW, looks like Carrizo systems are affected by this as well (see e.g

Re: [PATCH 3/3] drm/amdgpu: Try evicting from CPU visible to invisible VRAM first

2017-05-18 Thread Michel Dänzer
On 19/05/17 10:43 AM, John Brooks wrote: > On Fri, May 19, 2017 at 10:20:37AM +0900, Michel Dänzer wrote: >> On 19/05/17 12:43 AM, John Brooks wrote: >>> On Thu, May 18, 2017 at 06:08:09PM +0900, Michel Dänzer wrote: >>>> From: Michel Dänzer <michel.daen...@amd.com

Re: [PATCH] drm/amdgpu: Place new CPU-accessbile BOs in GTT if visible VRAM is full

2017-05-19 Thread Michel Dänzer
AX + 1) * sizeof(struct ttm_place)); > > + > + /* New CPU-visible BOs will have GTT set as their busy placement */ > + if (domain & AMDGPU_GEM_DOMAIN_VRAM && > + flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) { Make this if ((domain &

Re: [PATCH 0/3] drm/amdgpu: Tweaks for high pressure on CPU visible VRAM

2017-05-24 Thread Michel Dänzer
On 23/05/17 07:38 PM, Marek Olšák wrote: > On Tue, May 23, 2017 at 2:45 AM, Michel Dänzer <mic...@daenzer.net> wrote: >> On 22/05/17 07:09 PM, Marek Olšák wrote: >>> On Mon, May 22, 2017 at 12:00 PM, Michel Dänzer <mic...@daenzer.net> wrote: >>>&g

Re: [PATCH 4/4] drm/amdgpu: reset fpriv vram_lost_counter

2017-05-16 Thread Michel Dänzer
an existing context and then call this ioctl. How about the GPUVM page tables? Will the kernel driver automatically re-generate those as needed, or will the UMD also need to e.g. destroy and re-create the VM mappings for all BOs before calling this ioctl? It's hard to be sure whether that's workable for

[PATCH xf86-video-amdgpu] Use reference counting for tracking KMS framebuffer lifetimes

2017-05-29 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> References are held by the pixmaps corresponding to the FBs (so the same KMS FB can be reused as long as the pixmap exists) and by the CRTCs scanning out from them (so a KMS FB is only destroyed once it's not being scanned out anymore, prev

Re: [PATCH libdrm v3 1/1] amdgpu: move asic id table to a separate file

2017-05-28 Thread Michel Dänzer
00M This doesn't look like the current format we've settled on internally. There are supposed to be tabs after the commas to align the columns. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast |

[PATCH 2/3] drm/radeon: Make si_support and cik_support parameters always available

2017-05-29 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> This will allow amdgpu-pro / other out-of-tree amdgpu builds to make use of these options for using the out-of-tree amdgpu driver instead of the in-tree radeon driver in a clean way. Signed-off-by: Michel Dänzer <michel.daen...@amd.com>

[PATCH 3/3] drm/amdgpu/radeon: Use radeon by default for CIK GPUs

2017-05-29 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> Even if CONFIG_DRM_AMDGPU_CIK is enabled. There is no feature parity yet for CIK, in particular amdgpu doesn't support HDMI/DisplayPort without DC. Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- drivers/gpu/drm/amd/amdgpu/Kcon

[PATCH 1/3] drm/amdgpu: Really leave SI support disabled by default

2017-05-29 Thread Michel Dänzer
From: Michel Dänzer <michel.daen...@amd.com> The default option value didn't match the help text and intention. Signed-off-by: Michel Dänzer <michel.daen...@amd.com> --- Maybe this can be squashed into the commit adding this option when it goes upstream. drivers/gpu/dr

Re: [PATCH libdrm v4 1/1] amdgpu: move asic id table to a separate file

2017-05-29 Thread Michel Dänzer
le mode 100644 > index 000..6d6b944 > --- /dev/null > +++ b/include/drm/amdgpu.ids I think the path of this file in the repository should be amdgpu/amdgpu.ids rather than include/drm/amdgpu.ids. > @@ -0,0 +1,170 @@ > +# List of AMDGPU ID's This should say &qu

Re: [PATCH 3/3] drm/amdgpu/radeon: Use radeon by default for CIK GPUs

2017-05-29 Thread Michel Dänzer
On 29/05/17 11:24 PM, Kai Wasserbäch wrote: > Hey Michel, > Michel Dänzer wrote on 29.05.2017 11:20: >> From: Michel Dänzer <michel.daen...@amd.com> >> >> Even if CONFIG_DRM_AMDGPU_CIK is enabled. >> >> There is no feature parity yet for CIK, in

Re: [PATCH 1/3] drm/amdgpu: Really leave SI support disabled by default

2017-05-29 Thread Michel Dänzer
On 30/05/17 02:18 AM, Christian König wrote: > Am 29.05.2017 um 11:20 schrieb Michel Dänzer: >> From: Michel Dänzer <michel.daen...@amd.com> >> >> The default option value didn't match the help text and intention. >> >> Signed-off-by: Michel Dänzer <mic

Re: [PATCH 3/3] drm/amdgpu/radeon: Use radeon by default for CIK GPUs

2017-05-29 Thread Michel Dänzer
On 29/05/17 06:20 PM, Michel Dänzer wrote: > From: Michel Dänzer <michel.daen...@amd.com> > > Even if CONFIG_DRM_AMDGPU_CIK is enabled. > > There is no feature parity yet for CIK, in particular amdgpu doesn't > support HDMI/DisplayPort without DC. > > Signed-off-

Re: [PATCH 2/3] drm/amdgpu: Remove two ! operations in an if condition

2017-05-30 Thread Michel Dänzer
s can be further simplified to return vm_flush_needed || gds_switch_needed; With that, Reviewed-by: Michel Dänzer <michel.daen...@amd.com> -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and

Re: [PATCH 3/3] drm/amdgpu/radeon: Use radeon by default for CIK GPUs

2017-05-30 Thread Michel Dänzer
On 30/05/17 06:17 PM, Grazvydas Ignotas wrote: > On Tue, May 30, 2017 at 6:30 AM, Michel Dänzer <mic...@daenzer.net> wrote: >> On 29/05/17 06:20 PM, Michel Dänzer wrote: >>> From: Michel Dänzer <michel.daen...@amd.com> >>> >>> Even if CONFIG_DRM_AM

Re: [PATCH libdrm v4 1/1] amdgpu: move asic id table to a separate file

2017-05-30 Thread Michel Dänzer
On 31/05/17 07:31 AM, Li, Samuel wrote: > From: Michel Dänzer [mailto:mic...@daenzer.net] >> On 30/05/17 06:16 AM, Samuel Li wrote: >> >>> diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c new >>> file mode 100644 index 000..a43ca33 &

Re: [PATCH libdrm v4 1/1] amdgpu: move asic id table to a separate file

2017-06-01 Thread Michel Dänzer
gt; spend in auditing the names :) It shouldn't take as much time as we've spent talking about it in this thread. :} -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer _

Re: [PATCH libdrm v6 1/1] amdgpu: move asic id table to a separate file

2017-06-07 Thread Michel Dänzer
On 07/06/17 08:12 PM, Emil Velikov wrote: > On 7 June 2017 at 09:40, Michel Dänzer <mic...@daenzer.net> wrote: >> On 06/06/17 10:43 PM, Emil Velikov wrote: >>> On 31 May 2017 at 21:22, Samuel Li <samuel...@amd.com> wrote: >>> >>>> --- /dev/null

Re: amd-gfx Digest, Vol 13, Issue 29

2017-06-06 Thread Michel Dänzer
it can be useful for people who just want to read the list, not post to it. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list am

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