[PATCH 2/2] drm/amdgpu: use the kernel zone memory size as the max remote memory in amdgpu

2016-08-01 Thread Ken Wang
Change-Id: Ibf193cc2d9e20c3aefa1ce8ff24241dfbb6768ff Signed-off-by: Ken Wang --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 12 +++- drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 7 ++-

[PATCH v2 3/3] drm/amdgpu: update golden setting of polaris10

2016-08-01 Thread Huang Rui
Signed-off-by: Huang Rui --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index ea025a5..05c336b 100644 ---

[PATCH v2 2/3] drm/amdgpu: update golden setting of polaris11

2016-08-01 Thread Huang Rui
Signed-off-by: Huang Rui --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index fc4d998..ea025a5 100644 ---

Re: [PATCH 5/5] drm/amdgpu: update golden setting of stoney

2016-08-01 Thread Alex Deucher
On Mon, Aug 1, 2016 at 11:41 PM, Huang Rui wrote: > Signed-off-by: Huang Rui For the series: Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 8 > 1 file changed, 8 insertions(+) > > diff --git

[PATCH 3/5] drm/amdgpu: update golden setting of polaris11

2016-08-01 Thread Huang Rui
Signed-off-by: Huang Rui --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index a6c87466..2743e77 100644 ---

[PATCH 4/5] drm/amdgpu: update golden setting of carrizo

2016-08-01 Thread Huang Rui
Signed-off-by: Huang Rui --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 2743e77..05c336b 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++

RE: [PATCH] Add freesync ioctl interface

2016-08-01 Thread Zhang, Hawking
The implementation is as [PATCH] Enable/disable freesync when enter/exit fullscreen game. Please take a review Regards, Hawking -Original Message- From: Michel Dänzer [mailto:mic...@daenzer.net] Sent: Tuesday, August 02, 2016 11:11 To: Zhang, Hawking Cc:

[PATCH] drm/amd/powerplay: change structure variable name.

2016-08-01 Thread Rex Zhu
Change-Id: I7668616cf4ffef69a4dc9fb7687c1aeb2c277d50 Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [PATCH] Add freesync ioctl interface

2016-08-01 Thread Michel Dänzer
This cannot go upstream without an implementation making use of it. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list

[PATCH] Add freesync ioctl interface

2016-08-01 Thread Hawking Zhang
Change-Id: I38cb3a80e75a904cee875ae47bc0a39a3d471aca Signed-off-by: Hawking Zhang --- include/drm/amdgpu_drm.h | 15 +++ 1 file changed, 15 insertions(+) diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h index 46a3c40..a4f816c 100644 ---

Re: [PATCH 00/13] shadow page table support

2016-08-01 Thread zhoucm1
ping... Don't know where Christian is. any others could review it? Thanks, David Zhou On 2016年07月28日 18:11, Chunming Zhou wrote: Since we cannot make sure VRAM is safe after gpu reset, page table backup is neccessary, shadow page table is sense way to recovery page talbe when gpu reset

Re: Any chance of seeing a merge from drm-next-4.8-wip-si?

2016-08-01 Thread Alex Deucher
On Mon, Aug 1, 2016 at 2:29 AM, Alexandre Demers wrote: > Hi Alex, > > I'd like to know if there is any chance to see a merge / pull request for > the SI code from drm-next-4.8-wip-si into mainline kernel for 4.8? Nothing > seems to have been added to the branch

[PATCH] drm/amdgpu/gfx8: remove stale function declaration

2016-08-01 Thread Alex Deucher
This got leftover somehow when I cleaned this up. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.h b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.h index

[PATCH] drm/amdgpu: print more accurate error messages on IB submission failure

2016-08-01 Thread Marek Olšák
From: Marek Olšák It's useful for debugging. Signed-off-by: Marek Olšák --- drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c

Re: status of MST ?

2016-08-01 Thread Alex Deucher
On Fri, Jul 29, 2016 at 8:51 AM, Kenneth Johansson wrote: > I have a 30" Dell MST monitor and It only uses 30HZ refresh rate when I use > my R9 card. both the open source driver and amdgpu-pro driver. > > Is there some way to make it work properly ? > It's hard to say what the

Re: [PATCH v2 2/2] drm/amdgpu: expose AMDGPU_GEM_CREATE_VRAM_CLEARED to user space

2016-08-01 Thread Alex Deucher
On Mon, Aug 1, 2016 at 1:27 AM, Flora Cui wrote: > I'll push if no objection Reviewed-by: Alex Deucher > On Fri, Jul 29, 2016 at 11:23:39AM +0800, Flora Cui wrote: >> ping... >> >> On Mon, Jul 25, 2016 at 02:15:24PM +0800, Flora Cui wrote: >> >

[PATCH 4/5] drm/amd/powrplay: workaround Memory EDC Error for certain partner boards.

2016-08-01 Thread Rex Zhu
Change-Id: Idce35c2bfc4f2d644e0f6f579f4736c2184df51a Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 2 ++ drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 5 - 2 files changed, 6

[PATCH 5/5] drm/amd/powrplay: delete code no longer in use on Polaris.

2016-08-01 Thread Rex Zhu
Change-Id: I97efcc8832dc595ab44ae705ad6de4a1def59453 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 13 - 1 file changed, 13 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c

[PATCH 2/5] drm/amd/powerplay: pass sub_device_id and sub_vendor_id to powerplay.

2016-08-01 Thread Rex Zhu
Change-Id: I52c506611e1b3cda008612f0424742a7c00e1803 Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 3 +++ drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h | 2 ++ 2 files changed, 5

[PATCH 3/5] drm/amdgpu: AMD SW workaround for certain partner boards

2016-08-01 Thread Rex Zhu
Change-Id: I1ba14aaf54a10530ea87e9efb44a01a18523e3d0 Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git

[PATCH 1/5] drm/amd/powerplay: delete useless code in hwmgr.

2016-08-01 Thread Rex Zhu
Change-Id: I047ed9679598b0e519e49b12414ca7f629c67870 Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 36 -- drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 108 ++-- 2

[PATCH xf86-video-ati 1/2] Use EventCallback to avoid flushing every time in the FlushCallback

2016-08-01 Thread Michel Dänzer
From: Michel Dänzer We only need to flush for XDamageNotify events. Significantly reduces compositing slowdown due to flushing overhead, in particular with glamor. Signed-off-by: Michel Dänzer --- src/radeon.h | 2 ++ src/radeon_kms.c | 79

Any chance of seeing a merge from drm-next-4.8-wip-si?

2016-08-01 Thread Alexandre Demers
Hi Alex, I'd like to know if there is any chance to see a merge / pull request for the SI code from drm-next-4.8-wip-si into mainline kernel for 4.8? Nothing seems to have been added to the branch since the end of May. I haven't seen any thing merged from that branch into drm-next-4.8(-wip)