Driver allocate bo for restore UVD fw ,cache, stack , etc.
the firmware size is not only ucode size but the ucode and header.
Change-Id: I886c099fa123c4814de9b7db3559c30e7b41fd1b
Signed-off-by: JimQu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
All right, from my previous experience. In thaw() and restore(), there are
always ring test fail on GFX, SDMA , sometimes fails on VCE.
I will try your change. Hope it is benefit to the issue.
Thanks
JimQu
发件人: Alex Deucher
发送时间: 2016年8月23日 12:46:43
收件人
Hi Alex:
I remember that the freeze() is called before hibernation image is made. So is
it possible that driver lost some contents when restore hibernation image.
Thanks
JimQu
发件人: Qu, Jim
发送时间: 2016年8月23日 12:18:59
收件人: Alex Deucher; amd-gfx@lists.freede
On Mon, Aug 22, 2016 at 10:57 PM, Reid Hekman wrote:
> On 08/22/2016 08:27 PM, Michel Dänzer wrote:
>>
>> On 23/08/16 10:18 AM, Reid Hekman wrote:
>>>
>>>
>>> I was encouraged by a commit I saw today to add Sea Islands PCI ids to
>>> xf86-video-amdgpu. However I did not see MULLINS included. Are
On Tue, Aug 23, 2016 at 12:18 AM, Qu, Jim wrote:
> Hi Alex:
>
> Are you working on S4 issue ?
No, not specifically. Just seemed like a more reliable way to deal with it.
Alex
>
> Thanks
> JimQu
>
>
> 发件人: amd-gfx 代表 Alex Deucher
>
> 发送时间: 2016年8月23日
On 23/08/16 11:57 AM, Reid Hekman wrote:
> On 08/22/2016 08:27 PM, Michel Dänzer wrote:
>> On 23/08/16 10:18 AM, Reid Hekman wrote:
>>>
>>> I was encouraged by a commit I saw today to add Sea Islands PCI ids to
>>> xf86-video-amdgpu. However I did not see MULLINS included. Are there
>>> other show
While looking at dce_v8_0_afmt_setmode(), I was thinking how crammed it
was and how unintuitive it looked. I compared it to its radeon
counterpart and I realized how readable this last one was. I had a look
at the other dce_vX_0_afmt_setmode() under amdgpu and they all look alike.
Can somebody
Oh.yes, I see it!
Reviewed-by: JimQu
Thanks
JimQu
发件人: Deucher, Alexander
发送时间: 2016年8月23日 10:42:59
收件人: Qu, Jim; Zhou, David(ChunMing); Alex Deucher; amd-gfx@lists.freedesktop.org
主题: RE: [PATCH 1/2] drm/amdgpu: reset the asic when hibernating
> -O
> -Original Message-
> From: Qu, Jim
> Sent: Monday, August 22, 2016 10:05 PM
> To: Zhou, David(ChunMing); Alex Deucher; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: 答复: [PATCH 1/2] drm/amdgpu: reset the asic when hibernating
>
> I have a question:
>
> if driver reset
I have a question:
if driver reset the asic in freeze(), Does not need to re-init the asic in
thaw()?
Thanks
JimQu
发件人: amd-gfx 代表 zhoucm1
发送时间: 2016年8月23日 9:52:42
收件人: Alex Deucher; amd-gfx@lists.freedesktop.org
抄送: Deucher, Alexander
主题: Re: [PATCH
This series is Reviewed-by: Chunming Zhou
On 2016年08月23日 00:05, Alex Deucher wrote:
Some blocks require a reset to properly resume if there
is no power down of the asic like during various
hibernation steps.
Port of:
274ad65c9d02bdcbee9bae045517864c3521d530
(drm/radeon: hard reset r600 and n
This series is,
Reviewed-by: Edward O'Callaghan
On 08/23/2016 04:30 AM, Alex Deucher wrote:
> Normally on shutdown or reboot we don't care about necessarily
> making sure the hw is in a good state because the system is about
> to be powered down or reset. However, after a shutdown or reboot
> i
On Sun, Aug 21, 2016 at 8:59 AM, Jarkko Korpi wrote:
> I quess these are rather harmless.
>
>
> [1.533109] amdgpu :01:00.0: Invalid PCI ROM header signature:
> expecting 0xaa55, got 0x
This is an error from the pci rom code, not the driver.
> 1.532641] CRAT table not found
>
> 1.
Normally on shutdown or reboot we don't care about necessarily
making sure the hw is in a good state because the system is about
to be powered down or reset. However, after a shutdown or reboot
in a VM, it's best to tear down the hw properly otherwise there
can be problems with the next VM use.
S
Normally on shutdown or reboot we don't care about necessarily
making sure the hw is in a good state because the system is about
to be powered down or reset. However, after a shutdown or reboot
in a VM, it's best to tear down the hw properly otherwise there
can be problems with the next VM use.
S
This puts the asic into a known good state if the
driver is reloaded subsequently.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_devi
Some blocks require a reset to properly resume if there
is no power down of the asic like during various
hibernation steps.
Port of:
274ad65c9d02bdcbee9bae045517864c3521d530
(drm/radeon: hard reset r600 and newer GPU when hibernating.)
from radeon.
Signed-off-by: Alex Deucher
---
drivers/gpu/dr
Will do, thanks!
I'll make the change for the others already baking for DCE6. I still have a
thing or two to clean up, but it's almost there.
On Mon, 22 Aug 2016 at 09:19 Deucher, Alexander
wrote:
> > -Original Message-
> > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] O
On Thu, Aug 18, 2016 at 10:29 AM, Tom St Denis wrote:
> Clean up whitespace and formatting.
>
> Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 53
> +++---
> 1 file changed, 13 insertions(+), 40 deletions(-)
From: Rex Zhu
fix issue after vce encode, the eclk stay high.
Change-Id: I329d0cbc6342b2d6a7e3968bc211ddc533bf33b5
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --gi
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Qiang Yu
> Sent: Monday, August 22, 2016 7:13 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Qiang
> Subject: [PATCH xf86-video-amdgpu] Fix amdgpu_dri2_exchange_buffers
> width/height miss c
From: Rex Zhu
fix issue that encode test failed on the second time when
vce dpm enabled on tonga.
Signed-off-by: Rex Zhu
Change-Id: I9c77b631b977ab5cc14dc553b6e6beb502e4bd0e
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deleti
From: Rex Zhu
Change-Id: I4e5589050bec48a7a6d8bc707bcafbeabf3f5ce1
Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
b/drivers/gpu/drm/amd/amd
Hi,
On 22 August 2016 at 05:53, Qiang Yu wrote:
> Signed-off-by: Qiang Yu
> ---
> hw/xfree86/drivers/modesetting/dri2.c| 237
> ++-
> hw/xfree86/drivers/modesetting/driver.h | 5 +-
> hw/xfree86/drivers/modesetting/drmmode_display.h | 3 +
> hw/xfre
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Monday, August 22, 2016 8:50 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 3/4] drm/amd/powerplay: get system info by cgs interface.
>
> Change-Id: I
On Mon, Aug 22, 2016 at 3:18 AM, Dave Airlie wrote:
> On 19 August 2016 at 19:01, Marek Olšák wrote:
>> Hi,
>>
>> This amdgpu patch fixes DCE support. Now only the cursor is broken:
>>
>> [ 37.936022] [drm:dce_v6_0_crtc_cursor_set2 [amdgpu]] *ERROR* bad cursor
>> width or height 128 x 128
>>
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Alexandre Demers
> Sent: Sunday, August 21, 2016 8:38 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH drm/amdgpu] Fix indentation in
> dce_v8_0_audio_write_sad_regs()
For these and f
delete the members not needed when amd_powerplay_init.
Change-Id: I14ea3fa4d795e6f439bf821241d9d151e8117a9a
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c | 4
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 3 ---
drivers/gpu/drm/amd/powerplay/inc/amd_powe
Change-Id: I4cf5a2526b1c6320cefaedf781131e46b7c75d0c
Signed-off-by: Rex Zhu
---
.../gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c | 24 ++
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c
b/drivers/gpu/drm/a
Change-Id: I23b1f053c33d1176f05b8c14b22e0f4a6f58d454
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 6 ++
drivers/gpu/drm/amd/include/cgs_common.h | 2 ++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
b/drivers/gpu/drm/amd/amdgp
On 08/22/2016 10:41 PM, Edward O'Callaghan wrote:
>
>
> On 08/22/2016 12:42 PM, zhoucm1 wrote:
>>
>>
>> On 2016年08月21日 14:23, Edward O'Callaghan wrote:
>>>
>>> On 08/18/2016 05:55 PM, Chunming Zhou wrote:
They are used for sharing semaphore across process.
Change-Id: I262adf10913
On 08/22/2016 12:42 PM, zhoucm1 wrote:
>
>
> On 2016年08月21日 14:23, Edward O'Callaghan wrote:
>>
>> On 08/18/2016 05:55 PM, Chunming Zhou wrote:
>>> They are used for sharing semaphore across process.
>>>
>>> Change-Id: I262adf10913d365bb93368b492e69140af522c64
>>> Signed-off-by: Chunming Zhou
Signed-off-by: Qiang Yu
---
src/amdgpu_dri2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amdgpu_dri2.c b/src/amdgpu_dri2.c
index 03e3a0b..de701c2 100644
--- a/src/amdgpu_dri2.c
+++ b/src/amdgpu_dri2.c
@@ -665,7 +665,7 @@ amdgpu_dri2_exchange_buffers(DrawablePtr draw,
Signed-off-by: Qiang Yu
Reviewed-by: Michel Dänzer
---
hw/xfree86/drivers/modesetting/present.c | 39
1 file changed, 25 insertions(+), 14 deletions(-)
diff --git a/hw/xfree86/drivers/modesetting/present.c
b/hw/xfree86/drivers/modesetting/present.c
index 0093fb
Hi guys,
This patch set is for adding DRI2 page flip support to modesetting
driver. I mainly take reference of amdgpu DDX and reuse present
page flip code in the modesetting driver.
V2:
1. fix DRI2 page flip success handler event memory leak
2. adjust patch sequence to make DRI2 use the common
The common page flip handle framework can be shared with DRI2
page flip.
Signed-off-by: Qiang Yu
Reviewed-by: Michel Dänzer
---
hw/xfree86/drivers/modesetting/driver.h | 28
hw/xfree86/drivers/modesetting/pageflip.c | 102 --
hw/xfree86/drivers/modesettin
Signed-off-by: Qiang Yu
Reviewed-by: Michel Dänzer
---
hw/xfree86/drivers/modesetting/Makefile.am | 1 +
hw/xfree86/drivers/modesetting/driver.h| 48 ++
hw/xfree86/drivers/modesetting/pageflip.c | 251
hw/xfree86/drivers/modesetting/present.c | 252
Signed-off-by: Qiang Yu
Reviewed-by: Michel Dänzer
---
hw/xfree86/drivers/modesetting/dri2.c| 237 ++-
hw/xfree86/drivers/modesetting/driver.h | 5 +-
hw/xfree86/drivers/modesetting/drmmode_display.h | 3 +
hw/xfree86/drivers/modesetting/pageflip.c
Hi Daniel,
Nice catch. I'll fix it.
Regards,
Qiang
From: Daniel Martin
Sent: Monday, August 22, 2016 2:30:04 PM
To: Yu, Qiang
Cc: xorg-devel; Michel Dänzer; emil.l.veli...@gmail.com;
amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 xserver 4/4] mo
Am 22.08.2016 um 02:41 schrieb Edward O'Callaghan:
On 08/22/2016 10:38 AM, Alexandre Demers wrote:
Fixed indentation for readability.
Signed-off-by: Alexandre Demers
Reviewed-by: Edward O'Callaghan
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 14 +++--
On 22/08/16 12:53 PM, Qiang Yu wrote:
> Signed-off-by: Qiang Yu
> Reviewed-by: Michel Dänzer
[...]
> @@ -588,8 +594,11 @@ ms_present_flip(RRCrtcPtr crtc,
> if (!event)
> return FALSE;
>
> +DebugPresent(("\t\tms:fq %lld\n", event_id));
Would be nice to include the target_msc
On 22/08/16 12:53 PM, Qiang Yu wrote:
> The common page flip handle framework can be shared with DRI2
> page flip.
>
> Signed-off-by: Qiang Yu
[...]
> diff --git a/hw/xfree86/drivers/modesetting/present.c
> b/hw/xfree86/drivers/modesetting/present.c
> index 18c82cd..deee1f1 100644
> --- a/hw/x
Am 22.08.2016 um 02:41 schrieb Edward O'Callaghan:
On 08/22/2016 10:38 AM, Alexandre Demers wrote:
We were using the same mask twice. Looking at radeon, it seems
we should be using HDMI_AVI_INFO_CONT instead as the second mask.
Being there, fix typos in comments and improved readability.
I ha
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