Regards,
Jerry (Junwei Zhang)
Linux Base Graphics
SRDC Software Development
_
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
> Deucher, Alexander
> Sent: Tuesday, February 14, 2017 0:24
> To: 'Christi
On 2017年02月14日 03:03, Nicolai Hähnle wrote:
On 13.02.2017 19:58, Nicolai Hähnle wrote:
On 13.02.2017 19:38, Samuel Pitoiset wrote:
On 02/13/2017 07:09 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:04, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM
Totally untested but as long as read_sensor() has been recently
implemented for dpm based boards, amdgpu_sensors can now be
exposed.
Cc: Tom St Denis
Signed-off-by: Samuel Pitoiset
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --g
On 02/14/2017 12:46 AM, Tom St Denis wrote:
On 02/13/2017 06:40 PM, Samuel Pitoiset wrote:
On 02/14/2017 12:17 AM, Tom St Denis wrote:
Hi Samuel,
Hi Tom,
It would be helpful to modify amdgpu_debugfs_sensor_read() to support
dpm based sensors as well. This will let me add it to umr.
Add the GPU temperature, the shader clock and eventually the
memory clock (as well as the GPU load on CI). The main goal is
to expose this info to the userspace like Radeon.
v2: - add AMDGPU_PP_SENSOR_GPU_LOAD on CI
- update the commit description
Signed-off-by: Samuel Pitoiset
---
drivers/
The clocks are returned in Mhz and the temperature in millidegrees.
v2: - add sub-queries for AMDPGU_INFO_GPU_SENSOR_*
- do not break the ABI
Signed-off-by: Samuel Pitoiset
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 38 +++
On 02/13/2017 06:40 PM, Samuel Pitoiset wrote:
On 02/14/2017 12:17 AM, Tom St Denis wrote:
Hi Samuel,
Hi Tom,
It would be helpful to modify amdgpu_debugfs_sensor_read() to support
dpm based sensors as well. This will let me add it to umr.
You mean removing the sanity check (for powerp
On 02/14/2017 12:17 AM, Tom St Denis wrote:
Hi Samuel,
Hi Tom,
It would be helpful to modify amdgpu_debugfs_sensor_read() to support
dpm based sensors as well. This will let me add it to umr.
You mean removing the sanity check (for powerplay boards)? I can do that
in a follow-up patch
Hi Samuel,
It would be helpful to modify amdgpu_debugfs_sensor_read() to support
dpm based sensors as well. This will let me add it to umr.
If you can swing that in here that would be helpful if not I can submit
my own patch when this lands.
Cheers,
Tom
On 02/13/2017 05:01 PM, Samuel Pi
On 02/13/2017 05:13 PM, Deucher, Alexander wrote:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Samuel Pitoiset
Sent: Monday, February 13, 2017 5:02 PM
To: amd-gfx@lists.freedesktop.org
Cc: Samuel Pitoiset
Subject: [PATCH 1/2] drm/amdgpu: imp
On 02/13/2017 11:20 PM, Deucher, Alexander wrote:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Samuel Pitoiset
Sent: Monday, February 13, 2017 5:02 PM
To: amd-gfx@lists.freedesktop.org
Cc: Samuel Pitoiset
Subject: [PATCH 2/2] drm/amdgpu: e
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Samuel Pitoiset
> Sent: Monday, February 13, 2017 5:02 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Samuel Pitoiset
> Subject: [PATCH 2/2] drm/amdgpu: expose the current temperature and
> shad
On 02/13/2017 07:58 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:38, Samuel Pitoiset wrote:
On 02/13/2017 07:09 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:04, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Samuel Pitoiset
> Sent: Monday, February 13, 2017 5:02 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Samuel Pitoiset
> Subject: [PATCH 1/2] drm/amdgpu: implement read_sensor() for pre-
> powerp
The clocks are returned in Mhz and the temperature in millidegrees.
Signed-off-by: Samuel Pitoiset
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 27 +++
include/uapi/drm/amdgpu_drm.h | 8 +++-
3 files change
Currently, only the GPU temperature, the shader clock and
eventually the memory clock are implemented. The main goal
is to expose this info to the userspace like Radeon.
Signed-off-by: Samuel Pitoiset
---
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h | 4 +++-
drivers/gpu/drm/amd/amdgpu/ci_dpm.c
Hi,
This series exposes the current GPU temperature and the current shader
clock (and eventually the memory clock for non-APUs boards). This adds
the same functionality as the Radeon driver. The main goal is to expose
the info through the GALLIUM_HUD in Mesa.
Alex Deucher suggested to wire-up the
Break out of outer loop properly.
Signed-off-by: Tom St Denis
Reported-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
index 97
On 13.02.2017 19:58, Nicolai Hähnle wrote:
On 13.02.2017 19:38, Samuel Pitoiset wrote:
On 02/13/2017 07:09 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:04, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, S
Hello Rex Zhu,
The patch 8b55d17eeea7: "drm/amdgpu: refine uvd4.2 init/stop code."
from Jan 20, 2017, leads to the following static checker warning:
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c:397 uvd_v4_2_stop()
info: ignoring unreachable code.
drivers/gpu/drm/amd/amdgpu/uvd_v
On 13.02.2017 19:38, Samuel Pitoiset wrote:
On 02/13/2017 07:09 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:04, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fa
On 02/13/2017 07:41 PM, Christian König wrote:
Am 13.02.2017 um 19:32 schrieb Samuel Pitoiset:
On 02/13/2017 07:19 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:11, Samuel Pitoiset wrote:
On 02/13/2017 07:04 PM, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/
Am 13.02.2017 um 19:32 schrieb Samuel Pitoiset:
On 02/13/2017 07:19 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:11, Samuel Pitoiset wrote:
On 02/13/2017 07:04 PM, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.201
On 02/13/2017 07:09 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:04, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fails, the reservation mutex should be unlocked
On 02/13/2017 07:19 PM, Nicolai Hähnle wrote:
On 13.02.2017 19:11, Samuel Pitoiset wrote:
On 02/13/2017 07:04 PM, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init
Am 13.02.2017 um 18:32 schrieb Nicolai Hähnle:
On 13.02.2017 17:40, Nicolai Hähnle wrote:
On 13.02.2017 14:23, Christian König wrote:
From: Christian König
We need to unmap the PRTs first and then free our scheduler entity.
Thanks for the quick fix! Both patches are
Reviewed-by: Nicolai Hä
On 13.02.2017 19:11, Samuel Pitoiset wrote:
On 02/13/2017 07:04 PM, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fails, the reservation mutex should be unlocke
On 02/13/2017 07:04 PM, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fails, the reservation mutex should be unlocked.
In debug build, the kernel reported "poss
On 13.02.2017 19:04, Nicolai Hähnle wrote:
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fails, the reservation mutex should be unlocked.
In debug build, the kernel reported "possible
On 13.02.2017 18:49, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fails, the reservation mutex should be unlocked.
In debug build, the kernel reported "possible recursive locking
detected" in this codepath
On 02/13/2017 06:49 PM, Samuel Pitoiset wrote:
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fails, the reservation mutex should be unlocked.
In debug build, the kernel reported "possible recursive locking
detected" in this cod
On 02/13/2017 05:28 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.
Hmm,
On 02/13/2017 05:25 PM, Nicolai Hähnle wrote:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fails, the reservation mutex should be unlocked.
In debug build, the kernel reported "possible recursive locking
detected" in this codepath. For debugging purposes, I also added
a "WAR
From: Alan Harrison
Add a bit needed during initialization into the driver, where it is supposed
to be. Currently, this is happening in the VCE firmware, and although
functional, this is the correct place to perform this initialization.
Reviewed-by: Leo Liu
Signed-off-by: Alan Harrison
Signed
On 13.02.2017 17:40, Nicolai Hähnle wrote:
On 13.02.2017 14:23, Christian König wrote:
From: Christian König
We need to unmap the PRTs first and then free our scheduler entity.
Thanks for the quick fix! Both patches are
Reviewed-by: Nicolai Hähnle
... and I'll probably get around to testi
> -Original Message-
> From: Marek Olšák [mailto:mar...@gmail.com]
> Sent: Monday, February 13, 2017 12:04 PM
> To: Deucher, Alexander
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/radeon: allow unaligned shader loads on CIK
>
> On Mon, Feb 13, 2017 at 6:00 PM, Deucher,
On Mon, Feb 13, 2017 at 6:00 PM, Deucher, Alexander
wrote:
>> -Original Message-
>> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
>> Of Marek Olšák
>> Sent: Monday, February 13, 2017 11:58 AM
>> To: amd-gfx@lists.freedesktop.org
>> Subject: [PATCH] drm/radeon: allo
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Marek Olšák
> Sent: Monday, February 13, 2017 11:58 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH] drm/radeon: allow unaligned shader loads on CIK
>
> From: Marek Olšák
>
> Signe
From: Marek Olšák
Signed-off-by: Marek Olšák
---
drivers/gpu/drm/radeon/cik.c| 7 +--
drivers/gpu/drm/radeon/radeon_drv.c | 3 ++-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index f6ff41a..ac0d939 100644
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Tom St Denis
> Sent: Monday, February 13, 2017 10:28 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: StDenis, Tom
> Subject: [PATCH] Add new gmc/smu registers
>
> Signed-off-by: Tom St Denis
A
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Tom St Denis
> Sent: Monday, February 13, 2017 11:26 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: StDenis, Tom
> Subject: [PATCH] Fix SMC read/write
>
> The registers in umr are stored as byt
On 13.02.2017 14:23, Christian König wrote:
From: Christian König
We need to unmap the PRTs first and then free our scheduler entity.
Thanks for the quick fix! Both patches are
Reviewed-by: Nicolai Hähnle
... and I'll probably get around to testing them soon, as well.
Signed-off-by: Chr
Am 13.02.2017 um 17:28 schrieb Nicolai Hähnle:
On 09.02.2017 11:33, Samuel Pitoiset wrote:
Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.
Hmm,
On 13/02/17 11:35 AM, Nicolai Hähnle wrote:
Hi Tom,
it's probably a good idea to use subject prefixes for umr patches.
git config format.subjectPrefix "PATCH umr"
or edit .git/config accordingly, e.g. for libdrm I have this in
.git/config:
[format]
subjectPrefix = PATCH libdrm
Then f
Hi Tom,
it's probably a good idea to use subject prefixes for umr patches.
git config format.subjectPrefix "PATCH umr"
or edit .git/config accordingly, e.g. for libdrm I have this in .git/config:
[format]
subjectPrefix = PATCH libdrm
Then format-patch and friends will automatically us
On 09.02.2017 11:33, Samuel Pitoiset wrote:
Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.
Hmm, this could double-count bytes if there's a concu
The registers in umr are stored as byte addresses
(mm registers are word addresses).
Signed-off-by: Tom St Denis
---
src/app/scan.c| 2 +-
src/app/set_bit.c | 2 +-
src/app/set_reg.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/app/scan.c b/src/app/scan.c
index
On 09.02.2017 11:33, Samuel Pitoiset wrote:
When ttm_bo_init() fails, the reservation mutex should be unlocked.
In debug build, the kernel reported "possible recursive locking
detected" in this codepath. For debugging purposes, I also added
a "WARN_ON(ww_mutex_is_locked())" when ttm_bo_init() fa
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Monday, February 13, 2017 8:24 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 2/2] drm/amdgpu: fix PTE defines
>
> From: Christian König
>
> Those should b
On Fri, Feb 10, 2017 at 7:27 PM, ozeng wrote:
> Initialized PIPE_ORDER_TS0/1/2/3 field of SPI_ARB_PRIORITY register to 2.
> This set the pipe priority order to:
> 02 - HP3D, CS_H, GFX, CS_M, CS_L
>
> Change-Id: I1e89a2fdcf45a99808f0f5b3cbd83ae537174023
> Signed-off-by: Oak Zeng
Reviewed-by: Alex
From: Charlene Liu
Change-Id: I1573c7aa95f857d126aadd2f61f152779795aff4
Signed-off-by: Charlene Liu
Reviewed-by: Dmytro Laktyushkin
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/am
From: Tony Cheng
Change-Id: I257828f5e768e746b9ee0596e4b1dbd26fcbbf01
Signed-off-by: Tony Cheng
Reviewed-by: Yongqiang Sun
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 ++
drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c | 1 +
drivers/gpu/dr
From: Sylvia Tsai
- Set ignore_msa_timing_param to 1 only for modes that can support freesync
Change-Id: I94122df078976933ba48326f3b32567bc1a9d628
Signed-off-by: Sylvia Tsai
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 6 +
From: Reza Amini
Change-Id: I75e3abe9e122350cb06c2cd24528ceb974b70b59
Signed-off-by: Reza Amini
Reviewed-by: Wesley Chalmers
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_sink.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/d
I goofed this one up when pulling from the internal DC
repo.
This reverts commit a73e57356fb89b6aaec3434256efb5210200d77d.
Change-Id: Ib0a30b69677b8365b5b1809e476962a488d5505d
---
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.h | 7 +-
.../gpu/drm/amd/display/dc/dce/dce_link_encoder.h |
From: Dmytro Laktyushkin
Change-Id: I05aeb2db7f2d43ec586436b406bb3b78886ff41b
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Jordan Lazare
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 ++
drivers/gpu/drm/amd/display/dc/dce100/dce100_
From: Hersen Wu
Change-Id: I0bc1946decf41316a0fb27df3269418e94621625
Signed-off-by: Hersen Wu
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../amd/display/dc/dce110/dce110_hw_sequencer.c| 100 +++--
1 file changed, 75 insertions(+), 25 deletions(-)
diff --git a/dr
A bunch of fixes today and one cleanup in regamma code.
Charlene Liu (1):
drm/amd/display: color distortion after DPMS+ background color fix
Dmytro Laktyushkin (2):
drm/amd/display: use disp clock value in context rather than
bw_results
drm/amd/display: fix psr status wait
Harry Wentla
From: Zeyu Fan
Change-Id: I27a24b526d7bdb8241ffe5ad1dfac58e56d71f22
Signed-off-by: Zeyu Fan
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm
From: Vitaly Prosyak
Moved custom floating point calculation to the shared place
between dce's.
Change-Id: I21b6ddaec514924c520219f04c70934e5e1b6715
Signed-off-by: Vitaly Prosyak
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/Makefile | 2 +-
From: Dmytro Laktyushkin
Change-Id: I66ad31b2a32b4aec0497e9bdbf69442c1b9f447a
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eagle Yeh
Acked-by: Harry Wentland
---
.../gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 18 +++---
.../gpu/drm/amd/display/dc/dce/dce_link_encoder.h |
On 13/02/17 10:32 AM, Deucher, Alexander wrote:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Tom St Denis
Sent: Monday, February 13, 2017 7:46 AM
To: amd-gfx@lists.freedesktop.org
Cc: StDenis, Tom
Subject: [PATCH] Add missing CIK devices
Ad
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Tom St Denis
> Sent: Monday, February 13, 2017 7:46 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: StDenis, Tom
> Subject: [PATCH] Add missing CIK devices
>
> Adds mullins, kabini, and hawaii A
Signed-off-by: Tom St Denis
---
src/lib/ip/gmc60_bits.i | 2 ++
src/lib/ip/smu701_bits.i | 4
src/lib/ip/smu701_regs.i | 1 +
src/lib/ip/smu711_bits.i | 4
src/lib/ip/smu711_regs.i | 1 +
src/lib/ip/smu712_bits.i | 4
src/lib/ip/smu712_regs.i | 1 +
src/lib/ip/smu713_bits.i | 4 ++
On 13/02/17 08:12 AM, Christian König wrote:
Am 13.02.2017 um 13:46 schrieb Tom St Denis:
Adds mullins, kabini, and hawaii ASICs to the library.
Signed-off-by: Tom St Denis
Acked-by: Christian König .
Thanks.
If there are no objections I'll push it out in a couple hours.
Cheers,
Tom
Hi Nicolai,
that one should be fixed by "drm/amdgpu: fix PRT cleanup order in the
VM". Please test and/or review.
Thanks,
Christian.
Am 12.02.2017 um 12:36 schrieb Nicolai Hähnle:
Hi,
Some more testing uncovered a bug in cleanup paths. When the
application segfaults while PRT mappings exis
From: Christian König
We need to unmap the PRTs first and then free our scheduler entity.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/
From: Christian König
Those should be 64bit, even on a 32bit system.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
b/drivers/gpu/drm/amd/amdgpu
Am 13.02.2017 um 13:46 schrieb Tom St Denis:
Adds mullins, kabini, and hawaii ASICs to the library.
Signed-off-by: Tom St Denis
Acked-by: Christian König .
---
src/lib/asic/CMakeLists.txt | 3 +++
src/lib/asic/hawaii.c | 40
src/lib/asic/k
Adds mullins, kabini, and hawaii ASICs to the library.
Signed-off-by: Tom St Denis
---
src/lib/asic/CMakeLists.txt | 3 +++
src/lib/asic/hawaii.c | 40
src/lib/asic/kabini.c | 40
src/lib/asic/mullins.
On Mon, Feb 13, 2017 at 06:55:33AM -0500, Tom St Denis wrote:
> On 13/02/17 05:00 AM, Nils Holland wrote:
> > On Sat, Feb 04, 2017 at 06:44:12PM +, StDenis, Tom wrote:
> >> Hello all,
> >>
> >>
> >> We're pleased to announce the initial public release of the AMDGPU
> >> User Mode Register debug
On 13/02/17 05:00 AM, Nils Holland wrote:
On Sat, Feb 04, 2017 at 06:44:12PM +, StDenis, Tom wrote:
Hello all,
We're pleased to announce the initial public release of the AMDGPU
User Mode Register debugger (umr). This tool allows privileged
users to read and write GPU registers in order t
On 13.02.2017 03:39, Dave Airlie wrote:
Is there any plans or would it be possible to add some sort of info on what you
are looking at with UMR. Say the GRBM busy states what sort of meaning
can be extracted from the percentage values etc, can you say with how busy
some of the blocks are what sho
On Sat, Feb 04, 2017 at 06:44:12PM +, StDenis, Tom wrote:
> Hello all,
>
>
> We're pleased to announce the initial public release of the AMDGPU
> User Mode Register debugger (umr). This tool allows privileged
> users to read and write GPU registers in order to diagnose, debug,
> and aid in d
Am 11.02.2017 um 01:27 schrieb ozeng:
Initialized PIPE_ORDER_TS0/1/2/3 field of SPI_ARB_PRIORITY register to 2.
This set the pipe priority order to:
02 - HP3D, CS_H, GFX, CS_M, CS_L
Change-Id: I1e89a2fdcf45a99808f0f5b3cbd83ae537174023
Signed-off-by: Oak Zeng
Reviewed-by: Christian König .
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