[PATCH] amdgpu: add interface for reserve/unserve vmid v2

v2: delete unused comments. Change-Id: If533576eb8a65bd019a3480d6fe2a64f23e3c944 Signed-off-by: Chunming Zhou Reviewed-by: Monk Liu --- amdgpu/amdgpu.h| 13 + amdgpu/amdgpu_cs.c | 28 2 files changed, 41

RE: [PATCH 1/5] drm/amdgpu:keep ctx alive till all job finished

You can add ctx as filed of job, but not get reference of it, when you try to use ctx, just check if ctx == NULL. Another stupid method: Use idr_for_each_entry(..job->vm->ctx_mgr...) and compare the job->fence->fence_context with ctx->ring[].entity->fence_context. if not found, then ctx is

RE: [PATCH] drm/amdgpu:fix waiting on dirty fence

Reviewed-by: Chunming Zhou -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Monk Liu Sent: Monday, May 01, 2017 4:18 PM To: amd-gfx@lists.freedesktop.org Cc: Liu, Monk Subject: [PATCH] drm/amdgpu:fix

[PATCH 4/6] drm/amdgpu:cleanups KIQ ring_funcs emit_frame_size

since we don't need hdp flush/inval for KIQ anymore Change-Id: I8518f479afebb73c68ef922880f92dae53b665b9 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 -- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 -- 2 files changed, 4 deletions(-) diff --git

[PATCH 2/6] drm/amdgpu:need som change on vega10 mailbox

if sriov gpu reset is invoked by job timeout, it is run in a global work-queue which is very slow and better not call msleep ortherwise it takes long time to get back CPU. so make below changes: 1: Change msleep 1 to mdelay 5 2: Ignore the ack fail from pf after time out, because VF FLR will

[PATCH 5/6] drm/amdgpu:kiq reg access need timeout(v2)

this is to prevent fence forever waiting if FLR occured during register accessing. v2: use define instead of hardcode for the timeout msec Change-Id: I32cc219a08f5a67654beb26c45d1b95d2b60cc96 Signed-off-by: Monk Liu Reviewed-by: Christian König ---

Re: [PATCH 1/3] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN

On 03/05/17 12:06 AM, Gerd Hoffmann wrote: > >> Removing the definition also removes the possibility to describe a lot >> of pixel formats, so that should definitely be mentioned. I think it >> would also be good to have some kind of justified claim that no >> hardware actually needs the pixel

[PATCH 2/3] GPU-DRM-Radeon: Use seq_puts() in radeon_debugfs_pm_info()

From: Markus Elfring Date: Tue, 2 May 2017 21:50:14 +0200 Two strings which did not contain data format specifications should be put into a sequence. Thus use the corresponding function "seq_puts". This issue was detected by using the Coccinelle software.

[PATCH 1/3] GPU-DRM-Radeon: Use seq_putc() in radeon_sa_bo_dump_debug_info()

From: Markus Elfring Date: Tue, 2 May 2017 21:35:48 +0200 A few single characters should be put into a sequence. Thus use the corresponding function "seq_putc". This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring

[PATCH 0/3] GPU-DRM-Radeon: Fine-tuning for three function implementations

From: Markus Elfring Date: Tue, 2 May 2017 22:00:02 +0200 Three update suggestions were taken into account from static source code analysis. Markus Elfring (3): Use seq_putc() in radeon_sa_bo_dump_debug_info() Use seq_puts() in radeon_debugfs_pm_info() Use

[PATCH 3/3] GPU-DRM-Radeon: Use seq_puts() in r100_debugfs_cp_csq_fifo()

From: Markus Elfring Date: Tue, 2 May 2017 21:54:49 +0200 Strings which did not contain data format specifications should be put into a sequence. Thus use the corresponding function "seq_puts". This issue was detected by using the Coccinelle software.

[PATCH] drm/amdgpu/gfx9: derive tile pipes from golden settings

rather than hardcoding it. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index

[PATCH] drm/amdgpu/gfx: drop max_gs_waves_per_vgt

We already have this info: max_gs_threads. Drop the duplicate. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 - drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 - 3 files changed, 1

Re: [PATCH 1/3] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN

On Tue, May 2, 2017 at 11:06 AM, Gerd Hoffmann wrote: > Radeon and nvidia (nv40) cards where mentioned. I'll try to summarize > (feel free to correct me if I'm wrong). > > nvidia has support for 8 bit-per-color formats only on bigendian hosts. > Not sure whenever this is a

Re: [PATCH 1/3] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN

Hi, > I also think that this patch requires more comments than the > commit message has at the moment. > > Removing the definition also removes the possibility to describe a lot > of pixel formats, so that should definitely be mentioned. I think it > would also be good to have some kind of

RE: [PATCH 07/12] drm/amdgpu/gfx9: wait for completion in KIQ init

> -Original Message- > From: Liu, Monk > Sent: Tuesday, May 02, 2017 4:32 AM > To: Alex Deucher; amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander > Subject: RE: [PATCH 07/12] drm/amdgpu/gfx9: wait for completion in KIQ init > > Reviewed-by: monk liu > > But why

Re: [PATCH] drm/amdgpu: Make amdgpu_bo_reserve use uninterruptible waits for cleanup

I just realised that there are some stress test that sends huge amount of signals. I used those tests in the pass 2 years... -Alex Bin From: Christian König Sent: Monday, May 1, 2017 10:28 AM To: Xie, AlexBin; Michel Dänzer Cc:

Re: [PATCH 08/12] drm/amdgpu: split gfx_v9_0_kiq_init_queue into two

On Tue, May 2, 2017 at 4:34 AM, Liu, Monk wrote: > Why only on GFX9? > > I think this logic should be equal to both GFX8/9 gfx8 is already split like this. This whole series is a port of the gfx8 code to gfx9. Alex > > -Original Message- > From: amd-gfx

Re: [PATCH 1/3] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN

On Tue, 2 May 2017 14:53:43 +0100 Emil Velikov wrote: > Hi Gerd, > > I did not have the change to follow through the discussion. > Pardon if my suggestion have already been discussed. > > On 2 May 2017 at 14:34, Gerd Hoffmann wrote: > > It's

Re: [PATCH 1/3] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN

> > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > > index 995c8f9c69..305bc34be0 100644 > > --- a/include/uapi/drm/drm_fourcc.h > > +++ b/include/uapi/drm/drm_fourcc.h > > @@ -33,8 +33,6 @@ extern "C" { > > #define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b)

RE: [PATCH xf86-video-ati 2/2] Use reference counting for tracking KMS framebuffer lifetimes

> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Michel Dänzer > Sent: Tuesday, May 02, 2017 3:41 AM > To: amd-gfx@lists.freedesktop.org > Subject: [PATCH xf86-video-ati 2/2] Use reference counting for tracking KMS > framebuffer lifetimes >

Re: [PATCH] drm/amd/powerplay: set fan target temperature by msg on vega10.

On Tue, May 2, 2017 at 5:49 AM, Rex Zhu wrote: > SMU not support FanTargetTemperature in pptable, > so send msg instand. > > Change-Id: Idc9cec95fb8d4f1479f727c8693c1186d28b5435 > Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher >

Re: [PATCH 2/2] drm/amd/powerplay: set soc floor voltage on boot on vega10.

On Tue, May 2, 2017 at 4:56 AM, Rex Zhu wrote: > Send the VBIOS bootup VDDC as a SOC floor voltage to SMU > before populating the PPTABLE. After DPM is enabled, This > floor voltage will be removed. This will prevent SMC from > going to Vmin upon receiving PPTable causing a

Re: [PATCH] drm/amd/powerplay: correct LoadLineResistance value in pptable.

On Tue, May 2, 2017 at 2:49 AM, Rex Zhu wrote: > this value is used by avfs to adjust inversion voltage. > > Change-Id: Ic6520c184ae938384d9f5e1590ecaf864fa9f95a > Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher > --- >

Re: [PATCH] drm/amd/powerplay: Allow duplicate enteries in pptable.

On Tue, May 2, 2017 at 2:41 AM, Rex Zhu wrote: > Change-Id: Iae711f1a33264c44a6819f78e345aba50456861f > Signed-off-by: Rex Zhu Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 8 > 1

Re: [PATCH 1/3] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN

Hi Gerd, I did not have the change to follow through the discussion. Pardon if my suggestion have already been discussed. On 2 May 2017 at 14:34, Gerd Hoffmann wrote: > It's unused. > > Suggested-by: Daniel Vetter > Signed-off-by: Gerd Hoffmann

[PATCH 3/3] drm: fourcc byteorder: add drm_mode_legacy_fb_format_he

Add drm_mode_legacy_fb_format variant which returns fourcc codes for framebuffer format in host byte order. Signed-off-by: Gerd Hoffmann --- include/drm/drm_fourcc.h | 3 +++ drivers/gpu/drm/drm_fourcc.c | 54 +++- 2 files changed,

[PATCH 2/3] drm: fourcc byteorder: add DRM_FORMAT_CPU_*

Add fourcc variants in cpu byte order. With these at hand we don't need #ifdefs in drivers want support framebuffers in cpu endianess. Signed-off-by: Gerd Hoffmann --- include/drm/drm_fourcc.h | 12 1 file changed, 12 insertions(+) diff --git

[PATCH 0/3] drm: tackle byteorder issues, take three ...

Hi, Ok, next round. Patches 1+2 are unmodified, driver updates are left out for now. Patch #3 adds a new drm_mode_legacy_fb_format_he() function instead of changing drm_mode_legacy_fb_format behavior, so we keep things working for now. Comments? Suggestions how to handle the

[PATCH 1/3] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN

It's unused. Suggested-by: Daniel Vetter Signed-off-by: Gerd Hoffmann --- include/uapi/drm/drm_fourcc.h | 2 -- drivers/gpu/drm/drm_fourcc.c | 3 +-- drivers/gpu/drm/drm_framebuffer.c | 2 +- 3 files changed, 2 insertions(+), 5 deletions(-)

[PATCH] drm/amd/powerplay: set fan target temperature by msg on vega10.

SMU not support FanTargetTemperature in pptable, so send msg instand. Change-Id: Idc9cec95fb8d4f1479f727c8693c1186d28b5435 Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c | 5 + 1 file changed, 5 insertions(+) diff --git

[PATCH 1/2] drm/amd/powerplay: refine code in vega10_smumgr.c

1. return error code instand of -1. 2. print msg info if send msg failed Change-Id: I40529e4002f4f1fef7aca93e05bf1bd5f285d068 Signed-off-by: Rex Zhu --- .../gpu/drm/amd/powerplay/smumgr/vega10_smumgr.c | 78 +++--- 1 file changed, 39 insertions(+), 39

[PATCH 2/2] drm/amd/powerplay: set soc floor voltage on boot on vega10.

Send the VBIOS bootup VDDC as a SOC floor voltage to SMU before populating the PPTABLE. After DPM is enabled, This floor voltage will be removed. This will prevent SMC from going to Vmin upon receiving PPTable causing a violation. Change-Id: Ieff3c7ffe58b8ec83127d90ca2bb1761a5c71462

RE: [PATCH 07/12] drm/amdgpu/gfx9: wait for completion in KIQ init

Reviewed-by: monk liu But why we need to do this ? even kiq hasn't yet finished MAP_QUEUES, we can still put ring test package to KCQ, And KCQ will begin to work after the MAP_QUEUES finished BR Monk -Original Message- From: amd-gfx

RE: [PATCH 11/12] drm/amdgpu/gfx9: fix resume of KIQ and KCQs (v2)

Alex Although the MQD state is recovered after reset, that doesn't mean ring buffer is also restored to the state driver first loaded , Clear ring is safe compared with not clean it. But if driver can guarantee the wptr and rptr are equal after gpu reset, the ring clearing can be avoided

RE: [PATCH 09/12] drm/amdgpu/gfx9: wait once for all KCQs to be created

Reviewed-by: monk liu -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex Deucher Sent: Tuesday, May 02, 2017 6:29 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH

RE: [PATCH 08/12] drm/amdgpu: split gfx_v9_0_kiq_init_queue into two

Why only on GFX9? I think this logic should be equal to both GFX8/9 -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex Deucher Sent: Tuesday, May 02, 2017 6:29 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander

RE: [PATCH 05/12] drm/amdgpu: add KIQ packet defines to soc15d.h

Reviewed-by: monk liu -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex Deucher Sent: Tuesday, May 02, 2017 6:29 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH

RE: [PATCH 04/12] drm/amdgpu/gfx9: clear the compute ring on reset

Reviewed-by: monk liu -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex Deucher Sent: Tuesday, May 02, 2017 6:29 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH

RE: [PATCH 03/12] drm/amdgpu/gfx9: create mqd backups

Reviewed-by: monk liu -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex Deucher Sent: Tuesday, May 02, 2017 6:29 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH

RE: [PATCH 02/12] drm/amdgpu/gfx9: add additional MQD initialization

Reviewed-by: monk liu -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex Deucher Sent: Tuesday, May 02, 2017 6:29 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH

RE: [PATCH 01/12] drm/amdgpu/gfx9: fix typo in mpd init

Reviewed-by: monk liu -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Alex Deucher Sent: Tuesday, May 02, 2017 6:29 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander Subject: [PATCH

Re: [PATCH] drm/amdgpu/gfx9: use actual gpu num se setting for ngg allocation

Am 01.05.2017 um 22:22 schrieb Alex Deucher: Rather than using a hardcoded value. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

Re: [PATCH] drm/amdgpu: update revision id settings for BR/ST

Am 01.05.2017 um 22:15 schrieb Alex Deucher: Add new RIDs. Acked-by: Alex Xie Signed-off-by: Alex Deucher Acked-by: Christian König --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 12 1 file changed, 12

[PATCH xf86-video-ati 1/2] Pass pixmap instead of handle to radeon_do_pageflip

From: Michel Dänzer This brings us in line with amdgpu and prepares for the following change, no functional change intended. Signed-off-by: Michel Dänzer --- src/drmmode_display.c | 8 ++-- src/drmmode_display.h | 2 +- src/radeon_dri2.c

[PATCH xf86-video-ati 2/2] Use reference counting for tracking KMS framebuffer lifetimes

From: Michel Dänzer References are held by the pixmaps corresponding to the FBs (so the same KMS FB can be reused as long as the pixmap exists) and by the CRTCs scanning out from them (so a KMS FB is only destroyed once it's not being scanned out anymore, preventing

[PATCH] drm/amd/powerplay: correct LoadLineResistance value in pptable.

this value is used by avfs to adjust inversion voltage. Change-Id: Ic6520c184ae938384d9f5e1590ecaf864fa9f95a Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c | 4 ++-- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c | 4 ++--

[PATCH] drm/amd/powerplay: Allow duplicate enteries in pptable.

Change-Id: Iae711f1a33264c44a6819f78e345aba50456861f Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c