> If you add this here, you should add the ids file itself and make libdrm
> install it too...
? Here the ids file is separate from libdrm. It is passed during compilation so
that libdrm knows where to get it.
> You can't use strtok() in a library. Any other thread may call strtok()
> anytime
On 17-05-12 04:43 AM, Christian König wrote:
> Am 12.05.2017 um 10:37 schrieb zhoucm1:
>>
>>
>>
>> If the sdma is faster, even they wait for finish, which time is
>> shorter than CPU, isn't it? Of course, the precondition is sdma is
>> exclusive. They can reserve a sdma for PT updating.
>>
>
> No,
Hi Christian,
One comment inline [FK]. If this is not a problem, then feel free to add
my R-B for the whole series.
Kent, when we adopt this change, we need to convert the PDE back to an
address, because KFD needs to fill just the page directory base address
into the map_process HIQ packet. I thi
Yeah, there's still a patch in the queue that should fix it. Just didn't
make this push.
Harry
On 2017-05-12 11:53 AM, Tom St Denis wrote:
Still getting noise in dmesg with DCN enabled on my carrizo/vega10
setup. It's otherwise fine.
Tom
On 12/05/17 11:20 AM, Harry Wentland wrote:
* Fix
My understanding is this is actually a data file. Similar to amdgpu firmware,
which is also separate from the kernel source code.
Sam
-Original Message-
From: Michel Dänzer [mailto:mic...@daenzer.net]
Sent: Thursday, May 11, 2017 8:50 PM
To: Li, Samuel
Cc: amd-gfx@lists.freedesktop.or
From: Pratik Vishwakarma
DRM_IOCTL_MODE_GETCONNECTOR fails with EINVAL on enabling DRIVER_ATOMIC
With this DRM_IOCTL_MODE_GETCONNECTOR returns all the connector properties.
freesync_property and freesync_capable_property return 0 currently.
TESTS(On Chromium OS on Stoney Only)
* Builds without c
Change-Id: I0446e77334b14287614b21fe847afe44e4c5bac4
Signed-off-by: Harry Wentland
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/inc/core_types.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_typ
We should also use it to determine pipe count.
Change-Id: I8ce59db6cbe6a2fe020a9797cd988dcfc79caa06
Signed-off-by: Harry Wentland
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(
From: Tony Cheng
Change-Id: I7140155a62c2a25ba888cb02e93ecff5df54f61e
Signed-off-by: Tony Cheng
Reviewed-by: Yongqiang Sun
Acked-by: Harry Wentland
---
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 30 +-
1 file changed, 23 insertions(+), 7 deletions(-)
diff --git
From: Anthony Koo
- Add functionality to get real hw backlight level as opposed to user
level, meaning the level that takes into account backlight ramping
over time and backlight reduction due to Varibright
- Add backlight optimization which allows for a second OS state
that is able to control AB
From: Dmytro Laktyushkin
Change-Id: I8a8430148070cb3356273c498516d73bfeb986c8
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc
From: Andrey Grodzovsky
Header change for DAL change under same name.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_
From: Dmytro Laktyushkin
Change-Id: I8747a1bb298e57824515f126990429dbbca05ecd
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 47 +---
1 file changed, 13 insertions(+), 34 deletions(-
From: Yongqiang Sun
Change-Id: I7e8bdb19296bb703e47d906c5213e7ad6e187cf4
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/calc
From: Dmytro Laktyushkin
Change-Id: Icc68c0d9e6fc589492148a2bd122d34ada78555b
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 60 +++
drivers/gpu/drm/amd/display/dc/dc_hw_types.h
From: Charlene Liu
[Description]
DPM0, FCLK=MCLK, single channel bandwidth = dual channel bandwidth
for the rest of the DPM levels, single channel bandwidth = 1/2 dual channel
bandwidth
Change-Id: I0761edfe3346a0a8162e3acbb4a193bcc313727d
Signed-off-by: Charlene Liu
Reviewed-by: Dmytro Laktyu
From: Dmytro Laktyushkin
Change-Id: I7ce6668c865e9f8542a3bf5cc15d7474c0578eb5
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 28 +++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --g
From: Dmytro Laktyushkin
Change-Id: I998aadaee02116230951c3899e784708487225e5
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Dmytro Laktyushkin
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 41
1 file changed, 34 insertions(+), 7 dele
From: Andrey Grodzovsky
Link index is an unnecessery level of inderection when
calling from kernel i2c/aux transfer into DAL.
Change-Id: I3413e46e12a8134f6be521a39884688f6caa1b56
Signed-off-by: Andrey Grodzovsky
Change-Id: If9962dc66a4e0298b02fdc61c9579c843f959cdd
Signed-off-by: Andrey Grodzov
From: Andrey Grodzovsky
Problem :
A race between two adjecent page flips makes the earlier one
to release an alocated frame buffer for the subsequent one -
since there are 2 frambuffer swapped back and forth between flips,
the 'new' fb of the later flip is actually the 'previous' fb for the earli
From: Ken Chalmers
Not necessarily a fatal problem - some monitors will recover and show
the stream anyway if link training fails.
Change-Id: I9c6245066c3a8b80b8c40155086fe3c330752208
Signed-off-by: Ken Chalmers
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display
From: Amy Zhang
Change-Id: I110d0986279259a912c3b44545fbde52091b4690
Signed-off-by: Amy Zhang
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 46 ++
drivers/gpu/drm/amd/display/dc/dc.h| 14 +++
From: Corbin McElhanney
Change-Id: I4e62756222da304a8ba378c2436ca8cda626273e
Signed-off-by: Corbin McElhanney
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gp
From: Leon Elazar
Change-Id: Ib83bcc1d2cb23b409af8765b725f82d5ec5ca574
Signed-off-by: Leon Elazar
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn
If user is using DVI->HDMI dongle dual link signal might pose a
problem. Keep single link signal type if clk is lower than
max tmds clk.
Change-Id: I6ad1009bb195e0d1ba91a9801c6125778419f739
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 9 ++---
1 file
From: Dmytro Laktyushkin
Change-Id: I3ebf4168ab6669017c593d43707d812d20c4163b
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driver
From: Anthony Koo
Change-Id: Ie7955fcbbd19540fee0cb656a8bae5cace7bc4aa
Signed-off-by: Anthony Koo
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/
From: Sun peng Li
Revert "SWDEV-114487 - dm/amdgpu: Add lock around updating freesync property"
This reverts commit b54fd07f238a01f1155c9e2b378e148e5df2c548.
Change-Id: Id0e10630bfc730eddcd964bdb654a9445d498032
Reviewed-by: Jordan Lazare
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/displ
From: Dmytro Laktyushkin
Change-Id: I69c6358b9dd01f4cb399b017d4b23ffc67bb710a
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c | 18 ++---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 79 +
From: Yongqiang Sun
Change-Id: Ifcf2bba5d0ac0200ae406e27407afdf237d13aa2
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git
From: Dmytro Laktyushkin
Change-Id: I9da890ac9e52292092f8579449550b8e79c8f1fb
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../amd/display/dc/dce110/dce110_hw_sequencer.c| 50 +++---
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c |
Change-Id: I3e5b4f95429a959d0981ba57f23bd4d9fc60a604
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 8
drivers/gpu/drm/amd/display/dc/dce/dce_abm.c| 23 +++
drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c | 11 ---
dri
From: Dmytro Laktyushkin
Change-Id: I9d88231521821e01f79dc7aa942659ba240d1eac
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Change-Id: I62c019ec028d66339dea98dbbae00da07873aa92
Signed-off-by: Harry Wentland
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b
Change-Id: Ia910c1f4467c5bdbc7d1ee28ed9265c090cc184e
Signed-off-by: Harry Wentland
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/inc/core_types.h | 4
drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h | 2 ++
drivers/gpu/drm/amd/display/dc/inc/hw/opp.h
* Fix deadlock when plugging MST display
* Fix DVI->HDMI dongles
* Bunch of raven bandwidth changes
* Some more cleanup for i2c/aux
Amy Zhang (1):
drm/amd/display: Move output transfer function to stream updates
Andrey Grodzovsky (4):
drm/amd/display: i2c Remove link index.
drm/amd/disp
From: Andrey Grodzovsky
Header change for DAL change under same name.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
b/drivers/gpu/drm/amd/amdgpu/amd
From: Christian König
512 is enough for one PD entry on Vega10.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
inde
From: Christian König
That GFX9 needs a PDE in the registers is entirely GFX9 specific.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 ++---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/uv
From: Christian König
Rename adjust_mc_addr to get_vm_pde, check the address bits in one place and
move setting the valid bit in there as well.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 34
On Fri, May 12, 2017 at 10:34:55AM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> This interface allows importing the fence from a sync_file into
> an existing drm sync object, or exporting the fence attached to
> an existing drm sync object into a new sync file object.
>
> This should only b
On Fri, May 12, 2017 at 10:34:54AM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> This interface will allow sync object to be used to back
> Vulkan fences. This API is pretty much the vulkan fence waiting
> API, and I've ported the code from amdgpu.
>
> v2: accept relative timeout, pass remai
On Fri, May 12, 2017 at 10:34:53AM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> Sync objects are new toplevel drm object, that contain a
> pointer to a fence. This fence can be updated via command
> submission ioctls via drivers.
>
> There is also a generic wait obj API modelled on the vulk
On Fri, May 12, 2017 at 12:19 AM, Samuel Li wrote:
> From: Xiaojie Yuan
>
> v2: fix an off by one error and leading white spaces
>
> Change-Id: I12216da14910f5e2b0970bc1fafc2a20b0ef1ba9
> Reviewed-by: Junwei Zhang
> Signed-off-by: Samuel Li
> ---
> amdgpu/Makefile.am | 2 +
> amdgpu/Ma
Am 12.05.2017 um 11:18 schrieb Yintian Tao:
If doorbell is used for wptr update, we also need to use it
to initialize wptr to 0.
Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06
Signed-off-by: Yintian Tao
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 6 ++-
Hi Christian,
On Wednesday 10 May 2017 13:30:37 Christian König wrote:
> Am 10.05.2017 um 02:23 schrieb Michel Dänzer:
> > On 03/05/17 09:46 PM, Christian König wrote:
> >> Am 02.05.2017 um 22:04 schrieb SF Markus Elfring:
> >>> From: Markus Elfring
> >>> Date: Tue, 2 May 2017 22:00:02 +0200
> >>
Signed-off-by: Tom St Denis
---
src/app/top.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/app/top.c b/src/app/top.c
index a4d3aa8e699d..09ab5f40de0b 100644
--- a/src/app/top.c
+++ b/src/app/top.c
@@ -813,8 +813,8 @@ static void top_build_vi_program(struct umr_asic
On 11/05/17 07:33 PM, Tom St Denis wrote:
On 11/05/17 02:35 PM, Alex Deucher wrote:
These are the laste of the gfx9 KIQ patches that haven't landed yet. Can
someone with gfx9 capable hw test this (vega10 or raven)? This is needed
to enable powergating on gfx9.
Thanks,
If nobody gets to it b
If doorbell is used for wptr update, we also need to use it
to initialize wptr to 0.
Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/am
From: Michel Dänzer
Remember the shared pixmap passed to drmmode_set_scanout_pixmap for each
CRTC, and just compare against that.
Fixes leaving stale entries in ScreenRec::pixmap_dirty_list under some
circumstances, which would usually result in use-after-free and a crash
down the line.
(Ported
If doorbell is used for wptr update, we also need to use it
to initialize wptr to 0.
Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/dr
On Thu, May 11, 2017 at 11:23:11PM +0200, Pavel Machek wrote:
> On Fri 2017-04-21 14:08:04, Ville Syrjälä wrote:
> > On Fri, Apr 21, 2017 at 11:50:18AM +0200, Gerd Hoffmann wrote:
> > > On Fr, 2017-04-21 at 12:25 +0300, Ville Syrjälä wrote:
> > > > On Fri, Apr 21, 2017 at 09:58:24AM +0200, Gerd Hof
Am 12.05.2017 um 10:49 schrieb Chris Wilson:
On Fri, May 12, 2017 at 10:34:54AM +1000, Dave Airlie wrote:
+static int drm_syncobj_wait_all_fences(struct drm_device *dev,
+ struct drm_file *file_private,
+ struct drm_syncob
On Fri, May 12, 2017 at 10:34:54AM +1000, Dave Airlie wrote:
> +static int drm_syncobj_wait_all_fences(struct drm_device *dev,
> +struct drm_file *file_private,
> +struct drm_syncobj_wait *wait,
> +
On 2017年05月12日 16:43, Christian König wrote:
Am 12.05.2017 um 10:37 schrieb zhoucm1:
On 2017年05月12日 16:33, Christian König wrote:
Am 12.05.2017 um 10:25 schrieb zhoucm1:
On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote:
Hi,
Please review the patch set that supports amdgpu VM update v
Am 12.05.2017 um 10:37 schrieb zhoucm1:
On 2017年05月12日 16:33, Christian König wrote:
Am 12.05.2017 um 10:25 schrieb zhoucm1:
On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote:
Hi,
Please review the patch set that supports amdgpu VM update via CPU. This
feature provides improved performa
On 2017年05月12日 16:33, Christian König wrote:
Am 12.05.2017 um 10:25 schrieb zhoucm1:
On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote:
Hi,
Please review the patch set that supports amdgpu VM update via CPU. This
feature provides improved performance for compute (HSA) where mapping /
un
Am 12.05.2017 um 02:34 schrieb Dave Airlie:
From: Dave Airlie
This creates a new command submission chunk for amdgpu
to add in and out sync objects around the submission.
Sync objects are managed via the drm syncobj ioctls.
The command submission interface is enhanced with two new
chunks, one
Am 12.05.2017 um 10:25 schrieb zhoucm1:
On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote:
Hi,
Please review the patch set that supports amdgpu VM update via CPU. This
feature provides improved performance for compute (HSA) where mapping /
unmapping is carried out (by Kernel) independent o
Am 12.05.2017 um 10:21 schrieb Yintian Tao:
If doorbell is used for wptr update, we also need to use it
to initialize wptr to 0.
Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 3 ++-
1 file changed, 2 insertions(+)
Am 12.05.2017 um 04:39 schrieb Harish Kasiviswanathan:
If amdgpu.vm_update_context param is set to use CPU, then Page
Directories will be updated by CPU instead of SDMA
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 141 +++--
1
On 2017年05月10日 05:47, Kasiviswanathan, Harish wrote:
Hi,
Please review the patch set that supports amdgpu VM update via CPU. This
feature provides improved performance for compute (HSA) where mapping /
unmapping is carried out (by Kernel) independent of command submissions (done
directly by
Am 12.05.2017 um 04:39 schrieb Harish Kasiviswanathan:
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 82 +-
1 file changed, 81 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/
Am 12.05.2017 um 04:39 schrieb Harish Kasiviswanathan:
Add VM context module param (amdgpu.vm_update_context) that can used to
control how the VM pde/pte are updated for Graphics and Compute.
BIT0 controls Graphics and BIT1 Compute.
BIT0 [= 0] Graphics updated by SDMA [= 1] by CPU
BIT1 [= 0]
On Fri, May 12, 2017 at 10:34:54AM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> This interface will allow sync object to be used to back
> Vulkan fences. This API is pretty much the vulkan fence waiting
> API, and I've ported the code from amdgpu.
>
> v2: accept relative timeout, pass remai
On Fri, May 12, 2017 at 10:34:53AM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> Sync objects are new toplevel drm object, that contain a
> pointer to a fence. This fence can be updated via command
> submission ioctls via drivers.
>
> There is also a generic wait obj API modelled on the vulk
On Fri, May 12, 2017 at 10:34:55AM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> This interface allows importing the fence from a sync_file into
> an existing drm sync object, or exporting the fence attached to
> an existing drm sync object into a new sync file object.
>
> This should only b
Hi Alex,
Comment below
Den 11 maj 2017 7:59 em skrev "Alex Deucher" :
Check to make sure the vblank period is long enough to support
mclk switching.
bug: https://bugs.freedesktop.org/show_bug.cgi?id=96868
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 31
+
Hi, Alex
Shouldn't the function return true when the refresh rate > 120? If so, same
comment on patch 2.
BR
Nils
Den 11 maj 2017 7:59 em skrev "Alex Deucher" :
Even if the vblank period would allow it, it still seems to
be problematic on some cards.
bug: https://bugs.freedesktop.org/show_bug.
Am 12.05.2017 um 01:10 schrieb Alex Deucher:
It's stored in LE format.
Signed-off-by: Alex Deucher
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/amd
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