RE: [PATCH 06/18] drm/amdgpu/sriov:fix memory leak after gpu reset

Oh, I see your point, but that actually presents for a cleanup patch, and mine is to add a condition to fix memory leak, I think they different purpose and should be separated, I can add one more patch to cleanup it with that "create_bo_kenel" to make code more tight and clean BR Monk

RE: [PATCH 04/18] drm/amdgpu/sriov:don't load psp fw during gpu reset

This condition is wrong, you are right, and I followed up a patch to correct it Should be : If (!amdgpu_sriov_vf()) || !adev->in_reset) BR Monk -Original Message- From: Quan, Evan Sent: 2017年9月20日 9:32 To: Koenig, Christian ; Liu, Monk ;

RE: [PATCH 04/18] drm/amdgpu/sriov:don't load psp fw during gpu reset

Hi Monk, I think your change affects barematal case. Per my confirmation, vega10 cannot boot with the change applied. If the change is only intended to cover gpu reset case of sriov, maybe the logic should be If (!(amdgpu_sriov_vf(adev) && adev->in_sriov_reset)) Regards, Evan >-Original

Re: [PATCH v2 1/1] drm/amdgpu: Add gem_prime_mmap support

>> +vma->vm_pgoff = amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT; > Maybe better use "vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;", > but I'm not sure. > How other drivers handle this? This is a good catch. Looks like pgoff is honored during prime mmap, not a fake offset here. >> +

Re: [PATCH] drm/amd/amdgpu: Fix iova debugfs for non-iommu case

On 19/09/17 02:33 PM, Christian König wrote: [root@carrizo ~]# xxd -l 1024 -s 0xC /sys/kernel/debug/dri/0/amdgpu_iova Actually 0xC is a special address, e.g. video BIOS if I'm not completely mistaken. Not sure why that would be mapped by the driver but I can also read the kernel's

[PATCH 2/2] drm/amd: Avoid using x86-specific _BITOPS_LONG_SHIFT

Signed-off-by: Felix Kuehling --- drivers/gpu/drm/amd/include/linux/chash.h | 22 +++--- 1 file changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/include/linux/chash.h b/drivers/gpu/drm/amd/include/linux/chash.h index

[PATCH 1/2] drm/amd: Use portable do_div helper

Signed-off-by: Felix Kuehling --- drivers/gpu/drm/amd/lib/chash.c | 30 +++--- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/lib/chash.c b/drivers/gpu/drm/amd/lib/chash.c index 1bc4287..e07e6f3 100644 ---

Re: [PATCH] drm/amdgpu: clarify license in amdgpu_trace_points.c

Fine from my end. Acked-by: Dave Airlie Dave. On 20 September 2017 at 00:27, Christian König wrote: > Am 19.09.2017 um 16:22 schrieb Alex Deucher: >> >> It was not clear. The rest of the driver is MIT/X11. >> >> Signed-off-by: Alex Deucher

[PATCH 2/4] drm/amd/powerplay: add register thermal interrupt in hwmgr_hw_init

Signed-off-by: Eric Huang --- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 75 - drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 6 +++ 2 files changed, 80 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c

[PATCH 0/4] some changes for thermal interrupts

Eric Huang (4): drm/amdgpu: add cgs query info of pci bus devfn drm/amd/powerplay: add register thermal interrupt in hwmgr_hw_init drm/amd/powerplay: implement register thermal interrupt for Vega10 drm/amd/powerplay: change alert temperature range drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

[PATCH 4/4] drm/amd/powerplay: change alert temperature range

Change to more meaningful range that triggers thermal interrupts. Signed-off-by: Eric Huang --- drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH 2/2] drm/amdgpu: Add copy_pte_num_dw member in amdgpu_vm_pte_funcs

Use it to replace the hard coded value in amdgpu_vm_bo_update_mapping(). Change-Id: I85d89d401b8dbcf01ca9c55c281e552db874fde5 Signed-off-by: Yong Zhao --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 4 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 2 +-

[PATCH 1/4] drm/amdgpu: add cgs query info of pci bus devfn

Signed-off-by: Eric Huang --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 3 +++ drivers/gpu/drm/amd/include/cgs_common.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c index

Re: [PATCH] drm/amd/amdgpu: Fix iova debugfs for non-iommu case

[root@carrizo ~]# xxd -l 1024 -s 0xC /sys/kernel/debug/dri/0/amdgpu_iova Actually 0xC is a special address, e.g. video BIOS if I'm not completely mistaken. Take a look at /proc/iomem and try reading something which is marked as "System RAM". If that still works we are lost and

Re: [PATCH] drm/amd/amdgpu: Fix iova debugfs for non-iommu case

As I predicted ... [root@carrizo ~]# xxd -l 1024 -s 0xC /sys/kernel/debug/dri/0/amdgpu_iova 000c: 55aa 74e9 a902 U.t. 000c0010: 4c02 4942 L.IB 000c0020: 4daa 2e93 0004

[PATCH] drm/amd/amdgpu: Fix iova debugfs for non-iommu case (v2)

Signed-off-by: Tom St Denis (v2): Don't create iova file when iommu is disabled --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index

[PATCH 1/2] drm/amdgpu: Fix a bug in amdgpu_fill_buffer()

When max_bytes is not 8 bytes aligned and bo size is larger than max_bytes, the last 8 bytes in a ttm node may be left unchanged. For example, on pre SDMA 4.0, max_bytes = 0x1f, and the bo size is 0x20, the problem will happen. In order to fix the problem, we separately store the max nums

Re: [PATCH] drm/amd/amdgpu: Fix iova debugfs for non-iommu case

On 19/09/17 01:18 PM, Christian König wrote: Am 19.09.2017 um 19:14 schrieb Tom St Denis: On 19/09/17 01:10 PM, Christian König wrote: As far as I know we don't need #ifdefs cause there are dummy functions when IOMMU is not compiled in. But this patch is a NAK since it circumvents the

Re: [PATCH] drm/amd/amdgpu: Fix iova debugfs for non-iommu case

Am 19.09.2017 um 19:14 schrieb Tom St Denis: On 19/09/17 01:10 PM, Christian König wrote: As far as I know we don't need #ifdefs cause there are dummy functions when IOMMU is not compiled in. But this patch is a NAK since it circumvents the /dev/mem restriction when IOMMU is disabled and

Re: [PATCH] drm/amd/amdgpu: Fix iova debugfs for non-iommu case

On 19/09/17 01:10 PM, Christian König wrote: As far as I know we don't need #ifdefs cause there are dummy functions when IOMMU is not compiled in. But this patch is a NAK since it circumvents the /dev/mem restriction when IOMMU is disabled and that is not something we can easily allow. I

Re: [PATCH] drm/amd/amdgpu: Fix iova debugfs for non-iommu case

As far as I know we don't need #ifdefs cause there are dummy functions when IOMMU is not compiled in. But this patch is a NAK since it circumvents the /dev/mem restriction when IOMMU is disabled and that is not something we can easily allow. Regards, Christian. Am 19.09.2017 um 17:36

[PATCH 0/2] [reference] Disable implicit sync for non-wsi bos

This is a reference patch series for the kernel series: "drm/amdgpu: introduce AMDGPU_GEM_CREATE_EXPLICIT_SYNC v2" Andres Rodriguez (2): radv: factor out radv_alloc_memory radv: disable implicit sync for radv allocated bos v2 src/amd/vulkan/radv_device.c | 22

[PATCH 2/2] radv: disable implicit sync for radv allocated bos v2

Implicit sync kicks in when a buffer is used by two different amdgpu contexts simultaneously. Jobs that use explicit synchronization mechanisms end up needlessly waiting to be scheduled for long periods of time in order to achieve serialized execution. This patch disables implicit synchronization

[PATCH 1/2] radv: factor out radv_alloc_memory

This allows us to pass extra parameters to the memory allocation operation that are not defined in the vulkan spec. This is useful for internal usage. Signed-off-by: Andres Rodriguez --- src/amd/vulkan/radv_device.c | 19 ++- src/amd/vulkan/radv_private.h |

Re: [PATCH] drm/amdgpu: introduce AMDGPU_GEM_CREATE_EXPLICIT_SYNC v2

Hi Andres, The explicit sync should not be used for DrI3 and DRI2 but for cross process memory sharing, right? We still have to rely on implicit sync to guarantee the. Correct order of rendering and present. Could you confirm? Thanks. Sent from my iPhone On 19 Sep 2017, at 9:57 PM, Andres

Re: [PATCH] drm/amd/amdgpu: add support for iova_to_phys to replace TTM trace (v5)

Booting with IOMMU disabled in the bios breaks this. I'll submit a fix in a minute. Should be easy. Tom On 19/09/17 11:25 AM, Tom St Denis wrote: On 19/09/17 11:17 AM, Deucher, Alexander wrote: -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf

Re: [PATCH] drm/amd/amdgpu: add support for iova_to_phys to replace TTM trace (v5)

On 19/09/17 11:17 AM, Deucher, Alexander wrote: -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Tom St Denis Sent: Tuesday, September 19, 2017 8:13 AM To: amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: [PATCH] drm/amd/amdgpu: add

Re: [PATCH] drm/amdgpu: clarify license in amdgpu_trace_points.c

Am 19.09.2017 um 16:22 schrieb Alex Deucher: It was not clear. The rest of the driver is MIT/X11. Signed-off-by: Alex Deucher Reviewed-by: Christian König --- Dave, any objections? drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.c |

Re: [PATCH 3/3] drm/amdgpu:fix typo

On Tue, Sep 19, 2017 at 2:41 AM, Monk Liu wrote: > previously a patch has typo error, correct it Please squash this into the previous broken patch before committing it. Alex > > Change-Id: I91bcefd7148b5db1c7d957c868e13a46ca40ef74 > Signed-off-by: Monk Liu

[PATCH] drm/amdgpu: clarify license in amdgpu_trace_points.c

It was not clear. The rest of the driver is MIT/X11. Signed-off-by: Alex Deucher --- Dave, any objections? drivers/gpu/drm/amd/amdgpu/amdgpu_trace_points.c | 19 +++ 1 file changed, 19 insertions(+) diff --git

Re: [PATCH] drm/amdgpu: introduce AMDGPU_GEM_CREATE_EXPLICIT_SYNC v2

Correct. The idea is to only set AMDGPU_GEM_CREATE_EXPLICIT_SYNC for buffers that are not associated with dri2/3 or PRIME. Regards, Andres On 2017-09-19 10:10 AM, Mao, David wrote: Hi Andres, The explicit sync should not be used for DrI3  and DRI2 but for cross process memory sharing,

Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp invalidate

On Tue, Sep 19, 2017 at 4:30 AM, Christian König wrote: > I don't know why, but the HDP is generally not part of the register spec. > > So you can neither find HDP_DEBUG0 nor HDP_READ_CACHE_INVALIDATE in it as > far as I know. > > Point is that the HDP invalidates it's

[PATCH] drm/amdgpu: introduce AMDGPU_GEM_CREATE_EXPLICIT_SYNC v2

Introduce a flag to signal that access to a BO will be synchronized through an external mechanism. Currently all buffers shared between contexts are subject to implicit synchronization. However, this is only required for protocols that currently don't support an explicit synchronization mechanism

Re: [PATCH] drm/amd/amdgpu: add support for iova_to_phys to replace TTM trace (v5)

Am 19.09.2017 um 14:13 schrieb Tom St Denis: Signed-off-by: Tom St Denis Reviewed-by: Christian König (v2): Add domain to iova debugfs (v3): Add true read/write methods to access system memory of pages mapped to the device (v4): Move

[PATCH] drm/amd/amdgpu: add support for iova_to_phys to replace TTM trace (v5)

Signed-off-by: Tom St Denis (v2): Add domain to iova debugfs (v3): Add true read/write methods to access system memory of pages mapped to the device (v4): Move get_domain call out of loop and return on error (v5): Just use kmap/kunmap ---

Re: [PATCH 0/8] Retry page fault handling for Vega10

Am 19.09.2017 um 03:05 schrieb Felix Kuehling: Thanks for the reviews. I rebased this on amd-staging-drm-next, retested and submitted. Christian, do you want to do some graphics PASID and VMFault work on top of that? I think I'll be working on more KFD upstreaming this week and maybe look at

Re: [PATCH 3/3] drm/amdgpu:fix typo

Am 19.09.2017 um 08:41 schrieb Monk Liu: previously a patch has typo error, correct it Change-Id: I91bcefd7148b5db1c7d957c868e13a46ca40ef74 Signed-off-by: Monk Liu Acked-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-

Re: [PATCH 1/3] drm/amdgpu:make ctx_add_fence interruptible(v2)

Am 19.09.2017 um 08:41 schrieb Monk Liu: otherwise a gpu hang will make application couldn't be killed under timedout=0 mode v2: Fix memoryleak job/job->s_fence issue unlock mn remove the ERROR msg after waiting being interrupted Change-Id: I6051b5b3ae1188983f49325a2438c84a6c12374a

Re: [PATCH] drm/amd/amdgpu: add support for iova_to_phys to replace TTM trace (v4)

Am 19.09.2017 um 13:20 schrieb Tom St Denis: Signed-off-by: Tom St Denis (v2): Add domain to iova debugfs (v3): Add true read/write methods to access system memory of pages mapped to the device (v4): Move get_domain call out of loop and return on error ---

RE: [PATCH 13/18] drm/amdgpu:fix driver unloading bug

> Well the question is why does the CPC still needs the MQD commands and how > can we prevent that? You are right, I'll see what can do -Original Message- From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] Sent: 2017年9月19日 16:27 To: Liu, Monk ; Koenig,

Re: [PATCH] drm/amdgpu: add helper to convert a ttm bo to amdgpu_bo

It actually looks like a valid cleanup to me. Patch is Reviewed-by: Christian König . Regards, Christian. Am 19.09.2017 um 05:20 schrieb Andres Rodriguez: This is a small cleanup patch from my initial naive attempt at extracting a TTM bo in amdgpu_sync_resv(). It

Re: [PATCH 2/2] drm/amdgpu: Fix a bug in amdgpu_fill_buffer()

Am 18.09.2017 um 21:18 schrieb Yong Zhao: When max_bytes is not 8 bytes aligned and bo size is larger than max_bytes, the last 8 bytes in a ttm node may be left unchanged. For example, on pre SDMA 4.0, max_bytes = 0x1f, and the bo size is 0x20, the problem will happen. In order to fix

Re: [PATCH 4/4] drm/ttm: Remove TTM dma tracepoint since it's not required anymore

Am 18.09.2017 um 19:33 schrieb Tom St Denis: Signed-off-by: Tom St Denis Mhm, I sometimes have good use for those. But just adding a printk at the right place does the job as well. So patch is Reviewed-by: Christian König . Regards,

Re: [PATCH 1/4] drm/amd/amdgpu: Fold TTM debugfs entries into array (v2)

Am 18.09.2017 um 19:33 schrieb Tom St Denis: Signed-off-by: Tom St Denis Reviewed-by: Christian König (v2): add domains and avoid strcmp --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 54 ++---

Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp invalidate

On 09/19/2017 04:30 PM, Christian König wrote: I don't know why, but the HDP is generally not part of the register spec. AFAIW, these regs may be used for HW guys to debug some special cases. Usually they are not suggested to touch formally. (e.g. GFX cannot access PRT unmap range, but with

[PATCH] drm/amdgpu: simplify trace point code

drm/amdgpu: simplify trace point code amdgpu_trace_points.c does not declare license and it can be replaced by a simpler way. Signed-off-by: Ken Xue --- drivers/gpu/drm/amd/amdgpu/Makefile | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++

Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp invalidate

I don't know why, but the HDP is generally not part of the register spec. So you can neither find HDP_DEBUG0 nor HDP_READ_CACHE_INVALIDATE in it as far as I know. Point is that the HDP invalidates it's read cache on any register write (the register itself doesn't matter). So far we used the

Re: [PATCH 13/18] drm/amdgpu:fix driver unloading bug

Am 19.09.2017 um 06:14 schrieb Liu, Monk: Christian, That sounds at least a bit better. But my question is why doesn't this work like it does on Tonga, e.g. correctly clean things up? Tonga also suffer with this issue, just that we fixed it in the branch for CSP customer and staging code

Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp invalidate

>using this register to replace MM_HDP_DEBUG0 is suggested from a HDP HW guys I'm OK with this line. Thanks for explain. David Zhou On 2017年09月19日 15:00, Liu, Monk wrote: First, I didn't check if windows did this way or not, because I don't sure if windows is always doing the right thing,

RE: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp invalidate

First, I didn't check if windows did this way or not, because I don't sure if windows is always doing the right thing, e.g. for GFX preemption I didn't copy windows scheme and we found couple bugs in windows but not in linux ... So please don't assume we should copy from windows, unless it's

RE: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp invalidate

What question ? please reply here -Original Message- From: Zhou, David(ChunMing) Sent: 2017年9月19日 12:25 To: Liu, Monk ; Koenig, Christian ; amd-gfx@lists.freedesktop.org Subject: RE: [PATCH 12/18] drm/amdgpu:use formal register to trigger hdp

[PATCH 3/3] drm/amdgpu:fix typo

previously a patch has typo error, correct it Change-Id: I91bcefd7148b5db1c7d957c868e13a46ca40ef74 Signed-off-by: Monk Liu --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

[PATCH 2/3] drm/amdgpu/sriov:fix memory leak after gpu reset

GPU reset will require all hw doing hw_init thus ucode_init_bo will be invoked again, which lead to memory leak skip the fw_buf allocation during sriov gpu reset to avoid memory leak. Change-Id: I31131eda1bd45ea2f5bdc50c5da5fc5a9fe9027d Signed-off-by: Monk Liu ---

[PATCH 1/3] drm/amdgpu:make ctx_add_fence interruptible(v2)

otherwise a gpu hang will make application couldn't be killed under timedout=0 mode v2: Fix memoryleak job/job->s_fence issue unlock mn remove the ERROR msg after waiting being interrupted Change-Id: I6051b5b3ae1188983f49325a2438c84a6c12374a Signed-off-by: Monk Liu ---