Hi Christian & Nicolai,
We need to achieve some agreements on what should MESA/UMD do and what should
KMD do, please give your comments with “okay” or “No” and your idea on below
items,
l When a job timed out (set from lockup_timeout kernel parameter), What KMD
should do in TDR routine :
1
Hi Andrey & Christian
Do we really need the mutext lock here?
Libdrm_amdgpu already has the pthread_mutext to protect multi-thread racing
issues, kernel side should be safe with that
BR Monk
-Original Message-
From: Andrey Grodzovsky [mailto:andrey.grodzov...@amd.com]
Sent: Wednesday
From: Dmytro Laktyushkin
This ensures that we do not draw the blank region onscreen, and that we
do underscan instead.
Signed-off-by: Andrew Jiang
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 14 ++
1 file changed, 14 in
From: Dmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_services.c | 6 ++
drivers/gpu/drm/amd/display/dc/basics/logger.c | 78 ++
drivers/gpu/drm/amd/display/dc/basics/log
From: Vitaly Prosyak
When surface bigger then 10 bpc the output pixel
does not match to the required value.Update CRC's.
Signed-off-by: Vitaly Prosyak
Reviewed-by: Jordan Lazare
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h| 6 +-
drivers/gpu/drm/amd/d
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Eric Bernstein
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 1 +
drivers/gpu/drm/amd/display/dc/core/dc.c | 1 +
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 16 +-
drivers/gp
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c
b/drivers/gpu/
From: "Leo (Sunpeng) Li"
dc_create_state() returns NULL on allocation failure. Raise warning when
that happens.
Signed-off-by: Leo (Sunpeng) Li
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm
From: "Leo (Sunpeng) Li"
When scaling is enabled, our preference is to scale up to the prefered
(native) mode. This means that hardware timings will be the same across
a modeset.
Therefore, also report mode as changed if source or destination
rectangle is different.
Signed-off-by: Leo (Sunpeng)
From: "Leo (Sunpeng) Li"
Which removes a lockdep warning for a possible deadlock situation:
While holding the drm event mutex (hard irq safe),
dc_post_update_surfaces_to_stream eventually acquires the atom context
lock, which is hard irq unsafe. We should only be calling it on full
updates anywa
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dml/soc_bounding_box.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/soc_bounding_box.c
b/drivers/gpu
From: Jerry Zuo
To avoid confusion, need to suppress the error message when get
-ERESTARTSYS error code. It is normal when getting interrupted
by signals in the process of a wait for the buffer to become
unreserved. Only propagate to user-mode for further action,
no need to pop up error message.
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c | 3 ++-
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h | 9 +
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git
From: Jerry Zuo
Regression caused by: Ib98354194d7
Need to check crtc->stream before updating cursor attributes
and position.
Signed-off-by: Jerry Zuo
Reviewed-by: Roman Li
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 9 +
1 file changed, 5 insert
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Krunoslav Kovac
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing
From: Bhawanpreet Lakha
fix underscan not being set correctly
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_stream.c| 32 +++-
drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c | 2 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 51 ++
drivers
From: Eric Bernstein
Signed-off-by: Eric Bernstein
Reviewed-by: Eric Bernstein
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 11 +++---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h | 45 --
.../gpu/drm/amd/display/dc/dcn10/dcn10_re
From: Eric Yang
Signed-off-by: Eric Yang
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
b/drivers/
From: Hersen Wu
Signed-off-by: Hersen Wu
Reviewed-by: Tony Cheng
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 ++--
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 24 ++
From: Charlene Liu
[Description]
this change is in branch already.
without this change, after resume, az_inst might swapped.
Signed-off-by: Charlene Liu
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 20
1 file c
From: Andrew Jiang
A recent commit moved the backlight control code along with the register
defines, but did not move the power control code. This along with
remnant fields in the dce110_link_enc_registers struct made it so that
the code still compiled, but any attempts to access the
LVTMA_PWRSEQ
From: Bhawanpreet Lakha
For linux it takes longer than 40us so increasing it to
200us. Also added debug prints regarding the change
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c| 20
From: Tony Cheng
fix typo in register field. we are lucky the shift/mask is the same, no
behavior change
add globals to experiment with using different VM settings
Signed-off-by: Tony Cheng
Reviewed-by: Yongqiang Sun
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_
From: Jerry Zuo
Locks are no longer needed since the drm framework takes care of
correct locking.
Signed-off-by: Harry Wentland
Signed-off-by: Jerry Zuo
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 12 +---
1 file changed, 5 insertions
From: Jerry Zuo
Original code is no longer needed and tested without loop.
Signed-off-by: Harry Wentland
Signed-off-by: Jerry Zuo
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
d
From: SivapiriyanKumarasamy
Signed-off-by: SivapiriyanKumarasamy
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 38 +
1 file changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/
From: Bhawanpreet Lakha
Set hardcode_coeff only when BOTH chroma and luma taps are
more than 1
without this underscan with h or v set to 0 darkens
the screen (either h or v set to 0, not both)
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/
From: Tony Cheng
Signed-off-by: Tony Cheng
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index c832d5abbbdf
From: Eric Bernstein
Signed-off-by: Eric Bernstein
Reviewed-by: Charlene Liu
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h
b/d
From: Andrew Jiang
Our plane_states array trimming logic was faulty, we should be starting
to shuffle from the plane that was just released, not from the very
beginning of the array.
Also get rid of a leftover line that was setting the plane state at the
stream index to null, leading to issues.
From: Eric Bernstein
Signed-off-by: Eric Bernstein
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 5 +++
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h | 23 +++
.../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c | 42 +++
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Krunoslav Kovac
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_
Some of our HW calcs functions compares a var against
itself to check for NaN. Gcc isn't fond of it and wrongfully
warns about a tautological comparison. Disable this check
for dcn_calcs_math.c.
Signed-off-by: Harry Wentland
Reviewed-by: Dmytro Laktyushkin
Acked-by: Harry Wentland
---
drivers/
From: Tony Cheng
Signed-off-by: Tony Cheng
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 8fa9ef1167fa
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/Makefile | 2 +-
.../gpu/drm/amd/display/dc/dcn10/{dcn10_mem_input.c => dcn10_hubp.c}| 2 +-
.../gpu/drm/amd/display/dc/dcn10/{d
From: Yongqiang Sun
Half screen gamma setting and cursor are incorrect
when switching mode through win+p due to wrong programming
gamma sequence (In case of bottom pipe, gamma and cursor are
programmed before front end programmed, pipe is power gated).
cha
From: Roman Li
Fixing loop boundaries in irq enable/disable on resume.
Signed-off-by: Roman Li
Reviewed-by: Mikita Lipski
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
From: Yongqiang Sun
1. Fixed acquire free split pipe bug.
2. Change return value for dc_add_stream_to_ctx
from bool to enum.
4. Remove redundant apply_ctx_for_surface calling
5. Unlock pipe after back end programming.
Signed-off-by: Yongqiang Sun
Revie
From: Eric Yang
When validate with context fail to add stream to the context, we have
a case where set_dpms won't be able to find the stream that need to
be disabled.
Signed-off-by: Eric Yang
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 7 ++
From: Hersen Wu
- avoid eDP screen flash 4 times when resume from s3
- improve s3 and boot time
Signed-off-by: Hersen Wu
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 39 +-
drivers/gpu/drm/amd/display/dc/core/dc
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 1 +
drivers/gpu/drm/amd/display/dc/core/dc.c | 1 +
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +-
drivers/gpu/dr
From: Andrew Jiang
These were spamming the debugger logs.
Signed-off-by: Andrew Jiang
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/dis
From: Dmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
b/drivers/g
From: Bhawanpreet Lakha
We were overwriting the whole register which was re-enabling
stutter for raven. Now we are reading the register then setting
the values only for pstate.
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/d
From: Dmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Dmytro Laktyushkin
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 6 ++
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dce100/dce1
From: Dmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 2 +-
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff
From: Yongqiang Sun
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core
From: Eric Bernstein
Signed-off-by: Eric Bernstein
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 2 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h | 20 +
.../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c | 85 +++
From: Shirish S
Currently FBC is guarded with ENABLE_FBC macro,
which needs to be manually enabled in Makefile.
This patch moves it to Kconfig so that there
wont be any need to additional patch to be carried
for enabling or disabling on every SoC.
Signed-off-by: Shirish S
Reviewed-by: Roman Li
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 2517fb821fff..172050ad84
From: Yongqiang Sun
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 27 ++
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 5 ++--
2 files changed, 20 insertions(+), 12 deletions(-
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c | 76 +++---
.../gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h | 24 +++
2 files changed, 50 insertions(+), 50 deletions(-)
From: Roman Li
On S3 resume the HPD6 irq source was not reenabled
due to loop boundary bug.
Signed-off-by: Roman Li
Reviewed-by: Mikita Lipski
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --
From: Tony Cheng
in past program SMU will use all voltage headroom. RV does not
if DAL need higher voltage for DCFCLK or DISPCLK, also increase FCLK
to improve stutter as voltage is already
Signed-off-by: Tony Cheng
Reviewed-by: Charlene Liu
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd
From: Eric Yang
For verification of watermark select with SMU team, proper
implementation will follow
Signed-off-by: Eric Yang
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 47 ++
drivers/gpu/drm/amd/display/dc/d
From: Tony Cheng
also refactor debug option. now pipe_split_policy are
dynamic = no hack around dcn_calcs. will split based on HW recommendation
avoid = avoid split if we can support the config with higher voltage
avoid_multi_display = allow split with single display output.
force_single_disp_
From: Dmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../gpu/drm/amd/display/dc/dml/display_mode_vba.c | 32 +++---
.../gpu/drm/amd/display/dc/dml/display_mode_vba.h | 3 ++
2 files changed, 25 insertions(+), 10 del
From: Tony Cheng
Signed-off-by: Tony Cheng
Reviewed-by: Tony Cheng
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 1e49b8f9c
From: Wenjing Liu
[Description]
There are many occasions we need to retrieve sink capability and
notify connectivity change to os even if edid is not changed
on a HPD toggle.
(HDMI2.0 display needs re-enable link on every hpd,
display changes other capability outside from edid
need to be queried
From: SivapiriyanKumarasamy
Signed-off-by: SivapiriyanKumarasamy
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10
From: Bhawanpreet Lakha
Split update_planes_and_stream_state (split Software and Hardware
programming) as the state is already build, so we only need to
program the hardware
Signed-off-by: Andrey Grodzovsky
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h | 1 -
.../gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c | 26 +-
.../gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h | 60
From: Yongqiang Sun
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c | 11 +++
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h | 4
2 files changed, 15 insertions(+)
dif
From: Jerry Zuo
Prevent NULL pointer on new_stream being added to ctx
when added MST connectors cannot be found in existing crtc_state
in the chained mode
Signed-off-by: Jerry Zuo
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 +++
1 file changed, 7
From: Yongqiang Sun
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 2 +-
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
3 files changed,
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Yongqiang Sun
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
b
From: Tony Cheng
1. reverts commit e67f51012740 ("dc: temp disable DCC on high res.")
- default still DCC enabled
2. add debug options to decide how DCC is disabled
- disable DCC
- disable DCC if DCC requires 128b (aka. half) request
-- observed compressed data corruption result in screen corrup
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h | 5 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/gp
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 16
.../gpu/drm/amd/display/dc/dce/dce_link_encoder.h | 21 ++---
.../amd/display/dc/dcn10/dcn10_timing_ge
From: Jerry Zuo
In SST daisy chain scenario, edid is getting read in mst hotplug
routine. It is getting conflict with drm send_enum_path_resources
kernel thread in terms of i2c bus which is getting locked up in
such case.
Have edid being read in get_mode hook, instead of in hotplug
routine.
Sig
From: Tony Cheng
should only lower dpp clock.
Signed-off-by: Tony Cheng
Reviewed-by: Yongqiang Sun
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_ca
From: Yongqiang Sun
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 89 +++---
.../gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.h | 2 +
2 files changed, 46 insertions(+), 45 deletions(-)
diff
From: ShihChen Chen
Signed-off-by: ShihChen Chen
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm
From: Wenjing Liu
[Description]
link type is not updated before mst topology discovery.
This causes issue when branch device response to link address after before
the start topology discovery event finishes.
[Solution]
update link type to mst before topology discovery
Signed-off-by: Wenjing Liu
From: Hersen Wu
Signed-off-by: Hersen Wu
Signed-off-by: Tony Cheng
Reviewed-by: Hersen Wu
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 8
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_r
From: Eric Yang
When doing SLS, KMD gives us clipped v_addressable with
border. This results in bw validation failure.
Signed-off-by: Eric Yang
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 8 +---
1 file changed, 5 insertions(+),
From: Ken Chalmers
Signed-off-by: Ken Chalmers
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 42 --
1 file changed, 23 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_seq
From: Yongqiang Sun
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
b/drivers/gpu/drm/a
From: Tony Cheng
experimental change for testing if max line buffer result in better stutter
efficiency
for 1080p, LB can hold up to 9 line at 10bpcc, potentially add 10 line time of
latency hiding.
Signed-off-by: Tony Cheng
Reviewed-by: Yongqiang Sun
Acked-by: Harry Wentland
---
drivers/g
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 50440731f83c..2e77885
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
b/drivers/gpu/
From: "Leo (Sunpeng) Li"
During system suspend, we:
1. Cache a duplicate of the current DRM atomic state, which calls hooks
to duplicate our internal states.
2. Call hooks to disable all functionalities.
3. System suspended.
During resume, we attempt to restore the cached state. However, our
From: Tony Cheng
Signed-off-by: Tony Cheng
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 427ccbc28f51
From: Jerry Zuo
In the full update type, need to add ref_count to the newly
created dc_state->stream. It made mistake to add ref_count to
dc->current_state->stream which keeps adding up without release.
Signed-off-by: Jerry Zuo
Reviewed-by: Roman Li
Acked-by: Harry Wentland
---
drivers/gpu/d
From: Eric Bernstein
Signed-off-by: Eric Bernstein
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 27 +++-
drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h | 4
2 files changed, 30 insertions(+), 1 deletion(-)
From: Yongqiang Sun
In case of two monitor connected and turn off one of the monitors,
OTG0 is locked after graphic plane off due to redundant programming
front end regs.
Signed-off-by: Yongqiang Sun
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.
From: Eric Yang
A previous changed removed the hack to match mpcc_idd
with mi instance. This causes pstate hang on resume
from hibernate for yet unknown reason. Add the hack
back for now to work around the issue. More debugging
required in init_hw to root cause the hang.
Signed-off-by: Eric Yang
From: Andrew Jiang
Signed-off-by: Charlene Liu
Reviewed-by: Anthony Koo
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
From: Andrew Jiang
This allows us to not always have scaling on, which causes issues with
validation and causes the text to blur slightly.
Signed-off-by: Andrew Jiang
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 9 +
dri
From: Jerry Zuo
Needs effort to take care of the fake sink scenario
in downstream daisy chain device. Exclude MST from
fake sink feature for now.
Signed-off-by: Jerry Zuo
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 +++--
1 file changed, 11 i
From: Wenjing Liu
[Description]
hbr2 compliance eye output is unstable
(toggling on and off) with debugger break.
This caueses intermittent PHY automation failure.
Need to look into the root cause later
Signed-off-by: Wenjing Liu
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/g
From: Eric Bernstein
Signed-off-by: Eric Bernstein
Reviewed-by: Dmytro Laktyushkin
Acked-by: Harry Wentland
---
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 17 +-
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 173 ++---
drivers/gpu/drm/amd/display/dc/inc/hw/mp
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dcn10/Makefile | 2 +-
.../amd/display/dc/dcn10/{dcn10_dpp_cm_helper.c => dcn10_cm_common.c} | 2 +-
.../amd/display/dc/dcn10/{dcn10_dpp_cm_
From: Roman Li
- fixed wrong index in dce110_validate_surface_sets()
- formatted for better readability
Signed-off-by: Roman Li
Reviewed-by: Harry Wentland
---
.../drm/amd/display/dc/dce110/dce110_resource.c| 29 --
1 file changed, 21 insertions(+), 8 deletions(-)
dif
From: Hersen Wu
Signed-off-by: Hersen Wu
Reviewed-by: Tony Cheng
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +-
.../amd/display/dc/dce110/dce110_hw_sequencer.c| 3 +-
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 38 ++
From: Yue Hin Lau
Signed-off-by: Yue Hin Lau
Reviewed-by: Dmytro Laktyushkin
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 11 ++-
drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 47 +++
From: Roman Li
- Fixing text mode for cases when VT-switch doesn't result
in timing change
Signed-off-by: Roman Li
Reviewed-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/displ
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