> 2)if a fence signaled and try to clear some entity's dependency,
> should set this entity guilty to prevent its job really run since the
> dependency is fake signaled.
Well, that is a clear NAK. It would mean that you mark things like the X server
or Wayland queue is marked guilty because
On 2018年03月29日 10:45, Deng, Emily wrote:
Hi Christian,
Thanks for your review, could you please give some advices on how to
resolve the issue? How about adding the fence status ESRCH
checking when check the fence signal? If so, need to identify the detail
behavior if the fence status
Acked-by: Chunming Zhou
On 2018年03月29日 09:10, Yu, Qiang wrote:
Hi guys,
Ping.
Regards,
Qiang
From: amd-gfx on behalf of Qiang Yu
Sent: Tuesday, March 20, 2018 2:08:09
Hi Christian,
Thanks for your review, could you please give some advices on how to
resolve the issue? How about adding the fence status ESRCH
checking when check the fence signal? If so, need to identify the detail
behavior if the fence status is ESRCH.
Best Wishes,
Emily Deng
>
Hi guys,
Ping.
Regards,
Qiang
From: amd-gfx on behalf of Qiang Yu
Sent: Tuesday, March 20, 2018 2:08:09 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH libdrm] headers: sync up
On Mon, Mar 26, 2018 at 3:22 PM, Samuel Li wrote:
> To reduce some warnings.
>
> Signed-off-by: Samuel Li
Reviewed-by: Alex Deucher
And pushed.
Alex
> ---
> drivers/gpu/drm/drm_prime.c | 13 +
> 1 file changed, 13
On 28/03/18 01:44 PM, Christian König wrote:
> Well, isn't that exactly what dma_map_resource() is good for? As far as
> I can see it makes sure IOMMU is aware of the access route and
> translates a CPU address into a PCI Bus address.
> I'm using that with the AMD IOMMU driver and at least
Am 28.03.2018 um 20:57 schrieb Logan Gunthorpe:
On 28/03/18 12:28 PM, Christian König wrote:
I'm just using amdgpu as blueprint because I'm the co-maintainer of it
and know it mostly inside out.
Ah, I see.
The resource addresses are translated using dma_map_resource(). As far
as I know that
On 28/03/18 12:28 PM, Christian König wrote:
> I'm just using amdgpu as blueprint because I'm the co-maintainer of it
> and know it mostly inside out.
Ah, I see.
> The resource addresses are translated using dma_map_resource(). As far
> as I know that should be sufficient to offload all the
Am 28.03.2018 um 18:25 schrieb Logan Gunthorpe:
On 28/03/18 10:02 AM, Christian König wrote:
Yeah, that looks very similar to what I picked up from the older
patches, going to read up on that after my vacation.
Yeah, I was just reading through your patchset and there are a lot of
On 28/03/18 10:02 AM, Christian König wrote:
> Yeah, that looks very similar to what I picked up from the older
> patches, going to read up on that after my vacation.
Yeah, I was just reading through your patchset and there are a lot of
similarities. Though, I'm not sure what you're trying to
Building amdkfd without MMU notifiers is broken:
In file included from drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c:28:
drivers/gpu/drm/amd/amdkfd/kfd_priv.h:584:22: error: field 'mmu_notifier' has
incomplete type
This adds the missing 'select MMU_NOTIFIER' line to make it build
cleanly all
On 28/03/18 09:07 AM, Christian König wrote:
> Am 28.03.2018 um 14:38 schrieb Christoph Hellwig:
>> On Sun, Mar 25, 2018 at 12:59:54PM +0200, Christian König wrote:
>>> From: "wda...@nvidia.com"
>>>
>>> Add an interface to find the first device which is upstream of both
>>>
Am 28.03.2018 um 17:53 schrieb Arnd Bergmann:
Building amdkfd without MMU notifiers is broken:
In file included from drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c:28:
drivers/gpu/drm/amd/amdkfd/kfd_priv.h:584:22: error: field 'mmu_notifier' has
incomplete type
This adds the missing 'select
Am 28.03.2018 um 17:47 schrieb Logan Gunthorpe:
On 28/03/18 09:07 AM, Christian König wrote:
Am 28.03.2018 um 14:38 schrieb Christoph Hellwig:
On Sun, Mar 25, 2018 at 12:59:54PM +0200, Christian König wrote:
From: "wda...@nvidia.com"
Add an interface to find the first
Am 28.03.2018 um 14:38 schrieb Christoph Hellwig:
On Sun, Mar 25, 2018 at 12:59:54PM +0200, Christian König wrote:
From: "wda...@nvidia.com"
Add an interface to find the first device which is upstream of both
devices.
Please work with Logan and base this on top of the
Fix to return error code -ENOMEM from the eviction fence create fail
error handling case instead of 0, as done elsewhere in this function.
Fixes: a46a2cd103a8 ("drm/amdgpu: Add GPUVM memory management functions for
KFD")
Signed-off-by: Wei Yongjun
---
On Sun, Mar 25, 2018 at 12:59:53PM +0200, Christian König wrote:
> Use this function to set an sg entry to point to device resources mapped
> using dma_map_resource(). The page pointer is set to NULL and only the DMA
> address, length and offset values are valid.
NAK. Please provide a higher
On Sun, Mar 25, 2018 at 12:59:54PM +0200, Christian König wrote:
> From: "wda...@nvidia.com"
>
> Add an interface to find the first device which is upstream of both
> devices.
Please work with Logan and base this on top of the outstanding peer
to peer patchset.
On Wed, Mar 28, 2018 at 8:37 AM, Andrey Grodzovsky
wrote:
> Problem: When unbind and then bind back the device KIQ hangs on Vega
> after mapping KCQs request.
>
> Fix: Adding deinitialzie code from CAIL during HW fini solves the
> hang.
>
> Signed-off-by: Andrey
Problem: When unbind and then bind back the device KIQ hangs on Vega
after mapping KCQs request.
Fix: Adding deinitialzie code from CAIL during HW fini solves the
hang.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 52
Hi,
I've managed to configure my device-tree correctly, and am now able to
correctly start
the radeon driver with acceleration on my T2080 (an e6500 PowerPC chip)
with an AMD E8860 GPU (radeon/radeonsi). Thanks for the help with that.
I am able to run a small OpenCL program that fills a float
On Wed, Mar 28, 2018 at 8:46 AM Mike Lothian wrote:
> On Tue, 27 Mar 2018, 00:30 Bráulio Bhavamitra,
> wrote:
>
>> Hi all,
>>
>> Following the random crashes happenning with many users (e.g.
>>
Am 28.03.2018 um 10:07 schrieb Emily Deng:
issue:
there are VMC page fault occured if force APP kill during
3dmark test, the cause is in entity_fini we manually signal
all those jobs in entity's queue which confuse the sync/dep
mechanism:
1)page fault occured in sdma's clear job which operate
On Tue, 27 Mar 2018, 00:30 Bráulio Bhavamitra, wrote:
> Hi all,
>
> Following the random crashes happenning with many users (e.g.
> https://www.phoronix.com/scan.php?page=news_item;
> px=Raven-Ridge-March-Update), not only on Linux but also Windows, I've
> been struggling to
On Wed, Mar 28, 2018 at 03:51:16PM +0800, Kenneth Feng wrote:
> port the new atomfirmware.h change in order to
> support ACG SS feature and populate the ACG SS
> parameters into SMU
>
We would better to say "update atomfirmware header". Because the guys who
are in community not from AMD will not
Hi Kenneth,
There are several places which fix old coding style(comment inline). Please
drop them since this is not a patch to fix coding style.
Other than that, the patch is reviewed-by: Evan Quan
Regards,
Evan
> -Original Message-
> From: amd-gfx
On 2018年03月27日 21:44, Christian König wrote:
How about we update the LRU only when we need to re-validate at least
one BO?
I tried this just now, performance still isn't stable, sometime drop to
28fps by accident.
I also tried to check num_evictions, if eviction happens, then update
LRU,
issue:
there are VMC page fault occured if force APP kill during
3dmark test, the cause is in entity_fini we manually signal
all those jobs in entity's queue which confuse the sync/dep
mechanism:
1)page fault occured in sdma's clear job which operate on
shadow buffer, and shadow buffer's Gart
port the new atomfirmware.h change in order to
support ACG SS feature and populate the ACG SS
parameters into SMU
Change-Id: I3297b93b166abc6e430d14ccdd362e353771ea36
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/include/atomfirmware.h | 12
Am 28.03.2018 um 05:24 schrieb Huang Rui:
On Tue, Mar 27, 2018 at 04:33:55PM -0500, Alex Deucher wrote:
Needs to be a 32 bit mask.
Signed-off-by: Alex Deucher
Cc: sta...@vger.kernel.org
Nice catch!
Acked-by: Huang Rui
Indeed good catch!
Patch
Am 28.03.2018 um 00:32 schrieb Alex Deucher:
This callback writes a value to a register and then reads
back another register and waits for a value in a single
operation.
Provide a helper function using two operations for engines
that don't support this opertion.
Signed-off-by: Alex Deucher
Am 28.03.2018 um 00:22 schrieb Samuel Li:
It's auto by default. For CZ/ST, auto setting enables sg display
when vram size is small; otherwise still uses vram.
This patch fixed some potential hang issue introduced by change
"allow framebuffer in GART memory as well" due to CZ/ST hardware
Am 28.03.2018 um 06:36 schrieb Liu, Monk:
The SDMA is not directly connected to the GFXHUB, so even if the SDMA would
provide a single command for this the write/wait would still be executed as two
operations.
I don't understand this point, more details may be ??
For SDMA from v148 ucode,
On Wed, Mar 28, 2018 at 12:44:55PM +0800, Rex Zhu wrote:
> DC/Non DC all will update display configuration
> when the display state changed
> No need to get display info through cgs interface
We would better add "." at the end of these two sentences.
With that fixed,
Reviewed-by: Huang Rui
On Tue, Mar 27, 2018 at 05:32:51PM -0500, Alex Deucher wrote:
> This callback writes a value to a register and then reads
> back another register and waits for a value in a single
> operation.
>
> Provide a helper function using two operations for engines
> that don't support this opertion.
>
>
36 matches
Mail list logo