Am 07.03.19 um 17:59 schrieb Grodzovsky, Andrey:
> On 3/7/19 6:29 AM, Christian König wrote:
>> Am 06.03.19 um 22:25 schrieb Andrey Grodzovsky:
>>> Problem:
>>> Using SDMA for TLB invalidation in certain ASICs exposed a problem
>>> of IB pool not being ready while SDMA already up on Init and
Am 07.03.19 um 17:57 schrieb Andrey Grodzovsky:
> Problem:
> Using SDMA for TLB invalidation in certain ASICs exposed a problem
> of IB pool not being ready while SDMA already up on Init and already
> shutt down while SDMA still running on Fini. This caused
> IB allocation failure. Temproary fix
Drop amd-gfx.
Hi Michel,
Thanks for your info.
Hi Hui,
Could you make similar changes in ugl?
-Original Message-
From: Michel Dänzer
Sent: Thursday, March 07, 2019 5:05 PM
To: Cui, Flora ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] remove amdgpu_vrr_atom
Hi Flora,
note
Hmm, that's a clever (and elegant) little data structure. The series is
Reviewed-by: Felix Kuehling
Regards,
Felix
On 3/7/2019 8:28 AM, Christian König wrote:
> Further testing showed that the idea with the chash doesn't work as expected.
> Especially we can't predict when we can remove the
Use function parameter mc as the second parameter of amdgpu_gmc_vram_location,
so codes look more consistent.
Change-Id: Ib5b06d188ebc6e82eb0d4d2a57d995149bf5f7a5
Signed-off-by: Oak Zeng
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 2 +-
Hi Dave, Daniel,
Fixes for 5.1:
- Powerplay fixes
- DC fixes
- Fix locking around indirect register access in some cases
- KFD MQD fix
- Disable BACO for vega20 for now (fixes pending)
The following changes since commit fbac3c48fa6b4cfa43eaae39d5a53269bff7ec5f:
Merge branch 'drm-next-5.1' of
On 3/7/19 6:29 AM, Christian König wrote:
> Am 06.03.19 um 22:25 schrieb Andrey Grodzovsky:
>> Problem:
>> Using SDMA for TLB invalidation in certain ASICs exposed a problem
>> of IB pool not being ready while SDMA already up on Init and already
>> shutt down while SDMA still running on Fini.
Problem:
Using SDMA for TLB invalidation in certain ASICs exposed a problem
of IB pool not being ready while SDMA already up on Init and already
shutt down while SDMA still running on Fini. This caused
IB allocation failure. Temproary fix was commited into a
bringup branch but this is the generic
On Thu, Mar 07, 2019 at 11:34:29AM +0100, Arnd Bergmann wrote:
> The mod_freesync_build_vrr_infopacket() function uses rather obscure
> calling conventions, where an enum is passed in through a pointer,
> and a NULL pointer is expected to behave the same way as the zero-value
>
The mod_freesync_build_vrr_infopacket() function uses rather obscure
calling conventions, where an enum is passed in through a pointer,
and a NULL pointer is expected to behave the same way as the zero-value
(TRANSFER_FUNC_UNKNOWN).
Trying to build this with clang results in a warning:
Thanks for the patch. We already have the fix queued:
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-5.2-wip=672e78cab819ebe31e3b9b8abac367be8a110472
Alex
From: Arnd Bergmann
Sent: Thursday, March 7, 2019 5:34 AM
To: Wentland, Harry; Li, Sun peng
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Evan Quan
Sent: Thursday, March 7, 2019 2:00 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander; Pan, Xinhui; Quan, Evan; Zhang, Hawking
Subject: [PATCH] drm/amdgpu: fix ras parameter descriptions
yes，per submission bo list priority already is used by us. but per vm bo still
is in fly, no priority on that.
-David
send from my phone
Original Message
Subject: Re: [PATCH] drm/amdgpu: enable bo priority setting from user space
From: "Koenig, Christian"
To: "Zhou,
Further testing showed that the idea with the chash doesn't work as expected.
Especially we can't predict when we can remove the entries from the hash again.
So replace the chash with a ring buffer/hash mix where entries in the container
age automatically based on their timestamp.
v2: use ring
Well you can already use the per submission priority for the BOs.
Additional to that as I said for per VM BOs we can add a priority to sort them
in the LRU.
Not sure how effective both of those actually are.
Regards,
Christian.
Am 07.03.19 um 14:09 schrieb Zhou, David(ChunMing):
Yes, you are
Yes, you are right, thanks to point it out. Will see if there is other way.
-David
send from my phone
Original Message
Subject: Re: [PATCH] drm/amdgpu: enable bo priority setting from user space
From: Christian König
To: "Zhou, David(ChunMing)" ,amd-gfx@lists.freedesktop.org
Am 07.03.19 um 10:15 schrieb Chunming Zhou:
Signed-off-by: Chunming Zhou
Well NAK to the whole approach.
The TTM priority is a global priority, but processes are only allowed to
specific the priority inside their own allocations. So this approach
will never fly upstream.
What you can do
On 2019-03-07 11:48 a.m., zhoucm1 wrote:
> On 2019年03月07日 17:55, Michel Dänzer wrote:
>> On 2019-03-07 10:15 a.m., Chunming Zhou wrote:
>>> Signed-off-by: Chunming Zhou
>> Please provide corresponding UMD patches showing how this is to be used.
> spec is here:
>
Am 06.03.19 um 22:25 schrieb Andrey Grodzovsky:
Problem:
Using SDMA for TLB invalidation in certain ASICs exposed a problem
of IB pool not being ready while SDMA already up on Init and already
shutt down while SDMA still running on Fini. This caused
IB allocation failure. Temproary fix was
On 2019年03月07日 17:55, Michel Dänzer wrote:
On 2019-03-07 10:15 a.m., Chunming Zhou wrote:
Signed-off-by: Chunming Zhou
Please provide corresponding UMD patches showing how this is to be used.
spec is here:
https://www.khronos.org/registry/vulkan/specs/1.1-extensions/html/vkspec.html,
On 2019-03-07 10:15 a.m., Chunming Zhou wrote:
> Signed-off-by: Chunming Zhou
Please provide corresponding UMD patches showing how this is to be used.
> @@ -229,6 +231,14 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void
> *data,
> if (args->in.domains &
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c| 13 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h |
Hi Flora,
note that xf86-video-amdgpu patches are reviewed as GitLab merge
requests these days, as documented in README.md:
https://gitlab.freedesktop.org/xorg/driver/xf86-video-amdgpu/merge_requests
On 2019-03-07 4:25 a.m., Cui, Flora wrote:
> it doesn't work as expected
Why is that? Maybe
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