On 8/1/19 1:58 AM, Alex Deucher wrote:
> From: Dennis Li
>
> Add functions for RAS error inject and query error counter
>
> Signed-off-by: Dennis Li
> Reviewed-by: Tao Zhou
> Reviewed-by: Hawking Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 +
>
No objection from me for this patch. But I was really shocked at first glance
to the subject and thought how amdgpu driver survive with this bug in
bare-metal case... It was then proved to be this is SRIOV specific bug because
psp was initialized ahead of ih in sriov use case. The status.hw fix
Reviewed-by: Kenneth Feng
-Original Message-
From: Wang, Kevin(Yang)
Sent: Thursday, August 01, 2019 10:44 AM
To: Wang, Kevin(Yang) ; amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth ; Huang, Ray ;
Deucher, Alexander
Subject: Re: [PATCH] drm/amd/powerplay: sort feature status index by
If no objection I would submit those three patches, thanks
_
Monk Liu|GPU Virtualization Team |AMD
-Original Message-
From: Deng, Emily
Sent: Wednesday, July 31, 2019 5:04 PM
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Cc: Liu, Monk
Subject: RE:
Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of
> Kevin Wang
> Sent: Thursday, August 01, 2019 10:44 AM
> To: Wang, Kevin(Yang) ; amd-
> g...@lists.freedesktop.org
> Cc: Deucher, Alexander ; Huang, Ray
> ; Feng, Kenneth
> Subject: Re: [PATCH] drm/amd/powerplay:
Thanks Matt. The patch is reviewed-by: Evan Quan
Regards,
Evan
> -Original Message-
> From: amd-gfx On Behalf Of
> Matt Coffin
> Sent: Thursday, August 01, 2019 4:15 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Matt Coffin
> Subject: [PATCH] drm/amd/powerplay: Allow changing of
ping...
please help me review it , thanks.
BR
Kevin
On 7/31/19 3:51 PM, Wang, Kevin(Yang) wrote:
> before this change, the pp_feature sysfs show feature enable state by
> logic feature id, it is not easy to read.
> this change will sort pp_features show index by asic feature id.
>
> before:
>
During kexec some adapters hit an EEH since they are not properly
shut down in the radeon_pci_shutdown() function. Adding
radeon_suspend_kms() fixes this issue.
Signed-off-by: Kyle Mahlkuch
---
drivers/gpu/drm/radeon/radeon_drv.c | 8
1 file changed, 8 insertions(+)
diff --git
On 2019-07-26 9:27 p.m., Greathouse, Joseph wrote:
> The gpu_id argument is not needed when enabling GWS on a queue.
> The queue can only be associated with one device, so the only
> possible situations for the call as previously defined were:
> 1) the gpu_id was for the device associated with the
On 2019-07-31 12:33 a.m., Yuan, Xiaojie wrote:
> Reviewed-by: Xiaojie Yuan
>
> BR,
> Xiaojie
>
>
> From: amd-gfx on behalf of Alex
> Deucher
> Sent: Saturday, July 27, 2019 3:16 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject:
On 2019-07-31 11:52 a.m., Alex Deucher wrote:
> Unused.
>
> Signed-off-by: Alex Deucher
The series is
Reviewed-by: Felix Kuehling
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git
[Why]
Before this change, the fan control state on smu_v11 was not able to be
changed because the capability check for checking if the fan control
capability existed was inverted.
[How]
The capability check for fan control in smu_v11_0_auto_fan_control was
inverted, to correctly check for the
Hi,
I'm glad to see this work moving forward!
On Wed, 2019-07-24 at 10:01 +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 23.07.19 um 14:44 schrieb Andrzej Pietrasiewicz:
> > Hi Sam,
> >
> > W dniu 23.07.2019 o 11:05, Sam Ravnborg pisze:
> > > Hi Andrzej
> > >
> > > On Thu, Jul 11, 2019 at
Hi Dave, Daniel,
Fixes for 5.3. Nothing too major. A few fixes for navi and some general
fixes.
The following changes since commit 4d5308e7852741318e4d40fb8d43d9311b3984ae:
Merge tag 'drm-fixes-5.3-2019-07-24' of
git://people.freedesktop.org/~agd5f/linux into drm-fixes (2019-07-26 14:10:26
From: Dennis Li
check gfx error count in both ras querry function and
ras interrupt handler.
gfx ras is still disabled by default due to known stability
issue found in gpu reset.
Signed-off-by: Dennis Li
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
---
From: Dennis Li
Add functions for RAS error inject and query error counter
Signed-off-by: Dennis Li
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 +
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 530 +++-
2 files changed,
From: Dennis Li
Change-Id: Iedd4bac2187e3b800662485d4623ace246af3f36
Signed-off-by: Dennis Li
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Dennis Li
some subblocks of gfx fail in inject test, disable them
Change-Id: I54176e291cf5d58a94838ec688a96289c6cebb46
Signed-off-by: Dennis Li
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 281 +++---
1 file changed,
From: Dennis Li
Add EDC registers to support VEGA20 RAS
Change-Id: Iafa8029135aa407edc0c77f1779a1cb9982c1492
Signed-off-by: Dennis Li
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
---
.../amd/include/asic_reg/gc/gc_9_0_sh_mask.h | 157 ++
1 file changed, 157
From: Tao Zhou
add related registers, callback function and channel index table
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 2 ++
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c | 10 ++
2 files changed, 12 insertions(+)
diff --git
From: Dennis Li
Change-Id: Ib4b019b2bcbe6ef0b85ef170e7cf032bfa400553
Signed-off-by: Dennis Li
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 230
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 201 +
2
From: Tao Zhou
add err_data parameter in interrupt cb for ras clients
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 2 ++
From: Tao Zhou
remove the check of ErrorCodeExt
v2: refine the if condition for ue counting
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git
From: Tao Zhou
replace some 32bit macros with 64bit operations to simplify code
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c | 25 -
1 file changed, 8 insertions(+), 17 deletions(-)
diff --git
From: Tao Zhou
error injection address is not in gpu address space
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git
From: Tao Zhou
add error data as parameter for ras interrupt cb and process it
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 6 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 37 +
2 files
From: Hawking Zhang
check umc error count in both ras querry function and
ras interrupt handler
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 11 ++-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
2 files changed, 13
From: Hawking Zhang
init umc callback function for vega20 in sw early init phase
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
From: Tao Zhou
more than one error address may be recorded in one query
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 2 ++
2 files changed, 3 insertions(+), 1
From: Hawking Zhang
the change introduces IP headers for unified memory controller (umc)
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
.../include/asic_reg/umc/umc_6_1_1_offset.h | 31 +++
.../include/asic_reg/umc/umc_6_1_1_sh_mask.h | 91 +++
2 files
From: Hawking Zhang
Implement umc query_ras_error_count function to support querry
both correctable and uncorrectable error
Signed-off-by: Hawking Zhang
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/Makefile | 4 +
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c |
From: Tao Zhou
v1: increase ras ce/ue error count
v2: log the number of correctable and uncorrectable errors
Signed-off-by: Tao Zhou
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 11 +++
1 file changed, 11 insertions(+)
diff --git
From: Tao Zhou
add 64 bits register access functions
v2: implement 64 bit functions in low level
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 11
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 73 ++
From: Tao Zhou
create new amdgpu_umc structure to for more umc
settings in future and switch to the new structure
Signed-off-by: Tao Zhou
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4
From: Tao Zhou
only ue and ce errors are supported
Signed-off-by: Tao Zhou
Reviewed-by: Dennis Li
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
From: Tao Zhou
query umc ras error address, translate it to gpu 4k page view
and save it.
Signed-off-by: Tao Zhou
Reviewed-by: Hawking Zhang
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c | 80 +++
1 file changed, 80 insertions(+)
diff --git
From: Hawking Zhang
the driver needs to program RSMU and UMC registers to
support vega20 RAS feature
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 2 ++
2 files changed, 4
From: Hawking Zhang
This is common structure as UMC callback function
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 29 +
2 files changed, 31 insertions(+)
create
From: Hawking Zhang
These are common structures that can be included by IP specific
source files
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 68
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 69
From: Hawking Zhang
remote smu (rsmu) is a sub-block used as ip register interface,
error handling, reset generation.etc
Signed-off-by: Hawking Zhang
Reviewed-by: Dennis Li
---
.../include/asic_reg/rsmu/rsmu_0_0_2_offset.h | 27
.../asic_reg/rsmu/rsmu_0_0_2_sh_mask.h
This series enables additional RAS features for vega20.
Dennis Li (6):
drm/amd/include: add bitfield define for EDC registers
drm/amd/include: add define of TCP_EDC_CNT_NEW
drm/amdgpu: add define for gfx ras subblock
drm/amdgpu: add RAS callback for gfx
drm/amdgpu: support gfx ras error
Hi Alex.
On Wed, Jul 31, 2019 at 10:52:39AM -0500, Alex Deucher wrote:
> Unused.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c
>
On 7/23/19 10:58 AM, Andrey Konovalov wrote:
> +long set_tagged_addr_ctrl(unsigned long arg)
> +{
> + if (!tagged_addr_prctl_allowed)
> + return -EINVAL;
> + if (is_compat_task())
> + return -EINVAL;
> + if (arg & ~PR_TAGGED_ADDR_ENABLE)
> + return
On Wed, Jul 31, 2019 at 01:25:06PM +, Kuehling, Felix wrote:
> On 2019-07-30 1:51 a.m., Christoph Hellwig wrote:
> > The list is used to add the range to another list as an entry in the
> > core hmm code, so there is no need to initialize it in a driver.
>
> I've seen code that uses
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/zte/zx_hdmi.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/zte/zx_hdmi.c
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/zte/zx_vga.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/zte/zx_vga.c
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/vc4/vc4_hdmi.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/tegra/hdmi.c | 7 ---
drivers/gpu/drm/tegra/sor.c | 7 ---
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/msm/hdmi/hdmi_connector.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/rockchip/inno_hdmi.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/inno_hdmi.c
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/mediatek/mtk_hdmi.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/rockchip/rk3066_hdmi.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
Switch to using the ddc provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Sam Ravnborg
Reviewed-by: Emil Velikov
---
drivers/gpu/drm/exynos/exynos_hdmi.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Use the ddc pointer provided by the generic connector.
Signed-off-by: Andrzej Pietrasiewicz
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
ddc local variable is passed to drm_connector_init_with_ddc() and should
be NULL if no ddc is available.
Signed-off-by: Andrzej Pietrasiewicz
---
drivers/gpu/drm/radeon/radeon_connectors.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Now that some of the patches of the previous v6 series are applied,
I'm resending the remaining ones (patches 3-13) with Acked-by and
Reviewed-by added.
I'm also taking this opportunity to provide the symlink for another
connector in amdgpu (patch 1), and to fix a small but nasty bug
which can
On 7/23/19 10:58 AM, Andrey Konovalov wrote:
> The mmap and mremap (only new_addr) syscalls do not currently accept
> tagged addresses. Architectures may interpret the tag as a background
> colour for the corresponding vma.
What the heck is a "background colour"? :)
[Why]
By passing through the dm_determine_update_type_for_commit for atomic
commits that can be done asynchronously we are incurring a
performance penalty by locking access to the global private object
and holding that access until the end of the programming sequence.
This is also allocating a
[Why]
DRM private objects have no hw_done/flip_done fencing mechanism on their
own and cannot be used to sequence commits accordingly.
When issuing commits that don't touch the same set of hardware resources
like page-flips on different CRTCs we can run into the issue below
because of this:
1.
[Why]
We previously allowed framebuffer swaps as async updates for cursor
planes but had to disable them due to a bug in DRM with async update
handling and incorrect ref counting. The check to block framebuffer
swaps has been added to DRM for a while now, so this check is redundant.
The real fix
And fix the fallout.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index eef3ec5449af..36ad0c0e8efb 100644
---
And fix the fallout.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
b/drivers/gpu/drm/amd/amdgpu/navi10_ih.c
index e963746be11c..9fe08408db58 100644
---
Unused.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c
index 4d9101834ba7..c79aaebeeaf0 100644
---
And fix up the fallout.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index e4885e2d281a..595a907f4ea7 100644
---
And fix the fallout.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index e8731df40340..82732178d365 100644
---
And fix the fallout.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index 3e536140bfd6..aa43dc6c599a 100644
---
Unused.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
index 0723f800e815..7c03a7fcd011 100644
---
Hi Andrzej,
On 31/07/2019 16:22, Neil Armstrong wrote:
> On 31/07/2019 15:10, Andrzej Pietrasiewicz wrote:
>> W dniu 31.07.2019 o 12:40, Sam Ravnborg pisze:
>>> Hi Neil.
>>>
>>> On Wed, Jul 31, 2019 at 10:00:14AM +0200, Neil Armstrong wrote:
Hi Sam,
On 26/07/2019 20:55, Sam
On 31/07/2019 15:10, Andrzej Pietrasiewicz wrote:
> W dniu 31.07.2019 o 12:40, Sam Ravnborg pisze:
>> Hi Neil.
>>
>> On Wed, Jul 31, 2019 at 10:00:14AM +0200, Neil Armstrong wrote:
>>> Hi Sam,
>>>
>>> On 26/07/2019 20:55, Sam Ravnborg wrote:
Hi all.
Andrzej have done a good job
On 2019-07-30 1:51 a.m., Christoph Hellwig wrote:
> All users pass PAGE_SIZE here, and if we wanted to support single
> entries for huge pages we should really just add a HMM_FAULT_HUGEPAGE
> flag instead that uses the huge page size instead of having the
> caller calculate that size once, just
On 2019-07-30 1:51 a.m., Christoph Hellwig wrote:
> The start, end and page_shift values are all saved in the range
> structure, so we might as well use that for argument passing.
>
> Signed-off-by: Christoph Hellwig
Reviewed-by: Felix Kuehling
> ---
> Documentation/vm/hmm.rst
On 2019-07-30 1:51 a.m., Christoph Hellwig wrote:
> The list is used to add the range to another list as an entry in the
> core hmm code, so there is no need to initialize it in a driver.
I've seen code that uses list_empty to check whether a list head has
been added to a list or not. For that
On 2019-07-30 1:51 a.m., Christoph Hellwig wrote:
> hmm_range_fault can only return -EAGAIN if called with the block
> argument set to false, so remove the special handling for it.
The block argument no longer exists. You replaced that with the
HMM_FAULT_ALLOW_RETRY with opposite logic. So this
W dniu 31.07.2019 o 12:40, Sam Ravnborg pisze:
Hi Neil.
On Wed, Jul 31, 2019 at 10:00:14AM +0200, Neil Armstrong wrote:
Hi Sam,
On 26/07/2019 20:55, Sam Ravnborg wrote:
Hi all.
Andrzej have done a good job following up on feedback and this series is
now ready.
We need ack on the patches
On Wed, Jul 31, 2019 at 1:19 PM Christian König
wrote:
>
> Am 31.07.19 um 12:39 schrieb Daniel Vetter:
> > On Wed, Jul 31, 2019 at 11:44 AM Christian König
> > wrote:
> >> Am 31.07.19 um 11:12 schrieb Daniel Vetter:
> >>> [SNIP]
> >>> I think I brought this up before, but new top-post for a
Am 31.07.19 um 12:39 schrieb Daniel Vetter:
On Wed, Jul 31, 2019 at 11:44 AM Christian König
wrote:
Am 31.07.19 um 11:12 schrieb Daniel Vetter:
[SNIP]
I think I brought this up before, but new top-post for a clean start.
Use-case I have in mind is something like amdkfd's model, where you
On Wed, Jul 31, 2019 at 11:44 AM Christian König
wrote:
>
> Am 31.07.19 um 11:12 schrieb Daniel Vetter:
> > [SNIP]
> > I think I brought this up before, but new top-post for a clean start.
> >
> > Use-case I have in mind is something like amdkfd's model, where you have a
> > list of buffers (per
Hi Gover,
Sorry for responds late, can you help to give a try to add the patch attached
and share me the related result and logs?
Besides, do you have tried to revert this commit to see whether it's good?
Thanks.
Regards,
Likun
-Original Message-
From: Paul Gover
Sent: Tuesday, July
Am 31.07.19 um 11:12 schrieb Daniel Vetter:
[SNIP]
I think I brought this up before, but new top-post for a clean start.
Use-case I have in mind is something like amdkfd's model, where you have a
list of buffers (per context or whatever) that you always need to have
present. Idea is to also use
On Wed, Jun 26, 2019 at 02:23:05PM +0200, Christian König wrote:
> On the exporter side we add optional explicit pinning callbacks. If those
> callbacks are implemented the framework no longer caches sg tables and the
> map/unmap callbacks are always called with the lock of the reservation object
All looks good to me. Reviewed-by: Emily Deng .
>-Original Message-
>From: amd-gfx On Behalf Of Monk
>Liu
>Sent: Wednesday, July 31, 2019 4:54 PM
>To: amd-gfx@lists.freedesktop.org
>Cc: Liu, Monk
>Subject: [PATCH] drm/amdgpu: fix double ucode load by PSP(v3)
>
>previously the ucode
previously the ucode loading of PSP was repreated, one executed in
phase_1 init/re-init/resume and the other in fw_loading routine
Avoid this double loading by clearing ip_blocks.status.hw in suspend or reset
prior to the FW loading and any block's hw_init/resume
v2:
still do the smu fw loading
previously the ucode loading of PSP was repreated, one executed in
phase_1 init/re-init/resume and the other in fw_loading routine
Avoid this double loading by clearing ip_blocks.status.hw in suspend or reset
prior to the FW loading and any block's hw_init/resume
v2:
still do the smu fw loading
On Wed, Jul 31, 2019 at 10:25:15AM +0200, Christian König wrote:
> Am 31.07.19 um 10:05 schrieb Daniel Vetter:
> > [SNIP]
> > > > Okay, I see now I was far off the mark with what I thought TTM_PL_SYSTEM
> > > > was. The discussion helped clear up several bits of confusion on my
> > > > part.
> >
Am 31.07.19 um 10:05 schrieb Daniel Vetter:
[SNIP]
Okay, I see now I was far off the mark with what I thought TTM_PL_SYSTEM
was. The discussion helped clear up several bits of confusion on my part.
From proposed names, I find MAPPED and PINNED slightly confusing.
In terms of backing store
On Wed, Jul 31, 2019 at 8:54 AM Koenig, Christian
wrote:
>
> Am 31.07.19 um 02:51 schrieb Brian Welty:
> [SNIP]
> >> +/*
> >> + * Memory types for drm_mem_region
> >> + */
> > #define DRM_MEM_SWAP?
> btw what did you have in mind for this? Since we use shmem we kinda
Hi Sam,
On 26/07/2019 20:55, Sam Ravnborg wrote:
> Hi all.
>
> Andrzej have done a good job following up on feedback and this series is
> now ready.
>
> We need ack on the patches touching the individual drivers before we can
> proceed.
> Please check your drivers and get back.
I can apply all
before this change, the pp_feature sysfs show feature enable state by
logic feature id, it is not easy to read.
this change will sort pp_features show index by asic feature id.
before:
features high: 0x0623 low: 0xb3cdaffb
00. DPM_PREFETCHER ( 0) : enabeld
01. DPM_GFXCLK ( 1)
Hi,
On 30/07/2019 19:30, Sam Ravnborg wrote:
> Hi Neil.
>
>>> Signed-off-by: Andrzej Pietrasiewicz
>>> ---
>>> drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 40 +++
>>> 1 file changed, 20 insertions(+), 20 deletions(-)
>>>
> ...
>>
>> Reviewed-by: Neil Armstrong
>
> There
Am 31.07.19 um 02:51 schrieb Brian Welty:
[SNIP]
>> +/*
>> + * Memory types for drm_mem_region
>> + */
> #define DRM_MEM_SWAP?
btw what did you have in mind for this? Since we use shmem we kinda don't
know whether the BO is actually swapped out or not, at least on the
92 matches
Mail list logo
