Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Quan,
Evan
Sent: Friday, October 18, 2019 1:49 PM
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan
Subject: [PATCH] drm/amd/powerplay: update Arcturus driver smu
To fit the latest SMU firmware.
Change-Id: Ie34e6930577b7a6fe993273f213732696628b264
Signed-off-by: Evan Quan
---
.../powerplay/inc/smu11_driver_if_arcturus.h | 28 +--
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 2 +-
2 files changed, 21 insertions(+), 9 deletions(-)
-Original Message-
From: Grodzovsky, Andrey
Sent: Thursday, October 17, 2019 10:22 PM
To: Quan, Evan ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/powerplay: add lock protection for swSMU APIs
On 10/16/19 11:55 PM, Quan, Evan wrote:
> This is a quick and low risk fix.
5.3.4-300.fc31.x86_64
seems to be new.
https://retrace.fedoraproject.org/faf/reports/2726149/
Dave.
___
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Reviewed-by: Prike Liang
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: Friday, October 18, 2019 12:00 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdgpu/powerplay: use local renoir array sizes for
> clock fetching
>
Is it the design that we have to disable cstate before r/w df,
or this is only a workaround? - in this case we need to work with df to figure
out the root cause of the hang.
Regards,
Oak
-Original Message-
From: amd-gfx On Behalf Of Kim, Jonathan
Sent: Wednesday, October 16, 2019
Not that I aware of, is there a special Kconfig flag to determine stack
size ?
Andrey
On 10/17/19 5:29 PM, Kuehling, Felix wrote:
> I don't see why this problem would be specific to Arcturus. I don't see
> any excessive allocations on the stack either. Also the code involved
> here hasn't
I don't see why this problem would be specific to Arcturus. I don't see
any excessive allocations on the stack either. Also the code involved
here hasn't changed recently.
Are you using some weird kernel config with a smaller stack? Is it
specific to a compiler version or some optimization
Thx! Will do it.
Zhan
From: Kazlauskas, Nicholas
Sent: 2019/October/17, Thursday 4:51 PM
To: Liu, Zhan ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/amd/display: Modify display link stream setup
sequence.
This is actually setting DIG mode a second time, right? I don't think this
This is actually setting DIG mode a second time, right? I don't think this is
what sets GC_SEND.
Please mention that this is setting the DIG_MODE to the correct value after
having been overridden by the call to transmitter control in your patch
description. Also correct the HACK comment to
So a bit more testing.
I was using a bit of "unusual" config I guess, having 2 GPUs and some
other pcie cards (10G, ..).
So I simplified and went to the most standard thing I could think of,
_just_ the RX 560 card plugged into the main PCIe 16x slot directly
connected to the CPU.
And exact same
He Felix - I see this on boot when working with Arcturus.
Andrey
[ 103.602092] kfd kfd: Allocated 3969056 bytes on gart
[ 103.610769]
==
[ 103.611469] BUG: KASAN: stack-out-of-bounds in
kfd_create_vcrat_image_gpu+0x5db/0xb80
On Wed, Oct 16, 2019 at 9:48 AM Bas Nieuwenhuizen
wrote:
> This adds initial format modifiers for AMD GFX9 and newer GPUs.
>
> This is particularly useful to determine if we can use DCC, and whether
> we need an extra display compatible DCC metadata plane.
>
> Design decisions:
> - Always
On Thu, Oct 17, 2019 at 5:12 AM Dan Carpenter wrote:
>
> Smatch complains that we need to initialized "*cap" otherwise it can
> lead to an uninitialized variable bug in the caller. This seems like a
> reasonable warning and it doesn't hurt to silence it at least.
>
>
From: Joshua Aberback
[Why]
This workaround was put in dcn2 DMLv1, and now we need it in DMLv2.
Signed-off-by: Joshua Aberback
Reviewed-by: Jun Lei
Acked-by: Leo Li
---
.../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
From: Krunoslav Kovac
[Why]
BT.2390 EETF is used for tone mapping/range reduction.
Say display is 0.1 - 500 nits.
The problematic case is when content is 0-400. We apply EETF because
0<0.1 so we need to reduce the range by 0.1.
In the commit, we ignore the bottom range. Most displays map 0 to
From: Jun Lei
[why]
A display that supports DRR can never really be considered
"synchronized" with any other display because we can dynamically
enable DRR (i.e. without modeset). this will cause their
relative CRTC positions to drift and lose sync. this will disrupt
features such as MCLK
From: Paul Hsieh
[Why]
On some systems, we need to check the dcn version in runtime
system, not in compile time.
[How]
Stub in dcn version parameter to find_first_free_audio
Signed-off-by: Paul Hsieh
Reviewed-by: Charlene Liu
Acked-by: Leo Li
---
From: Dmytro Laktyushkin
Split a large function into smaller, reusable chunks.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Nevenko Stupar
Acked-by: Leo Li
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 182 ++
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 31 +++
From: Michael Strauss
[WHY]
DML is incorrectly initialized with 4 pipes on 3 pipe configs
RequiredDPPCLK is halved on unsplit pipe due to an incorrectly handled 3 pipe
case, causing underflow with 2 planes & pipe split (MPO, 8K + 2nd display)
[HOW]
Set correct number of DPP/OTGs for dml init to
From: Anthony Koo
[Why]
When aux engine acquire fails, we missed populating the operation_result
that describes the failure reason.
[How]
Set operation_result to new type:
AUX_CHANNEL_OPERATION_FAILED_ENGINE_ACQUIRE
in the case aux engine acquire has failed.
Signed-off-by: Anthony Koo
From: Roman Li
[Why]
PSR (Panel Self-Refresh) is a power-saving feature for eDP panels.
The feature has support in DMCU (Display MicroController Unit).
DMCU/driver communication is implemented in DC.
DM can use existing DC PSR interface to use PSR feature.
[How]
- Read psr caps via dpcd
- Send
From: Dmytro Laktyushkin
Commit hints are unnecessary after front end programming redesign.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 --
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
From: Aric Cyr
Signed-off-by: Aric Cyr
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index b578b2148e45..0416a17b0897 100644
---
From: Dmytro Laktyushkin
One of odm variables was not initialized in dml.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Chris Park
Acked-by: Leo Li
Acked-by: Tony Cheng
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
From: Sung Lee
[Why]
In Hybrid Graphics, dcn2_1_soc struct stays alive through PnP.
This causes an issue on dc init where dcn2_1_soc which has been
updated by update_bw_bounding_box gets put into dml->soc.
As update_bw_bounding_box is currently incorrect for dcn2.1,
this makes dml calculations
From: Eric Yang
[Why]
Fix the programming of DCHUBBUB_ARB_REFCYC_PER_TRIP_TO_MEMORY_A.
Was not filled in.
Signed-off-by: Eric Yang
Reviewed-by: Dmytro Laktyushkin
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 1 +
From: Dmytro Laktyushkin
We are currently incorrectly processing avoid split at highest
voltage level.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 11 +++
1 file changed, 7 insertions(+),
From: Aric Cyr
Signed-off-by: Aric Cyr
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 2e1d34882684..a86dad3808b6 100644
---
From: Dmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h | 1 +
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 1 +
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
From: Lewis Huang
[Why]
Signal is update to EDP when driver disable first encoder. The
following encoder using SIGNAL_TYPE_EDP to handle other
device. When encoder signal is HDMI, driver will detect it is dp
and release phy. It cause hw hang.
[How]
Take signal type from link->connector_signal.
From: Reza Amini
[why]
We want to use maximum space on display to show source
[how]
For Centered Mode: Replicate source as many times as possible to use
maximum of display active space add borders.
Signed-off-by: Reza Amini
Reviewed-by: Anthony Koo
Acked-by: Leo Li
---
From: Noah Abradjian
[Why]
* Clk Mgr DTO update point did not cover all needed updates, as it included a
check for plane_state which does not exist yet when the updater is called on
driver startup
* This resulted in another update path in the pipe programming sequence, based
on a dppclk
From: Eric Yang
[Why]
SMU does not keep the wm table across S3, S4, need to re-send
the table. Also defer sending the cable to after DCN bave initialized
[How]
Send table at end of init hw
Signed-off-by: Eric Yang
Reviewed-by: Yongqiang Sun
Acked-by: Leo Li
---
From: Michael Strauss
[WHY]
force_single_disp_pipe_split is a debug flag for use on DCN1
but isn't necessary otherwise as DCN2+ splits by default
Signed-off-by: Michael Strauss
Reviewed-by: Tony Cheng
Acked-by: Charlene Liu
Acked-by: Leo Li
---
From: Michael Strauss
[WHY]
i2c_read is called to differentiate passive DP->HDMI and DP->DVI-D dongles
The call is expected to fail in DVI-D case but pass in HDMI case
Some HDMI dongles have a chance to fail as well, causing misdetection as DVI-D
[HOW]
Retry i2c_read to ensure failed result is
From: Jun Lei
[why]
SLT tests require that diag can drive eDP even if nothing is connected, this is
not
typical production use case, so we need to add flag
[how]
add flag, and this flag supercedes "should destroy" logic
Signed-off-by: Jun Lei
Reviewed-by: Aric Cyr
Acked-by: Leo Li
---
From: Dmytro Laktyushkin
These are specific to dcn21 and should not be increased for
reuse on other asics.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Chris Park
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
From: Alvin Lee
[Why]
NV12 has lower min dcfclk
[How]
Add update in update_bounding_box
Signed-off-by: Alvin Lee
Reviewed-by: Jun Lei
Acked-by: Leo Li
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c| 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git
From: Yogesh Mohan Marimuthu
[Why]
The enum value for TRANSMITTER_UNIPHY_G is 9. In resource dc_xx_resource
file structure link_enc_regs[], the TRANSMITTER_UNIPHY_G registers are
initialized at index 6. Due to this mismatch, if monitor is attached to
port using TRANSMITTER_UNIPHY_G then the
From: Roman Li
[Why]
For upcoming PSR stupport it's useful to have debug entry
to verify psr state.
[How]
- Enable psr dc api for Linux
- Add psr_state file to eDP connector debugfs
usage e.g.: cat /sys/kernel/debug/dri/0/DP-1/psr_state
Signed-off-by: Roman Li
Reviewed-by: Nicholas
From: Aidan Yang
[why]
There's a use case for inverted gamma
and it's been confirmed that negative slopes are ok.
[how]
Remove code for blocking non-monotonically increasing gamma
Signed-off-by: Aidan Yang
Reviewed-by: Krunoslav Kovac
Acked-by: Leo Li
Acked-by: Reza Amini
---
From: Yongqiang Sun
[Why]
System hang during S0i3 if DP only connected due to clk is disabled when
doing link training.
During S0i3, clk is disabled while the clk state is updated when ini_hw
called, and at the moment clk is still disabled which indicating a wrong
state for next time trying to
From: Anthony Koo
[Why]
In diags environment we are not programming the DPP DTO
correctly.
[How]
Populate the dpp refclk in dccg so it can be used to correctly
program DPP DTO.
Signed-off-by: Anthony Koo
Reviewed-by: Tony Cheng
Acked-by: Leo Li
---
From: Aidan Yang
[why]
Optimized gamma22 assumes fixed point distribution which is not true
for eetf true.
[how]
Use long calculation for eetf.
Signed-off-by: Aidan Yang
Reviewed-by: Krunoslav Kovac
Acked-by: Leo Li
Acked-by: Reza Amini
---
.../amd/display/modules/color/color_gamma.c |
From: Dmytro Laktyushkin
This value will be needed by dml and therefore should be externally
accessible.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Nevenko Stupar
Acked-by: Leo Li
---
.../amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c| 14 +++---
From: Jordan Lazare
[Why]
For loop below the assert already checks for the number of instances to
create. ASSERT is meaningless and causing spam.
[How]
dd
Signed-off-by: Jordan Lazare
Reviewed-by: Harry Wentland
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2
From: Yongqiang Sun
[Why & How]
vm should be enabled by default for rn to get
right dml.
Signed-off-by: Yongqiang Sun
Reviewed-by: Dmytro Laktyushkin
Reviewed-by: Tony Cheng
Acked-by: Leo Li
---
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 29 ---
1 file changed, 25
From: Dmytro Laktyushkin
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Chris Park
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
From: Jun Lei
Signed-off-by: Jun Lei
Reviewed-by: Aric Cyr
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
From: Jun Lei
[why]
Hard to determine if pipe combine is done with MPC or ODM
[how]
Add new visual confirm type, this will mark each MPCC tree
with a different color
Signed-off-by: Jun Lei
Reviewed-by: Yongqiang Sun
Acked-by: Leo Li
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
From: Leo Li
This series has dependencies on the recent Renoir series:
https://patchwork.freedesktop.org/series/67803/#rev2
Summary of changes:
* Enable PSR on supported eDP panels
* Allow programming of negative gamma slope
Aidan Yang (2):
drm/amd/display: Don't use optimized gamma22 with
> From the hardware point of view the only thing which comes to mind is
> that you somehow triggered the ESD protection.
>
> I assume you can rule out an unstable physical connection (because it
> works on windows), so the only thing left is that there is something
> very very badly going wrong
[Why]
This patch is for fixing Navi14 pink screen issue. With this
patch, stream->link->link_enc->funcs->setup will be called
twice: this will make sure GC_SEND is set to 1. Though we
still need to look into why the issue only happens on
Linux, but not on Windows side.
[How]
Call
Reviewed-by: Philip Yang
On 2019-10-17 1:56 p.m., Kim, Jonathan wrote:
> fixing compiler warnings in df v3.6 for c-state toggle and pmc count.
>
> Change-Id: I74f8f1eafccf523a89d60d005e3549235f75c6b8
> Signed-off-by: Jonathan Kim
> ---
> drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 4 ++--
> 1
Thanks for the catch Philip. I must have missed this with the renoir warnings.
I sent fix.
Jon
-Original Message-
From: Yang, Philip
Sent: Thursday, October 17, 2019 1:40 PM
To: Quan, Evan ; Kim, Jonathan ;
amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix
Subject: Re: [PATCH]
fixing compiler warnings in df v3.6 for c-state toggle and pmc count.
Change-Id: I74f8f1eafccf523a89d60d005e3549235f75c6b8
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
I got compiler warnings after update this morning, because the variables
are not initialized in df_v3_6_set_df_cstate() return failed path.
CC [M] drivers/gpu/drm/amd/amdgpu/gmc_v9_0.o
CC [M] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.o
This has already been fixed here:
https://patchwork.freedesktop.org/patch/336195/
Should be mirrored on Alex's tree soon.
Thanks,
Leo
On 2019-10-17 2:19 a.m., Chen Wandun wrote:
> From: Chenwandun
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:1913:48:
> error: struct
Thanks for the detailed notes! See reply inline.
On 2019-10-15 4:03 p.m., Lukáš Krejčí wrote:
> [Why]
> Having the rounding of the backlight value restored to the way it was
> seemingly gets rid of backlight flickering on certain Stoney Ridge
> laptops.
>
> [How]
> Rescale the backlight level
Am 17.10.19 um 17:44 schrieb Alex Deucher:
We need to allocate a large enough buffer for the
feedback buffer, otherwise the IB test can overwrite
other memory.
Signed-off-by: Alex Deucher
Acked-by: Christian König for the series.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 20
Am 17.10.19 um 16:29 schrieb Sylvain Munaut:
> Hi,
>
>
>>> I have RX 560 2G card. It's plugged into a 16x physical / 4x
>>> electrical slot of a X570 chipset motherboard with a Ryzen 3700X CPU.
>>> The hardware works fine and is stable under Windows (tested with
>>> games, benchmarks,
Reviewed-by: James Zhu for this series
On 2019-10-17 11:44 a.m., Alex Deucher wrote:
> We need to allocate a large enough buffer for the
> feedback buffer, otherwise the IB test can overwrite
> other memory.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 20
From: Mikita Lipski
- Adding encoder atomic check to find vcpi slots for a connector
- Using DRM helper functions to calculate PBN
- Adding connector atomic check to release vcpi slots if connector
loses CRTC
- Calculate PBN and VCPI slots only once during atomic
check and store them on
Sending once more as text.
Am 17.10.19 um 18:26 schrieb Yang, Philip:
> On 2019-10-17 4:54 a.m., Christian König wrote:
>> Am 16.10.19 um 18:04 schrieb Jason Gunthorpe:
>>> On Wed, Oct 16, 2019 at 10:58:02AM +0200, Christian König wrote:
Am 15.10.19 um 20:12 schrieb Jason Gunthorpe:
>
Am 17.10.2019 18:26 schrieb "Yang, Philip" :
On 2019-10-17 4:54 a.m., Christian König wrote:
> Am 16.10.19 um 18:04 schrieb Jason Gunthorpe:
>> On Wed, Oct 16, 2019 at 10:58:02AM +0200, Christian König wrote:
>>> Am 15.10.19 um 20:12 schrieb Jason Gunthorpe:
From: Jason Gunthorpe
On 2019-10-17 4:54 a.m., Christian König wrote:
> Am 16.10.19 um 18:04 schrieb Jason Gunthorpe:
>> On Wed, Oct 16, 2019 at 10:58:02AM +0200, Christian König wrote:
>>> Am 15.10.19 um 20:12 schrieb Jason Gunthorpe:
From: Jason Gunthorpe
8 of the mmu_notifier using drivers
To avoid walking past the end of the arrays since the PP_SMU
defines don't match the renoir defines.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
They are not used outside of the file they are defined in.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 15 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h | 5 -
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git
We need to allocate a large enough buffer for the
feedback buffer, otherwise the IB test can overwrite
other memory.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 20 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h | 1 +
2 files changed, 16
Hi Zhan,
I tested your patch, and it fixed the issue. I have some notes:
1. Your patch does not apply smoothly, try to rebase your branch (I
manually fix it for testing your patch).
2. In the commit message, I recommend you to describe the "pink" color
issue when using HDMI. It is going to make
Hi,
> > I have RX 560 2G card. It's plugged into a 16x physical / 4x
> > electrical slot of a X570 chipset motherboard with a Ryzen 3700X CPU.
> > The hardware works fine and is stable under Windows (tested with
> > games, benchmarks, stress-tests, ...)
>
> Does booting with pci=noats on the
On 10/16/19 11:55 PM, Quan, Evan wrote:
> This is a quick and low risk fix. Those APIs which
> are exposed to other IPs or to support sysfs/hwmon
> interfaces or DAL will have lock protection. Meanwhile
> no lock protection is enforced for swSMU internal used
> APIs. Future optimization is
On Thu, Oct 17, 2019 at 10:11 AM Sylvain Munaut <246...@gmail.com> wrote:
>
> HI,
>
> I have RX 560 2G card. It's plugged into a 16x physical / 4x
> electrical slot of a X570 chipset motherboard with a Ryzen 3700X CPU.
> The hardware works fine and is stable under Windows (tested with
> games,
HI,
I have RX 560 2G card. It's plugged into a 16x physical / 4x
electrical slot of a X570 chipset motherboard with a Ryzen 3700X CPU.
The hardware works fine and is stable under Windows (tested with
games, benchmarks, stress-tests, ...)
But when trying for instance steam under linux, or even
Inline.
> -Original Message-
> From: Kazlauskas, Nicholas
> Sent: 2019/October/17, Thursday 9:37 AM
> To: Liu, Zhan ; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amd/display: Modify display link stream setup
> sequence.
>
> On 2019-10-17 12:28 a.m., Liu, Zhan wrote:
> >
On 2019-10-17 12:28 a.m., Liu, Zhan wrote:
> From: Zhan Liu
>
> [Why]
> When a specific kind of connector is detected,
> DC needs to set the attribute of the stream.
> This step needs to be done before enabling link,
> or some bugs (e.g. display won't light up)
> will be observed.
>
> [How]
>
On 2019-10-17 5:11 a.m., Wayne Lin wrote:
> [Why]
> While setting hdmi_vic, hv_frame.vic is not initialized and might
> assign a wrong value to hdmi_vic. Cause to send out VSIF with
> abnormal value.
>
> [How]
> Initialize hv_frame and avi_frame
>
> Signed-off-by: Wayne Lin
Reviewed-by:
On Thu, Oct 17, 2019 at 3:51 AM Takashi Iwai wrote:
>
> On Fri, 11 Oct 2019 03:45:35 +0200,
> Alex Deucher wrote:
> >
> > We are able to power down the GPU and audio via the GPU driver
> > so flag these asics as supporting runtime pm.
> >
> > Signed-off-by: Alex Deucher
>
> Sorry for the late
Tested-by: Shirish S
Regards,
Shirish S
-Original Message-
From: Nick Desaulniers
Sent: Thursday, October 17, 2019 4:32 AM
To: Wentland, Harry ; Deucher, Alexander
Cc: yshu...@gmail.com; andrew.coop...@citrix.com; a...@arndb.de;
clang-built-li...@googlegroups.com;
[Why]
While setting hdmi_vic, hv_frame.vic is not initialized and might
assign a wrong value to hdmi_vic. Cause to send out VSIF with
abnormal value.
[How]
Initialize hv_frame and avi_frame
Signed-off-by: Wayne Lin
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++
1 file changed,
Smatch complains that we need to initialized "*cap" otherwise it can
lead to an uninitialized variable bug in the caller. This seems like a
reasonable warning and it doesn't hurt to silence it at least.
drivers/gpu/drm/amd/amdgpu/vi.c:767 vi_asic_reset_method() error: uninitialized
symbol
Am 16.10.19 um 18:04 schrieb Jason Gunthorpe:
On Wed, Oct 16, 2019 at 10:58:02AM +0200, Christian König wrote:
Am 15.10.19 um 20:12 schrieb Jason Gunthorpe:
From: Jason Gunthorpe
8 of the mmu_notifier using drivers (i915_gem, radeon_mn, umem_odp, hfi1,
scif_dma, vhost, gntdev, hmm) drivers
On Fri, 11 Oct 2019 03:45:34 +0200,
Alex Deucher wrote:
>
> Only enable the vga_switcheroo logic on systems with the
> ATPX ACPI method. This logic is not needed for asics
> that are not part of a PX (PowerXpress)/HG (Hybrid Graphics)
> platform.
>
> Signed-off-by: Alex Deucher
> ---
>
On Fri, 11 Oct 2019 03:45:35 +0200,
Alex Deucher wrote:
>
> We are able to power down the GPU and audio via the GPU driver
> so flag these asics as supporting runtime pm.
>
> Signed-off-by: Alex Deucher
Sorry for the late reply, as I've been off for the last few weeks.
The change itself looks
From: Chenwandun
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_resource.c:1913:48: error:
struct dc_crtc_timing_flags has no member named DSC
if (res_ctx->pipe_ctx[i].stream->timing.flags.DSC)
^
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