Hi Emil,
On Fri, 1 Nov 2019 13:03:13 +
Emil Velikov wrote:
> From: Emil Velikov
>
> As mentioned by Christian, for drivers which support only primary nodes
> this changes the returned error from -EACCES into -EOPNOTSUPP/-ENOSYS.
Are you sure this is true for MODESET-only nodes (those
[AMD Official Use Only - Internal Distribution Only]
The Patch is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of James Zhu
Sent: 2019年11月27日 3:34
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, James
Subject: [PATCH 2/2] drm/amdgpu/gfx: Increase
[AMD Official Use Only - Internal Distribution Only]
Ah, send it too quickly. Clean up oss edc counters seems not necessary to me
unless it helps current gfx ras spgr issue. (I suspect it would help on that
issue).
Regards,
Hawking
-Original Message-
From: Zhang, Hawking
Sent:
[AMD Official Use Only - Internal Distribution Only]
Hi James,
Arcturus and vg20 have different SDMA instances so that the common edc counter
array can't cover both ASICs. The edc counter initialization has to be either
keeping in IP specific ecc late init or using different regs array.
Since
Implement an accessor of adev->tmz.enabled. Let not
code around access it as "if (adev->tmz.enabled)"
as the organization may change. Instead...
Recruit "bool amdgpu_is_tmz(adev)" to return
exactly this Boolean value. That is, this function
is now an accessor of an already initialized and
set
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Emily Deng
>-Original Message-
>From: Grodzovsky, Andrey
>Sent: Tuesday, November 26, 2019 7:37 AM
>Cc: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org; Koenig,
>Christian ; Deng, Emily
>;
Acked-by: Alex Deucher
From: amd-gfx on behalf of Zhan Liu
Sent: Tuesday, November 26, 2019 4:32 PM
To: amd-gfx@lists.freedesktop.org ; Wu, Hersen
; Siqueira, Rodrigo
Cc: Liu, Zhan
Subject: [PATCH] drm/amd/display: Get NV14 specific ip params as needed
[Why]
NV14 is using its own ip params that's different from other
DCN2.0 ASICs.
[How]
Add ASIC revision check to make sure NV14 gets correct
ip params.
Signed-off-by: Zhan Liu
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
I'm not well versed in MST bw validation, which might explain my confusion here
- so bear with me :)
...
On 2019-11-16 5:01 p.m., mikita.lip...@amd.com wrote:
> From: Mikita Lipski
>
> Adding PBN attribute to drm_dp_vcpi_allocation structure to
> keep track of how much bandwidth each Port
Looks like the shift and mask are reversed. Does this patch fix it?
Yes, the warning is gone and it still works. Thank you!
Tested-by: Meelis Roos
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
On 2019-11-15 11:01 a.m., Alex Deucher wrote:
> Removing this causes hangs in some games, so re-add it, but add
> a timeout so we don't hang while switching flip types.
>
> Bug: https://bugzilla.kernel.org/show_bug.cgi?id=205169
> Bug: https://bugs.freedesktop.org/show_bug.cgi?id=112266
> Bug:
Clear SDMA and HDP EDC counter in GPR workarounds.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index c8ace51..dc38df8 100644
---
For Arcturus, increase dispatch packet number to stress scheduler.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index
On 2019-11-25 4:36 p.m., Zuo, Jerry wrote:
> Please kindly give a review on my latest revision. Thanks a lot.
>
Both patches are
Reviewed-by: Harry Wentland
Harry
> Regards,
> Jerry
>
> -Original Message-
> From: Jerry (Fangzhi) Zuo
> Sent: November 5, 2019 11:38 AM
> To:
On Tue, Nov 26, 2019 at 4:43 AM Xiaojie Yuan wrote:
>
> srbm_mutex is to guarantee atomicity for r/w of gfx indexed registers
>
> Signed-off-by: Xiaojie Yuan
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
Applied. thanks!
Alex
On Tue, Nov 26, 2019 at 3:15 AM Jules Irenge wrote:
>
> Replace 0 with NULL to fix sparse tool warning
> warning: Using plain integer as NULL pointer
>
> Signed-off-by: Jules Irenge
> ---
> drivers/gpu/drm/radeon/radeon_audio.c | 2 +-
> 1 file changed, 1
On Tue, Nov 26, 2019 at 7:10 AM Dan Carpenter wrote:
>
> Originally the last WREG32_SOC15() was a part of the if statement block
> but the curly braces are on the wrong line.
>
> Fixes: bb0db70f3f75 ("drm/amdgpu: separate JPEG1.0 code out from VCN1.0")
> Signed-off-by: Dan Carpenter
Applied.
On Tue, Nov 26, 2019 at 10:58 AM Takashi Iwai wrote:
>
> On Tue, 26 Nov 2019 16:31:37 +0100,
> Alex Deucher wrote:
> >
> > On Tue, Nov 26, 2019 at 9:53 AM Takashi Iwai wrote:
> > >
> > > On Mon, 25 Nov 2019 15:40:43 +0100,
> > > Alex Deucher wrote:
> > > >
> > > > On Sat, Nov 23, 2019 at 3:57 AM
On Tue, 26 Nov 2019 16:31:37 +0100,
Alex Deucher wrote:
>
> On Tue, Nov 26, 2019 at 9:53 AM Takashi Iwai wrote:
> >
> > On Mon, 25 Nov 2019 15:40:43 +0100,
> > Alex Deucher wrote:
> > >
> > > On Sat, Nov 23, 2019 at 3:57 AM Takashi Iwai wrote:
> > > >
> > > > On Fri, 22 Nov 2019 22:43:49 +0100,
I recently updated amd-staging-drm-next. Apply whatever makes sense for now
and it'll naturally fall out in the next rebase.
Alex
From: Grodzovsky, Andrey
Sent: Monday, November 25, 2019 7:09 PM
To: Deng, Emily
Cc: dri-de...@lists.freedesktop.org ;
On 11/26/19 4:08 AM, Christian König wrote:
Am 25.11.19 um 17:51 schrieb Steven Price:
On 25/11/2019 14:10, Andrey Grodzovsky wrote:
When the sched thread is parked we assume ring_mirror_list is
not accessed from here.
FWIW I don't think this is necessary. kthread_park() will wait until the
Ping
Andrey
On 11/25/19 3:51 PM, Andrey Grodzovsky wrote:
Problem:
Due to a race between drm_sched_cleanup_jobs in sched thread and
drm_sched_job_timedout in timeout work there is a possiblity that
bad job was already freed while still being accessed from the
timeout thread.
Fix:
Instead of
On 26/11/2019 10:24, Leo wrote:
On 2019-11-16 5:01 p.m., mikita.lip...@amd.com wrote:
From: Mikita Lipski
Adding a helper function to be called by
drivers outside of DRM to enable DSC on
the MST ports.
Function is called to recalculate VCPI allocation
if DSC is enabled and raise the DSC
> -Original Message-
> From: amd-gfx On Behalf Of
> Christian König
> Sent: 2019/November/26, Tuesday 5:10 AM
> To: Jules Irenge ; Deucher, Alexander
>
> Cc: Zhou, David(ChunMing) ; airl...@linux.ie;
> linux-ker...@vger.kernel.org; amd-gfx@lists.freedesktop.org; dri-
>
On Tue, Nov 26, 2019 at 9:53 AM Takashi Iwai wrote:
>
> On Mon, 25 Nov 2019 15:40:43 +0100,
> Alex Deucher wrote:
> >
> > On Sat, Nov 23, 2019 at 3:57 AM Takashi Iwai wrote:
> > >
> > > On Fri, 22 Nov 2019 22:43:49 +0100,
> > > Alex Deucher wrote:
> > > >
> > > > These patches were originally
Just realized Lyude wasn't CC'd originally, and I forgot to CC everyone as well
in the reply :)
Leo
On 2019-11-26 10:24 a.m., Leo wrote:
>
>
> On 2019-11-16 5:01 p.m., mikita.lip...@amd.com wrote:
>> From: Mikita Lipski
>>
>> Adding a helper function to be called by
>> drivers outside of DRM
On 2019-11-16 5:01 p.m., mikita.lip...@amd.com wrote:
> From: Mikita Lipski
>
> Adding a helper function to be called by
> drivers outside of DRM to enable DSC on
> the MST ports.
>
> Function is called to recalculate VCPI allocation
> if DSC is enabled and raise the DSC flag to enable.
> In
Reviewed-by: Leo Li
On 2019-11-16 5:01 p.m., mikita.lip...@amd.com wrote:
> From: Mikita Lipski
>
> [why]
> For DSC case we cannot always use topology manager's PBN divider
> variable. The default divider does not take FEC into account.
> Therefore we should allow driver to calculate its own
> -Original Message-
> From: amd-gfx On Behalf Of
> Christian König
> Sent: 2019/November/26, Tuesday 5:10 AM
> To: Jules Irenge ; Deucher, Alexander
>
> Cc: Zhou, David(ChunMing) ; airl...@linux.ie;
> linux-ker...@vger.kernel.org; amd-gfx@lists.freedesktop.org; dri-
>
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: 2019/November/26, Tuesday 9:51 AM
> To: amd-gfx list
> Cc: Deucher, Alexander
> Subject: Re: [PATCH] drm/amdgpu: move pci handling out of pm ops
>
> Ping? I've tested this on all the cards I have access to.
>
On Mon, 25 Nov 2019 15:40:43 +0100,
Alex Deucher wrote:
>
> On Sat, Nov 23, 2019 at 3:57 AM Takashi Iwai wrote:
> >
> > On Fri, 22 Nov 2019 22:43:49 +0100,
> > Alex Deucher wrote:
> > >
> > > These patches were originally part of a larger set of patches
> > > to enabled runtime pm support on the
On 2019-11-26 9:46 a.m., Zhan liu wrote:
[Why]
This line of code was modified. However, comments
remained unchanged. As a result, comments and code are
mismatching.
[How]
Modifying comments to reflect code. At the same time,
explaining why the value was changed from 200ms to
3000ms.
Reviewed-by: Zhan Liu
> -Original Message-
> From: amd-gfx On Behalf Of
> Xiaojie Yuan
> Sent: 2019/November/26, Tuesday 4:44 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Xiao, Jack ; Yuan, Xiaojie
> ; Zhang, Hawking
> Subject: [PATCH] drm/amdgpu/gfx10: remove outdated comments
>
>
Ping? I've tested this on all the cards I have access to.
Alex
On Thu, Nov 21, 2019 at 11:55 AM Alex Deucher wrote:
>
> The documentation says the that PCI core handles this
> for you unless you choose to implement it. Just rely
> on the PCI core to handle the pci specific bits.
>
>
[Why]
This line of code was modified. However, comments
remained unchanged. As a result, comments and code are
mismatching.
[How]
Modifying comments to reflect code. At the same time,
explaining why the value was changed from 200ms to
3000ms.
Signed-off-by: Zhan Liu
---
[Why]
This line of code was modified. However, comments
remained unchanged. As a result, comments and code are
mismatching.
[How]
Modifying comments to reflect code. At the same time,
explaining why the value was changed from 200ms to
3000ms.
Signed-off-by: Zhan Liu
---
On Tue, Nov 26, 2019 at 3:39 AM Meelis Roos wrote:
>
> I tried latest (5.4) custom kernel (with UBSAN) on my Dell D600 laptop and
> found that it exhibits a
> UBSAN warning triggered by userspace ioctl. Here is dmesg with anything
> radeon-related + the warning, and config:
>
> [ 17.659534]
Shift and mask were reversed. Noticed by chance.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/radeon/r100.c | 4 ++--
drivers/gpu/drm/radeon/r200.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index
Thanks Christian for reviewing it. I will try to cleanup
drm_sched_entity_set_priority and come up with another patch.
On 11/26/19 10:45 AM, Christian König wrote:
It looks like a start, but there numerous things which needs to be fixed.
Question number one is: What's that good for? Entities
I tried latest (5.4) custom kernel (with UBSAN) on my Dell D600 laptop and
found that it exhibits a
UBSAN warning triggered by userspace ioctl. Here is dmesg with anything
radeon-related + the warning, and config:
[ 17.659534] [drm] radeon kernel modesetting enabled.
[ 17.659607] radeon
Hi Monk,
hw_fini() is called in suspend code path as well. I'm wondering how csb can be
evicted if it's not unpined before suspend.
BR,
Xiaojie
> On Nov 26, 2019, at 7:50 PM, Monk Liu wrote:
>
> kernel would report a warning on double unpin
> on the csb BO because we unpin it during hw_fini
Am 26.11.19 um 12:50 schrieb Monk Liu:
otherwse the flush_gpu_tlb will hang if we unload the
KMD becuase the schedulers already stopped
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Hello Leo Liu,
The patch 1b61de45dfaf: "drm/amdgpu: add initial VCN2.0 support (v2)"
from Oct 15, 2018, leads to the following static checker warning:
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c:1083 vcn_v2_0_stop()
error: uninitialized symbol 'r'.
Acked-by: Christian König
Am 26.11.19 um 04:11 schrieb Quan, Evan:
Acked-by: Evan Quan
-Original Message-
From: amd-gfx On Behalf Of Alex
Deucher
Sent: Tuesday, November 26, 2019 12:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: flag
Originally the last WREG32_SOC15() was a part of the if statement block
but the curly braces are on the wrong line.
Fixes: bb0db70f3f75 ("drm/amdgpu: separate JPEG1.0 code out from VCN1.0")
Signed-off-by: Dan Carpenter
---
From static analysis (Smatch). Not tested.
Am 23.11.19 um 00:21 schrieb Felix Kuehling:
On 2019-11-22 5:55 p.m., Oak Zeng wrote:
Config the translation retry behavior according to noretry
kernel parameter
Change-Id: I5b91ea77715137cf8cb84e258ccdfbb19c7a4ed1
Signed-off-by: Oak Zeng
Suggested-by: Jay Cornwall
Reviewed-by: Felix
Reviewed-by: Christian König
Am 25.11.19 um 06:30 schrieb Quan, Evan:
Reviewed-by: Evan Quan
-Original Message-
From: amd-gfx On Behalf Of Alex
Deucher
Sent: Saturday, November 23, 2019 3:19 AM
To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org
Cc: Deucher,
Am 21.11.19 um 04:39 schrieb Luben Tuikov:
On 2019-11-20 10:21 p.m., Luben Tuikov wrote:
On 2019-11-20 10:02 p.m., Liu, Aaron wrote:
-Original Message-
From: amd-gfx On Behalf Of
Luben Tuikov
Sent: Thursday, November 21, 2019 9:33 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher,
Am 20.11.19 um 23:29 schrieb Luben Tuikov:
Simplify padding calculations.
v2: Comment update and spacing.
Signed-off-by: Luben Tuikov
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 4 ++--
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +-
1 file changed, 41 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 879c0a1..a56cba9 100644
---
kernel would report a warning on double unpin
on the csb BO because we unpin it during hw_fini
but actually we don't need to pin/unpin it during
hw_init/fini since it is created with kernel pinned
remove all those useless code for gfx9/10
Signed-off-by: Monk Liu
---
otherwse the flush_gpu_tlb will hang if we unload the
KMD becuase the schedulers already stopped
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
still need to init csb even for SRIOV
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4d6df35..879c0a1 100644
---
since we don't have RLCG ucode loading and no SRlist as well
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index
Am 22.11.19 um 19:21 schrieb Alex Deucher:
On Fri, Nov 22, 2019 at 4:17 AM Daniel Vetter wrote:
On Fri, Nov 22, 2019 at 7:37 AM Gerd Hoffmann wrote:
Use the shared address space of the drm device (see drm_open() in
drm_file.c) for dma-bufs too. That removes a difference betweem drm
device
Am 26.11.19 um 01:35 schrieb Jules Irenge:
Replace 0 with NULL to fix sparse tool warning
warning: Using plain integer as NULL pointer
Signed-off-by: Jules Irenge
Acked-by: Christian König
---
drivers/gpu/drm/radeon/radeon_audio.c | 2 +-
1 file changed, 1 insertion(+), 1
Am 20.11.19 um 20:08 schrieb Luben Tuikov:
On 2019-11-20 13:40, Christian König wrote:
Am 20.11.19 um 18:50 schrieb Luben Tuikov:
On 2019-11-20 12:24, Christian König wrote:
Am 20.11.19 um 18:16 schrieb Christian König:
Am 20.11.19 um 17:49 schrieb Luben Tuikov:
On 2019-11-19 21:41, Marek
It looks like a start, but there numerous things which needs to be fixed.
Question number one is: What's that good for? Entities are not the
problem here. The real issue is the fence ring and the rq_list.
The rq_list could actually be made constant since it should never be
changed by the
Signed-off-by: Xiaojie Yuan
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 2c5dc9b58e23..6bd8d06dbde9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++
srbm_mutex is to guarantee atomicity for r/w of gfx indexed registers
Signed-off-by: Xiaojie Yuan
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
Am 25.11.19 um 17:51 schrieb Steven Price:
On 25/11/2019 14:10, Andrey Grodzovsky wrote:
When the sched thread is parked we assume ring_mirror_list is
not accessed from here.
FWIW I don't think this is necessary. kthread_park() will wait until the
thread is parked, at which point the thread is
On Mon, Nov 25, 2019 at 09:24:56AM -0500, Harry Wentland wrote:
>
>
> On 2019-11-25 4:49 a.m., Louis Li wrote:
> > On Fri, Nov 22, 2019 at 10:31:19AM -0500, Harry Wentland wrote:
> >>
> >>
> >> On 2019-11-22 1:33 a.m., Louis Li wrote:
> >>> On Thu, Nov 21, 2019 at 08:47:50AM -0500, Kazlauskas,
Replace 0 with NULL to fix sparse tool warning
warning: Using plain integer as NULL pointer
Signed-off-by: Jules Irenge
---
drivers/gpu/drm/radeon/radeon_audio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_audio.c
Currently we pre-allocate entities for all the HW IPs on
context creation and some of which are might never be used.
This patch tries to resolve entity wastage by creating entities
for a HW IP only when it is required.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 142
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