[AMD Official Use Only - Internal Distribution Only]
Series is Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx On Behalf Of Evan Quan
Sent: Friday, March 27, 2020 11:42 AM
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan
Subject: [PATCH 1/9] drm/amd/powerplay: avoid calling
Prepare for coming lock protection for SMU message issuing.
Change-Id: Ie5656cdc036cc21c6cc079bce2a43b05f3e167a8
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/smumgr/vega20_smumgr.c | 48 +--
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/am
This could avoid the possible race condition.
Change-Id: I518b6f96b1a836bda4f1c7e13c00f62cd316a90c
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 3 +++
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 +
drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c | 16 +++
Drop unused smu7 message APIs.
Change-Id: I8fc13b626fad04241f2b9353419282eaa14923af
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 14 --
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.h | 3 ---
2 files changed, 17 deletions(-)
diff --git a/dri
Prepare for coming lock protection for SMU message issuing.
Change-Id: Ie1365f350abcde4c4474e9bbdaf7742349a0534d
Signed-off-by: Evan Quan
---
.../gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 10 +++
.../drm/amd/powerplay/hwmgr/smu7_thermal.c| 8 +++---
.../drm/amd/powerplay/smumgr/fiji_s
Prepare for coming lock protection for SMU message issuing.
Change-Id: If5f7615483d9967f9512fba49cc8454a1300ba6c
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/smu
Prepare for coming lock protection for SMU message issuing.
Change-Id: Id2c0504c60358e6ff2beee83058e36812962e934
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/smumgr/vega10_smumgr.c | 24 +++---
.../drm/amd/powerplay/smumgr/vega12_smumgr.c | 32 +--
2 files changed
Prepare for coming lock protection for SMU message issuing.
Change-Id: Ia4a07898410a661d8603474ec253859278f00d3c
Signed-off-by: Evan Quan
---
.../gpu/drm/amd/powerplay/hwmgr/smu8_hwmgr.c | 2 +-
.../drm/amd/powerplay/smumgr/smu8_smumgr.c| 30 +--
2 files changed, 16 inserti
Prepare for coming lock protection for SMU message issuing.
Change-Id: I05ec712b05dcb2831c948a1df26695619ba8014a
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/smumgr/smu10_smumgr.c| 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/
We have three ib pools, they are normal, VM, direct pools.
Any jobs which schedule IBs without dependence on gpu scheduler should
use DIRECT pool.
Any jobs schedule direct VM update IBs should use VM pool.
Any other jobs use NORMAL pool.
Signed-off-by: xinhui pan
---
drivers/gpu/drm/amd/amdgp
From: James Zhu
[ Upstream commit acfc62dc68770aa665cc606891f6df7d6d1e52c0 ]
fix typo for vcn1 idle check
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Mario Kleiner
[ Upstream commit dec9de2ada523b344eb2428abfedf9d6cd0a0029 ]
This fixes a problem found on the MacBookPro 2017 Retina panel:
The panel reports 10 bpc color depth in its EDID, and the
firmware chooses link settings at boot which support enough
bandwidth for 10 bpc (324000 kbi
From: Mario Kleiner
[ Upstream commit dec9de2ada523b344eb2428abfedf9d6cd0a0029 ]
This fixes a problem found on the MacBookPro 2017 Retina panel:
The panel reports 10 bpc color depth in its EDID, and the
firmware chooses link settings at boot which support enough
bandwidth for 10 bpc (324000 kbi
From: James Zhu
[ Upstream commit acfc62dc68770aa665cc606891f6df7d6d1e52c0 ]
fix typo for vcn1 idle check
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Mario Kleiner
[ Upstream commit dec9de2ada523b344eb2428abfedf9d6cd0a0029 ]
This fixes a problem found on the MacBookPro 2017 Retina panel:
The panel reports 10 bpc color depth in its EDID, and the
firmware chooses link settings at boot which support enough
bandwidth for 10 bpc (324000 kbi
From: James Zhu
[ Upstream commit acfc62dc68770aa665cc606891f6df7d6d1e52c0 ]
fix typo for vcn1 idle check
Signed-off-by: James Zhu
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Evan Quan
[ Upstream commit 063e768ebd27d3ec0d6908b7f8ea9b0a732b9949 ]
This can fix the baco reset failure seen on Navi10.
And this should be a low risk fix as the same sequence
is already used for system suspend/resume.
Signed-off-by: Evan Quan
Reviewed-by: Alex Deucher
Signed-off-by:
Looks great, except the note on patch 4 about the commit description text,
and perhaps we don't need a period in the title of patch 3.
With those fixed, the series is Reviewed-by: Luben Tuikov
Thank you Andrey.
Regards,
Luben
On 2020-03-26 16:02, Andrey Grodzovsky wrote:
> This patchset intro
On 2020-03-26 16:02, Andrey Grodzovsky wrote:
> This flag used to avoid calling mem_sync without need.
The title of this patch means that the flag is an "enabler" flag,
i.e. when present, it enables something to happen (flush caches).
While the description text in the commit implies that the flag
That looks so much better--thank you! Excellent!
Regards,
Luben
On 2020-03-26 16:02, Andrey Grodzovsky wrote:
> Add this for gfx10 and gfx9.
>
> v2: Fix identation
>
> Signed-off-by: Andrey Grodzovsky
> ---
> drivers/gpu/drm/amd/amdgpu/nvd.h| 48
> +
>
On 3/23/20 6:14 PM, Jason Gunthorpe wrote:
From: Jason Gunthorpe
This is v2 of the first simple series with a few additional patches of little
adjustments.
This needs an additional patch to the hmm tester:
diff --git a/tools/testing/selftests/vm/hmm-tests.c
b/tools/testing/selftests/vm/hmm
Hi Amber,
I see that this is based on the debugger event code. Jon and I are just
working through some issues with that code. The lessons from that will
need to be applied to this as well. But I think we can define your API
to simplify this a bit.
The basic problem is, that we have one Fifo
Implement the .mem_sync hook defined earlier.
v2: Rename functions
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 27 ++-
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 16 +++-
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 16
Add this for gfx10 and gfx9.
v2: Fix identation
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/nvd.h| 48 +
drivers/gpu/drm/amd/amdgpu/soc15d.h | 25 ++-
2 files changed, 72 insertions(+), 1 deletion(-)
diff --git a/drive
This flag used to avoid calling mem_sync without need.
v2:
Move new flag to drm_amdgpu_cs_chunk_ib.flags
Bump up UAPI version
Remove condition on job != null to emit mem_sync
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_
This patchset introduces AQUIRE_MEM packet submission at the begining of each
gfx IB
if requested by user mode client. This is helpful in solving issues with cache
coherency
during amdgpu_test and Vulkan CTS tests.
Andrey Grodzovsky (4):
drm/amdgpu: Add new ring callback to insert memory sync
Used to flush and invalidate various caches.
v2: Raname function hook
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 448c
Patches 1-3 are
Reviewed-by: Felix Kuehling
See my separate reply to patch 4.
Thanks,
Felix
On 2020-03-24 17:57, Alex Sierra wrote:
Support added into IH to enable ring1 and ring2 for navi10_ih.
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 205 +++
This change seems to break the sequence of IP block initialization that
is special for SRIOV. Is your intention to use the SRIOV sequence for
bare metal as well? That would be good for simplifying the code but then
that should be stated in the commit description, or even be done as a
separate c
Hi Dave, Daniel,
Fixes for 5.7.
The following changes since commit cb7adfd6ad12a11902ebe374bec7fd4efa2cec1c:
Merge tag 'mediatek-drm-next-5.7' of
https://github.com/ckhu-mediatek/linux.git-tags into drm-next (2020-03-20
13:08:38 +1000)
are available in the Git repository at:
git://people
Hi Dave, Daniel,
Just one small fix for the scheduler.
The following changes since commit 16fbf79b0f83bc752cee8589279f1ebfe57b3b6e:
Linux 5.6-rc7 (2020-03-22 18:31:56 -0700)
are available in the Git repository at:
git://people.freedesktop.org/~agd5f/linux tags/amd-drm-fixes-5.6-2020-03-26
On 2020-03-26 3:11, Pan, Xinhui wrote:
2020年3月26日 14:51，Koenig, Christian 写道：
Am 26.03.2020 07:45 schrieb "Pan, Xinhui" :
2020年3月26日 14:36，Koenig, Christian 写道：
Am 26.03.2020 07:15 schrieb "Pan, Xinhui" :
2020年3月26日 13:38，Koenig, Christian 写道：
Yeah that's on my TODO list for qu
Am 26.03.20 um 10:47 schrieb xinhui pan:
We have tree ib pools, they are normal, VM, direct pools.
Any jobs which schedule IBs without dependence on gpu scheduler should
use DIRECT pool.
Any jobs schedule direct VM update IBs should use VM pool.
Any other jobs use NORMAL pool.
Signed-off-by:
use corresponding ib pool for each job
Signed-off-by: xinhui pan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c| 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 5 +++--
drivers/gpu/dr
We have tree ib pools, they are normal, VM, direct pools.
Any jobs which schedule IBs without dependence on gpu scheduler should
use DIRECT pool.
Any jobs schedule direct VM update IBs should use VM pool.
Any other jobs use NORMAL pool.
Signed-off-by: xinhui pan
---
drivers/gpu/drm/amd/amdgpu
Am 25.03.20 um 15:29 schrieb Andrey Grodzovsky:
Used to flush and invalidate various caches.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
b/drivers/gpu/drm/amd/amdgp
> 2020年3月26日 14:51，Koenig, Christian 写道：
>
>
>
> Am 26.03.2020 07:45 schrieb "Pan, Xinhui" :
>
>
> > 2020年3月26日 14:36，Koenig, Christian 写道：
> >
> >
> >
> > Am 26.03.2020 07:15 schrieb "Pan, Xinhui" :
> >
> >
> > > 2020年3月26日 13:38，Koenig, Christian 写道：
> > >
> > > Yeah that's on my
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