On Mon, Jul 06, 2020 at 04:21:38PM +0530, Suraj Upadhyay wrote:
> Hii Maintainers,
> I recently came across this list of janatorial tasks
> for starters on DRM subsystem [1]. One of the tasks is replacing
> conventional dmesg macros (like dev_info(), dev_warn() and dev_err())
> with DRM
Am 2020-07-06 um 10:26 p.m. schrieb Li, Dennis:
> [AMD Official Use Only - Internal Distribution Only]
>
> Hi, Felix,
> Do you mean that KFD use dqm->is_resetting and dqm_lock together to do
> this protection, just like the below function? If so, there is a new
> problem. When KFD find
[AMD Official Use Only - Internal Distribution Only]
Hi, Felix,
Do you mean that KFD use dqm->is_resetting and dqm_lock together to do
this protection, just like the below function? If so, there is a new problem.
When KFD find dqm->is_resetting has been set, how to handle?
Am 2020-07-06 um 9:16 p.m. schrieb Li, Dennis:
> [AMD Official Use Only - Internal Distribution Only]
>
> Hi, Felix,
> Driver should use the same lock to protect hardware from being accessed
> during GPU reset. The flag dqm->is_resetting couldn't prevent calls that
> access hardware in
[AMD Official Use Only - Internal Distribution Only]
I think you may wrongly treated the "pm_enabled" as "dpm_enabled".
pm_enabled should be always true unless user specifies "dpm=0" on module
loading.
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Tuesday, July 7,
[AMD Official Use Only - Internal Distribution Only]
Hi, Felix,
Driver should use the same lock to protect hardware from being accessed
during GPU reset. The flag dqm->is_resetting couldn't prevent calls that access
hardware in multi-threads case.
Best Regards
Dennis Li
-Original
Please review. Thanks.
Marek
From 794a2599e81d7d21e5c8ca475818309f59ad7e48 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?=
Date: Mon, 6 Jul 2020 18:23:17 -0400
Subject: [PATCH] drm/amdgpu: don't do soft recovery if gpu_recovery=0
MIME-Version: 1.0
Content-Type: text/plain;
Am 2020-07-06 um 5:39 a.m. schrieb Dennis Li:
> If GPU hang, driver will fail to flush tlb, return the hang error
> to callers, make callers have a chance to handle the error.
Usually, when a function returns an error, you expect that the function
didn't do what you asked it to do. But in your
Am 2020-07-06 um 6:01 a.m. schrieb Dennis Li:
> During GPU reset, driver should hold on all external access to
> GPU, otherwise psp will randomly fail to do post, and then cause
> system hang.
>
> Signed-off-by: Dennis Li
> Change-Id: I7d5d41f9c4198b917d7b49606ba3850988e5b936
>
> diff --git
We need to set the mp1 state in PCI shutdown and certain
reset cases which happens after we've already suspended
the SMU. SMU suspend sets pm_enabled to false which
prevents this code from being run.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 ---
1 file
LGTM
Reviewed-by: Rodrigo Siqueira
On 07/02, Bhawanpreet Lakha wrote:
> This mask is missing for dcn3 so add it from dcn20.
>
> enc2_set_dynamic_metadata() trys to sets this and we get a
> generic_reg warning since the mask is not defined.
>
> Signed-off-by: Bhawanpreet Lakha
> ---
>
Now that TTM is fixed up we can finally stop that nonsense.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 104 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 18 +++-
2 files changed, 42 insertions(+), 80 deletions(-)
diff --git
Stop touching the backend private pointer alltogether and
make sure we never put the same mem twice by.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c| 46 +++--
include/drm/ttm/ttm_bo_driver.h | 2 --
2 files changed, 26 insertions(+), 22
Ping.
Am 2020-06-26 um 7:39 p.m. schrieb Felix Kuehling:
> The correct way to implement the fops->poll callback uses EPOLL* macros.
>
> For reference see also:
> commit a9a08845e9ac ("vfs: do bulk POLL* -> EPOLL* replacement")
> commit 7a163b2195cd ("unify {de,}mangle_poll(), get rid of
Fix the spelling mistake in the title of the patch,
"unlcok" --> "unlock".
Use present tense in the title and in commit text:
"Moving" --> "Move".
Shorten your title to fit within 80-char limit.
A Git hook checks for this and complains about it
when doing a git-push. I suggest:
Applied. Thanks!
Alex
On Thu, Jul 2, 2020 at 11:54 AM Tiezhu Yang wrote:
>
> On 07/02/2020 04:39 PM, Christian König wrote:
> > Am 02.07.20 um 10:35 schrieb Tiezhu Yang:
> >> On 07/02/2020 04:27 PM, Christian König wrote:
> >>> Am 02.07.20 um 04:27 schrieb Tiezhu Yang:
> When I update the
Moving mutex unlock and lock outside of the "if" statement as it can be shown
that
the mutex will be taken and released, regardless of the value checked in the if
statement.
Signed-off-by: Alex Jivin
Suggested-By: Luben Tukov
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 12
1
On Thu, Jul 2, 2020 at 3:25 AM YueHaibing wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c: In function 'amdgpu_init_mem_type':
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:81:24: warning:
> variable 'adev' set but not used
On 2020-07-06 8:59 a.m., Christian König wrote:
> Am 06.07.20 um 14:42 schrieb Luben Tuikov:
>> On 2020-06-30 3:01 a.m., Christian König wrote:
>>> Am 30.06.20 um 00:46 schrieb Luben Tuikov:
On 2020-06-26 1:04 p.m., Christian König wrote:
> Am 26.06.20 um 18:12 schrieb Alex Jivin:
>
Hii Maintainers,
I recently came across this list of janatorial tasks
for starters on DRM subsystem [1]. One of the tasks is replacing
conventional dmesg macros (like dev_info(), dev_warn() and dev_err())
with DRM dmesg macros [2]. And I need your input whether the
conversions to DRM dmesg
From: Tom Rix
clang static analysis flags this error
drivers/gpu/drm/radeon/ci_dpm.c:5652:9: warning: Use of memory after it is
freed [unix.Malloc]
kfree(rdev->pm.dpm.ps[i].ps_priv);
^~
drivers/gpu/drm/radeon/ci_dpm.c:5654:2:
Am 06.07.20 um 14:42 schrieb Luben Tuikov:
On 2020-06-30 3:01 a.m., Christian König wrote:
Am 30.06.20 um 00:46 schrieb Luben Tuikov:
On 2020-06-26 1:04 p.m., Christian König wrote:
Am 26.06.20 um 18:12 schrieb Alex Jivin:
[SNIP]
Adding a delay here is probably just postponing that. Do we
On 2020-06-30 3:01 a.m., Christian König wrote:
> Am 30.06.20 um 00:46 schrieb Luben Tuikov:
>> On 2020-06-26 1:04 p.m., Christian König wrote:
>>> Am 26.06.20 um 18:12 schrieb Alex Jivin:
Adding a delay between writing to UVD control register and reading from it.
This is to allow the HW
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Gao, Likun
Sent: Monday, July 6, 2020 18:00
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Feng, Kenneth
; Gao, Likun
Subject: [PATCH 1/2] drm/amdgpu: fix coding error of mmhub pg
Am 06.07.20 um 12:01 schrieb Dennis Li:
During GPU reset, driver should hold on all external access to
GPU, otherwise psp will randomly fail to do post, and then cause
system hang.
In general a good idea, but that exposes another problem: The trylock
has now a rather right chance to fail and
Am 06.07.20 um 07:04 schrieb Huang Rui:
During IP block updates in some asic, the register distribution pattern of
context domains and invalidation engines will be changed in gc_v***.h and
mmhub_v***.h. However the register distances are always constant in one IP block
beside gfxhub and mmhub.
During GPU reset, driver should hold on all external access to
GPU, otherwise psp will randomly fail to do post, and then cause
system hang.
Signed-off-by: Dennis Li
Change-Id: I7d5d41f9c4198b917d7b49606ba3850988e5b936
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
From: Likun Gao
MMHUB powergating should be disabled on navi12 and enabled on sienna
cichlid.
Signed-off-by: Likun Gao
Change-Id: I0b0e6801408df3c13322c4f9ed8e13b6ffc9ec25
---
drivers/gpu/drm/amd/amdgpu/nv.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
If GPU hang, driver will fail to flush tlb, return the hang error
to callers, make callers have a chance to handle the error.
Signed-off-by: Dennis Li
Change-Id: Ie305ad0a77675f6eab7d5b8f68e279b7f4e7a8b9
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Gao, Likun
Sent: Monday, July 6, 2020 17:05
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Feng, Kenneth
; Gao, Likun
Subject: [PATCH] drm/amdgpu: use RREG32_KIQ to read register when get
From: Likun Gao
Use RREG32_KIQ to read gfx register when try to get gfx/sdma
clockgating state instead of RREG32, as it will result
to system hard hang when GPU is enter into GFXOFF state.
Signed-off-by: Likun Gao
Change-Id: I1fc5fe70831e0ec35f1e701a1646cb3e46e121bf
---
The newly added hexint helper is more convenient for bitmasks.
Before:
$ more /sys/module/amdgpu/parameters/ppfeaturemask
4294950911
After:
$ more /sys/module/amdgpu/parameters/ppfeaturemask
0xbfff
Cc: amd-gfx@lists.freedesktop.org
Cc: linux-ker...@vger.kernel.org
Dear Linus, dear Christian,
Am 02.07.20 um 21:42 schrieb Linus Torvalds:
On Thu, Jul 2, 2020 at 7:42 AM Christian König wrote:
I'm just not sure how well this is received upstream because it only
covers u32
On the other hand that is probably also the most used.
Not necessarily true. I'd
The newly added hexint helper is more convenient for bitmasks.
Before:
$ more /sys/module/amdgpu/parameters/ppfeaturemask
4294950911
After:
$ more /sys/module/amdgpu/parameters/ppfeaturemask
0xbfff
Cc: amd-gfx@lists.freedesktop.org
Cc: linux-ker...@vger.kernel.org
For bitmasks printing values in hex is more convenient.
Prefix with `0x` to make it clear, that it’s a hex value, and pad it
out.
Using the helper for `amdgpu.ppfeaturemask`, it will look like below.
Before:
$ more /sys/module/amdgpu/parameters/ppfeaturemask
4294950911
After:
$
For bitmasks printing values in hex is more convenient.
Prefix with `0x` to make it clear, that it’s a hex value, and pad it
out.
Using the helper for `amdgpu.ppfeaturemask`, it will look like below.
Before:
$ more /sys/module/amdgpu/parameters/ppfeaturemask
4294950911
After:
$
Hi,
In the last meeting, X.Org Foundation board has decided that XDC 2020
will be a virtual conference, given the uncertain COVID-19 situation in
Europe by September, including the possibility of a second wave,
outbreaks and travel restrictions, either in Poland or in other
countries.
XDC 2020
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