Correct the Vega20 thermal swctf limit.
Change-Id: I6cec41152b5ac377177b1a9fda92d7b6cd982e9e
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_thermal.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Correct the Vega10 thermal swctf limit.
Change-Id: I220c18bcb0772bfb8cb674337bac6dccafbd7698
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_thermal.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git
Correct the Vega12 thermal swctf limit.
Change-Id: I369e1adf9f177a8d9558282db9aa908b5a25bbb3
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_thermal.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
Am 2020-08-20 um 11:53 p.m. schrieb Huang Rui:
> On Fri, Aug 21, 2020 at 10:41:17AM +0800, Kuehling, Felix wrote:
>> Am 2020-08-20 um 4:40 a.m. schrieb Huang Rui:
>>> We still have a few iommu issues which need to address, so force raven
>>> as "dgpu" path for the moment.
>>>
>>> This is to add
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Kenneth Feng
-Original Message-
From: Jiansong Chen
Sent: Friday, August 21, 2020 11:51 AM
To: amd-gfx@lists.freedesktop.org
Cc: Gao, Likun ; Zhou1, Tao ; Feng,
Kenneth ; Chen, Jiansong (Simon)
Subject: [PATCH]
On Fri, Aug 21, 2020 at 10:41:17AM +0800, Kuehling, Felix wrote:
>
> Am 2020-08-20 um 4:40 a.m. schrieb Huang Rui:
> > We still have a few iommu issues which need to address, so force raven
> > as "dgpu" path for the moment.
> >
> > This is to add the fallback path to bypass IOMMU if IOMMU v2 is
DC BTC support for sienna_cichlid is added, it provides
the DC tolerance and aging measurements.
Signed-off-by: Jiansong Chen
Change-Id: I93b439b99c1bf365194d61385eb0fe0251f27041
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
clients don't need reset-lock for synchronization when no
GPU recovery.
v2:
change to return the return value of down_read_killable.
v3:
if GPU recovery begin, VF ignore FLR notification.
Signed-off-by: Dennis Li
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
[AMD Official Use Only - Internal Distribution Only]
[AMD Official Use Only - Internal Distribution Only]
Hi, Monk,
Got it, thanks for your explanation.
Best Regards
Dennis Li
-Original Message-
From: Liu, Monk
Sent: Friday, August 21, 2020 11:14 AM
To: Li, Dennis ;
[AMD Official Use Only - Internal Distribution Only]
>>Locked = down_read_trylock(>reset_sem);
>>If (!locked)
>>Return;
>>atomic_set(>in_gpu_reset, 1);
[Dennis Li] why need we set adev->in_gpu_reset as 1 here? It should be set
when do GPU recovery.
[ML] because "in_gpu_reset" means GPU is
MMU_NOTIFY_PROTECTION_VMA is not specific to NUMA auto-balancing. It can
also be the result of an mprotect system call which actually makes the
VMA read-only. I don't think it's OK to ignore that notifier in the
general case.
Regards,
Felix
Am 2020-08-19 um 2:00 p.m. schrieb Philip Yang:
>
Am 2020-08-20 um 4:40 a.m. schrieb Huang Rui:
> We still have a few iommu issues which need to address, so force raven
> as "dgpu" path for the moment.
>
> This is to add the fallback path to bypass IOMMU if IOMMU v2 is disabled
> or ACPI CRAT table not correct.
>
> v2: Use ignore_crat parameter
Series are Reviewed-by: Huang Rui
On Fri, Aug 21, 2020 at 05:05:03AM +0800, Alex Deucher wrote:
> From: "Prike.Liang"
>
> Enable ATHUB clock gatting set in Renoir series.
>
> Signed-off-by: Prike.Liang
> Reviewed-by: Evan Quan
> Reviewed-by: Huang Rui
> Signed-off-by: Alex Deucher
> ---
>
[AMD Official Use Only - Internal Distribution Only]
Hi, Lukas,
Thanks for your fix. This issue was caused by that I modified these files
in windows system with Samba. I will take care in the future.
Best Regards
Dennis Li
-Original Message-
From: Lukas Bulwahn
Sent: Wednesday,
From: "Prike.Liang"
Enable ATHUB clock gatting set in Renoir series.
Signed-off-by: Prike.Liang
Reviewed-by: Evan Quan
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/athub_v1_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git
From: "Prike.Liang"
Enabe HDP SD/DS clock gatting in Renoir series.
Signed-off-by: Prike.Liang
Reviewed-by: Evan Quan
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Applied. Thanks!
Alex
On Thu, Aug 20, 2020 at 5:01 AM Christian König
wrote:
>
> Am 20.08.20 um 09:52 schrieb Furquan Shaikh:
> > In `amdgpu_dm_update_backlight_caps()`, there is a local
> > `amdgpu_dm_backlight_caps` object that is filled in by
> > `amdgpu_acpi_get_backlight_caps()`. However,
Applied. Thanks!
Alex
On Thu, Aug 20, 2020 at 1:59 PM Alex Dewar wrote:
>
> In init_powerplay_table_information() the value returned from kmalloc()
> is cast unnecessarily. Remove cast.
>
> Issue identified with Coccinelle.
>
> Signed-off-by: Alex Dewar
> ---
>
Applied. Thanks!
Alex
On Wed, Aug 19, 2020 at 11:00 PM Quan, Evan wrote:
>
> [AMD Official Use Only - Internal Distribution Only]
>
> Reviewed-by: Evan Quan
>
> -Original Message-
> From: Wang Hai
> Sent: Wednesday, August 19, 2020 7:34 PM
> To: Quan, Evan ; Deucher, Alexander
> ;
Applied. Thanks!
Alex
On Wed, Aug 19, 2020 at 4:53 AM Christian König
wrote:
>
> Am 19.08.20 um 10:18 schrieb Lukas Bulwahn:
> > Besides the intended change, commit 4cc1178e166a ("drm/amdgpu: replace DRM
> > prefix with PCI device info for gfx/mmhub") also set the source files
> > mmhub_v1_0.c
In init_powerplay_table_information() the value returned from kmalloc()
is cast unnecessarily. Remove cast.
Issue identified with Coccinelle.
Signed-off-by: Alex Dewar
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega12_processpptables.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Am 2020-08-20 um 5:38 a.m. schrieb Huang Rui:
> On Thu, Aug 20, 2020 at 08:31:25AM +0800, Huang Rui wrote:
>> On Thu, Aug 20, 2020 at 08:18:57AM +0800, Kuehling, Felix wrote:
>>> On 2020-08-19 7:56 p.m., Huang Rui wrote:
On Wed, Aug 19, 2020 at 11:38:34PM +0800, Kuehling, Felix wrote:
>
Am 20.08.20 um 12:38 schrieb Shashank Sharma:
This patch adds a new trace event to track the PTE update
events. This specific event will provide information like:
- start and end of virtual memory mapping
- HW engine flags for the map
- physical address for mapping
This will be particularly
[AMD Official Use Only - Internal Distribution Only]
[AMD Official Use Only - Internal Distribution Only]
Hi, Monk,
See my below comments.
Best Regards
Dennis Li
[AMD Official Use Only - Internal Distribution Only]
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
+++
This patch adds a new trace event to track the PTE update
events. This specific event will provide information like:
- start and end of virtual memory mapping
- HW engine flags for the map
- physical address for mapping
This will be particularly useful for memory profiling tools
(like RMV) which
On 20/08/20 2:28 pm, Christian König wrote:
> Am 20.08.20 um 07:27 schrieb Shashank Sharma:
>> This patch adds a new trace event to track the PTE update
>> events. This specific event will provide information like:
>> - start and end of virtual memory mapping
>> - HW engine flags for the map
>> -
[AMD Public Use]
Thanks Dennis. Yes, that's valid case. skipping the reset and scheduler resume
sound reasonable to me.
The patch is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Li, Dennis
Sent: Thursday, August 20, 2020 16:40
To: Zhang, Hawking ;
[AMD Official Use Only - Internal Distribution Only]
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
@@ -238,19 +238,12 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct
*work)
struct amdgpu_virt *virt = container_of(work, struct amdgpu_virt,
On Thu, Aug 20, 2020 at 08:31:25AM +0800, Huang Rui wrote:
> On Thu, Aug 20, 2020 at 08:18:57AM +0800, Kuehling, Felix wrote:
> > On 2020-08-19 7:56 p.m., Huang Rui wrote:
> > > On Wed, Aug 19, 2020 at 11:38:34PM +0800, Kuehling, Felix wrote:
> > >> Am 2020-08-19 um 7:06 a.m. schrieb Huang Rui:
>
[AMD Official Use Only - Internal Distribution Only]
Hi, Frank and Monk,
Can you help review this patch? Because it also changes some virtualization
related codes.
Best Regards
Dennis Li
-Original Message-
From: Dennis Li
Sent: Thursday, August 20, 2020 5:33 PM
To:
clients don't need reset-lock for synchronization when no
GPU recovery.
v2:
change to return the return value of down_read_killable.
Signed-off-by: Dennis Li
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index c8aec832b244..ec11ed2a9ca4 100644
---
[AMD Official Use Only - Internal Distribution Only]
Hi, Christian,
Thanks for your review. I will update it according to your suggestion.
Best Regards
Dennis Li
-Original Message-
From: Christian König
Sent: Thursday, August 20, 2020 5:11 PM
To: Li, Dennis ;
Am 20.08.20 um 04:09 schrieb Dennis Li:
clients don't need reset-lock for synchronization when no
GPU recovery.
Signed-off-by: Dennis Li
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index c8aec832b244..ec11ed2a9ca4 100644
---
Am 20.08.20 um 02:33 schrieb Dennis Li:
if other threads have holden the reset lock, recovery will
fail to try_lock. Therefore we introduce atomic hive->in_reset
and adev->in_gpu_reset, to avoid reentering GPU recovery.
v2:
drop "? true : false" in the definition of amdgpu_in_reset
Am 20.08.20 um 09:52 schrieb Furquan Shaikh:
In `amdgpu_dm_update_backlight_caps()`, there is a local
`amdgpu_dm_backlight_caps` object that is filled in by
`amdgpu_acpi_get_backlight_caps()`. However, this object is
uninitialized before the call and hence the subsequent check for
aux_support
Yes, that is perfectly valid. Same thing for multiple timeouts from
different queues.
Christian.
Am 20.08.20 um 10:40 schrieb Li, Dennis:
[AMD Public Use]
Hi, Hawking,
When RAS uncorrectable error happens, RAS interrupt will trigger a GPU
recovery. At the same time, if a GFX or
Am 20.08.20 um 07:27 schrieb Shashank Sharma:
This patch adds a new trace event to track the PTE update
events. This specific event will provide information like:
- start and end of virtual memory mapping
- HW engine flags for the map
- physical address for mapping
This will be particularly
Am 20.08.20 um 04:49 schrieb Dennis Li:
Using dev_xxx instead of DRM_xxx/pr_xxx to indicate which device
of a hive is the message for.
Signed-off-by: Dennis Li
Reviewed-by: Christian König
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
It's better to use inline function to wrap the iommu checking.
v2: rename the function and use another input.
Signed-off-by: Huang Rui
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 2 +-
drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c| 4 ++--
[AMD Public Use]
Hi, Hawking,
When RAS uncorrectable error happens, RAS interrupt will trigger a GPU
recovery. At the same time, if a GFX or compute job is timeout, driver will
trigger a new one.
Best Regards
Dennis Li
-Original Message-
From: Zhang, Hawking
Sent: Thursday,
We still have a few iommu issues which need to address, so force raven
as "dgpu" path for the moment.
This is to add the fallback path to bypass IOMMU if IOMMU v2 is disabled
or ACPI CRAT table not correct.
v2: Use ignore_crat parameter to decide whether it will go with IOMMUv2.
v3: Align with
[AMD Public Use]
Hi Dennis,
Can you elaborate the case that driver re-enter GPU recovery in sGPU system?
I'm wondering whether this is a valid case or we shall prevent this from the
beginning.
Regards,
Hawking
-Original Message-
From: Dennis Li
Sent: Thursday, August 20, 2020 10:21
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Dennis Li
Sent: Thursday, August 20, 2020 10:49
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
; Kuehling, Felix ; Zhang,
Hawking ; Koenig, Christian
Cc: Li, Dennis
Subject: [PATCH]
Am 20.08.20 um 07:26 schrieb Furquan Shaikh:
In `amdgpu_dm_update_backlight_caps()`, there is a local
`amdgpu_dm_backlight_caps` object that is filled in by
`amdgpu_acpi_get_backlight_caps()`. However, this object is
uninitialized before the call and hence the subsequent check for
aux_support
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