[AMD Official Use Only - Internal Distribution Only]
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-Original Message-
From: Quan, Evan
Sent: Tuesday, August 25, 2020 3:49 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH 2/4] drm/amd/pm: drop unnecessary smu_baco->mutex lock
[AMD Official Use Only - Internal Distribution Only]
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-Original Message-
From: Quan, Evan
Sent: Tuesday, August 25, 2020 3:49 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH 1/4] drm/amd/pm: drop unnecessary feature->mutex lock
Am 2020-08-26 um 4:01 p.m. schrieb Mukul Joshi:
> Add support for reporting GPU reset events through SMI. KFD
> would report both pre and post GPU reset events.
>
> Signed-off-by: Mukul Joshi
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_device.c | 4 +++
> drivers/gpu/drm/amd/amdkfd/kfd_priv.h
Optimize code to iterate less loops in
amdgpu_device_ip_reinit_early_sriov()
Signed-off-by: Jiawei
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
[AMD Official Use Only - Internal Distribution Only]
Hi, Andrey,
I found that the sequences of amdgpu_pci_slot_reset is mostly similar to
amdgpu_do_asic_reset. Could help us refactor them to reuse more codes?
Best Regards
Dennis Li
-Original Message-
From: amd-gfx On Behalf Of
Hi Dave, Daniel,
Fixes for 5.9.
The following changes since commit d012a7190fc1fd72ed48911e77ca97ba4521bccd:
Linux 5.9-rc2 (2020-08-23 14:08:43 -0700)
are available in the Git repository at:
git://people.freedesktop.org/~agd5f/linux tags/amd-drm-fixes-5.9-2020-08-26
for you to fetch
[AMD Official Use Only - Internal Distribution Only]
Sorry I missed that. Thanks for pointing it out.
I will send out an updated patch.
Thanks,
Mukul
From: Nils Wallménius
Sent: Wednesday, August 26, 2020 4:30 AM
To: Joshi, Mukul
Cc: amd-gfx@lists.freedesktop.org; Kuehling, Felix
Subject:
Add support for reporting GPU reset events through SMI. KFD
would report both pre and post GPU reset events.
Signed-off-by: Mukul Joshi
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 4 +++
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 2 ++
drivers/gpu/drm/amd/amdkfd/kfd_smi_events.c | 30
On 8/26/20 4:46 PM, Andrey Grodzovsky wrote:
At this point the ASIC is already post reset by the HW/PSP
so the HW not in proper state to be configured for suspension,
some bloks might be even gated and so best is to avoid touching it.
Signed-off-by: Andrey Grodzovsky
---
On Wed, Aug 26, 2020 at 11:31 AM Andrey Grodzovsky
wrote:
>
>
> On 8/26/20 11:20 AM, Alex Deucher wrote:
> > On Wed, Aug 26, 2020 at 10:46 AM Andrey Grodzovsky
> > wrote:
> >> DPC recovery after prev. DPC recovery or after prev. MODE1 reset fails
> >> unles you save the cashe the saved PCI
On 8/26/20 11:20 AM, Alex Deucher wrote:
On Wed, Aug 26, 2020 at 10:46 AM Andrey Grodzovsky
wrote:
DPC recovery after prev. DPC recovery or after prev. MODE1 reset fails
unles you save the cashe the saved PCI confspace to load it after
each new reset.
Also use same cached state for other use
On Wed, Aug 26, 2020 at 10:46 AM Andrey Grodzovsky
wrote:
>
> DPC recovery after prev. DPC recovery or after prev. MODE1 reset fails
> unles you save the cashe the saved PCI confspace to load it after
> each new reset.
> Also use same cached state for other use case of restoring PCI confspace
>
On Wed, Aug 26, 2020 at 10:46 AM Andrey Grodzovsky
wrote:
>
> Wait for HW/PSP initiated ASIC reset to complete before
> starting the recovery operations.
>
> Signed-off-by: Andrey Grodzovsky
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 --
> 1 file changed, 20
On Wed, Aug 26, 2020 at 10:46 AM Andrey Grodzovsky
wrote:
>
> At this point the ASIC is already post reset by the HW/PSP
> so the HW not in proper state to be configured for suspension,
> some bloks might be even gated and so best is to avoid touching it.
>
> Signed-off-by: Andrey Grodzovsky
>
On Wed, Aug 26, 2020 at 10:47 AM Andrey Grodzovsky
wrote:
>
> Add DPC handlers with basic recovery functionality.
>
> Signed-off-by: Andrey Grodzovsky
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 181
> -
Add DPC handlers with basic recovery functionality.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 181 -
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 9 +-
3 files changed, 196
DPC recovery after prev. DPC recovery or after prev. MODE1 reset fails
unles you save the cashe the saved PCI confspace to load it after
each new reset.
Also use same cached state for other use case of restoring PCI confspace
such as GPU mode1 or VGA switheroo.
Signed-off-by: Andrey Grodzovsky
Reuse exsisting functions from GPU recovery to avoid code
duplications.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 75 ++
1 file changed, 14 insertions(+), 61 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
XGMI support is more complicated then single device support as
questions of synchronization between the device recovering from
PCI error and other memebers of the hive is required.
Leaving this for next round.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5
DPC recovery involves ASIC reset just as normal GPU recovery so block
SW GPU shcedulers and wait on all concurent GPU resets.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 57 +++---
1 file changed, 53 insertions(+), 4 deletions(-)
At this point the ASIC is already post reset by the HW/PSP
so the HW not in proper state to be configured for suspension,
some bloks might be even gated and so best is to avoid touching it.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
Wait for HW/PSP initiated ASIC reset to complete before
starting the recovery operations.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git
Many PCI bus controllers are able to detect a variety of hardware PCI errors on
the bus,
such as parity errors on the data and address buses, A typical action taken is
to disconnect
the affected device, halting all I/O to it. Typically, a reconnection mechanism
is also offered,
so that the
Hi
[This is an automated email]
This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all
The bot has tested the following trees: v5.8.2, v5.7.16, v5.4.59, v4.19.140,
v4.14.193, v4.9.232, v4.4.232.
v5.8.2: Build
Hi
[This is an automated email]
This commit has been processed because it contains a -stable tag.
The stable tag indicates that it's relevant for the following trees: all
The bot has tested the following trees: v5.8.2, v5.7.16, v5.4.59, v4.19.140,
v4.14.193, v4.9.232, v4.4.232.
v5.8.2: Build
Applied. Thanks!
Alex
On Wed, Aug 26, 2020 at 9:37 AM Dinghao Liu wrote:
>
> When amdgpu_display_modeset_create_props() fails, state and
> state->context should be freed to prevent memleak. It's the
> same when amdgpu_dm_audio_init() fails.
>
> Signed-off-by: Dinghao Liu
> ---
>
When amdgpu_display_modeset_create_props() fails, state and
state->context should be freed to prevent memleak. It's the
same when amdgpu_dm_audio_init() fails.
Signed-off-by: Dinghao Liu
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 --
1 file changed, 8 insertions(+), 2
[AMD Official Use Only - Internal Distribution Only]
Acked-by: Alex Deucher
From: Quan, Evan
Sent: Wednesday, August 26, 2020 3:45 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH] drm/amd/pm: avoid false alarm due to
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Alex Deucher
From: Quan, Evan
Sent: Tuesday, August 25, 2020 11:32 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; dan.carpen...@oracle.com
; Quan, Evan
Subject: [PATCH]
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Evan Quan
-Original Message-
From: Jiansong Chen
Sent: Wednesday, August 26, 2020 3:59 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Quan, Evan ; Chen,
Jiansong (Simon)
Subject: [PATCH] drm/amdgpu: disable
[AMD Public Use]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Jiansong Chen
> Sent: Wednesday, August 26, 2020 3:59 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhou1, Tao ; Quan, Evan ;
> Chen, Jiansong (Simon)
> Subject: [PATCH] drm/amdgpu: disable runtime pm for navy_flounder
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 2020-08-26 10:24 a.m., Pekka Paalanen wrote:
> On Tue, 25 Aug 2020 12:58:19 -0400 "Kazlauskas, Nicholas"
> wrote:
>
>> On 2020-08-22 5:59 a.m., Michel Dänzer wrote:
>>> On 2020-08-21 8:07 p.m., Kazlauskas, Nicholas wrote:
On 2020-08-21 12:57
Hi, see inline comment below.
Den tis 25 aug. 2020 21:12Mukul Joshi skrev:
> Add support for reporting GPU reset events through SMI. KFD
> would report both pre and post GPU reset events.
>
> Signed-off-by: Mukul Joshi
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_device.c | 4 +++
>
On Tue, 25 Aug 2020 12:58:19 -0400
"Kazlauskas, Nicholas" wrote:
> On 2020-08-22 5:59 a.m., Michel Dänzer wrote:
> > On 2020-08-21 8:07 p.m., Kazlauskas, Nicholas wrote:
> >> On 2020-08-21 12:57 p.m., Michel Dänzer wrote:
> >>> From: Michel Dänzer
> >>>
> >>> Don't check
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Dennis Li
-Original Message-
From: Chen, Guchun
Sent: Wednesday, August 26, 2020 3:53 PM
To: amd-gfx@lists.freedesktop.org; Zhang, Hawking ; Li,
Dennis ; Zhou1, Tao
Cc: Chen, Guchun
Subject: [PATCH] drm/amdgpu:
Disable runtime pm for navy_flounder temporarily.
Signed-off-by: Jiansong Chen
Change-Id: Ie1b03f09ab70e79b6dd67ede5547afa23c063eee
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
Arcturus GFX has 8 SEs and 16 CUs per SE, so when resetting EDC
related register, all CUs needs to be visited, otherwise, garbage
data from EDC regisger of missed SEs would present.
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4.c | 8
1 file changed, 4
Normally softwareshutdowntemp should be greater than Thotspotlimit.
However, on some VEGA10 ASIC, the softwareshutdowntemp is 91C while
Thotspotlimit is 105C. This seems not right and may trigger some
false alarms.
Change-Id: I940cc6e450eebccd93ccdc3428187f6b7c09dcda
Signed-off-by: Evan Quan
---
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