For DCC we will use 2/3 planes to avoid X rendering to the frontbuffer
with DCC compressed images. To make this work with the core KMS
validation we need to add extra formats with the extra planes.
However, due to flexibility we set bpp = 0 for the extra planes and
do the validation ourselves.
This sets the DC tiling options from the modifier, if modifiers
are used for the FB. This patch by itself does not expose the
support yet though.
There is not much validation yet to limit the scope of this
patch, but the current validation is at the same level as
the BO metadata path.
v2: Add
This moves the tiling_flags to the framebuffer creation.
This way the time of the "tiling" decision is the same as it
would be with modifiers.
Signed-off-by: Bas Nieuwenhuizen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 48 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 3
This adds modifiers for GFX9+ AMD GPUs.
As the modifiers need a lot of parameters I split things out in
getters and setters.
- Advantage: simplifies the code a lot
- Disadvantage: Makes it harder to check that you're setting all
the required fields.
The tiling modes seem to
Prepare for inserting modifiers based configuration, while sharing
a bunch of DCC validation & initializing the device-based configuration.
Signed-off-by: Bas Nieuwenhuizen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 211 ++
1 file changed, 116 insertions(+), 95
With modifiers I'd like to support non-dedicated buffers for
images.
Signed-off-by: Bas Nieuwenhuizen
Cc: sta...@vger.kernel.org
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git
Silently accepting it could result in corruption.
Signed-off-by: Bas Nieuwenhuizen
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
This way the modifier path gets exercised all the time, improving
testing. Furthermore, for modifiers this is required as getfb2
will always return the modifier if the driver sets allow_fb_modifiers.
This only triggers once allow_fb_modifiers is set.
Signed-off-by: Bas Nieuwenhuizen
---
We're unconditionally using modifiers internally for GFX9+ now.
Signed-off-by: Bas Nieuwenhuizen
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 74 ++-
1 file changed, 7 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
This expose modifier support on GFX9+.
Only modifiers that can be rendered on the current GPU are
added. This is to reduce the number of modifiers exposed.
The HW could expose more, but the best mechanism to decide
what to expose without an explosion in modifiers is still
to be decided, and in
Otherwise the field ends up being used uninitialized when
enabling modifiers, failing validation with high likelyhood.
Signed-off-by: Bas Nieuwenhuizen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This adds modifier support to radeonsi.
It has been tested on
- VEGA10, RAVEN, NAVI14
- weston, sway, X with xf86-video-amdgpu (i.e. legacy path still works)
and includes some basic testing of the layout code.
The main goal is to keep it somewhat simple and regression free, so
on the display
[AMD Official Use Only - Internal Distribution Only]
Please ignore patches 5 & 6. We'll run into EEXIST if future non xgmi
counters are added to amdgpu_x this way.
> -Original Message-
> From: Kim, Jonathan
> Sent: Thursday, September 3, 2020 12:22 PM
> To:
From: Michel Dänzer
Don't check drm_crtc_state::active for this either, per its
documentation in include/drm/drm_crtc.h:
* Hence drivers must not consult @active in their various
* _mode_config_funcs.atomic_check callback to reject an atomic
* commit.
atomic_remove_fb disables the CRTC as
If dc reported by gpio is supported, the power source switching will
be performed by pmfw automatically. Thus the power source setting
workaround for Navi1x will be not needed.
Change-Id: Idd6231ce1e33a4e292e7eff3b0f8b779911944f1
Signed-off-by: Evan Quan
---
Since that should be the correct place to put ASIC specific
workarounds.
Change-Id: Ia7cf4bfabf85a4409e57542926238c7e196af719
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 14 -
.../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 20 ++-
2
Process any pending interrupt that occured before driver register
for interrupt from GPIO/SMU.
Change-Id: Ie846304408df27c7a7f2b29cec8f7dcb9d08905e
Signed-off-by: Evan Quan
---
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c| 40 ++-
1 file changed, 30 insertions(+), 10
Update the UMD stable Pstate settings with correct clocks.
Change-Id: Ia14eb8e23c513cad0bd633fbeb99ed694c7e3f7e
Signed-off-by: Evan Quan
---
.../gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 52 ++-
.../gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.h | 1 +
2 files changed, 52
SMU FCLK,SOCCLK have dependency on VCN CLKs. Lower VCN values so that
FCLK, SOCCLK reflect values set by UMD Stable Pstate.
Change-Id: Iddf2757be18aacc0bb66122dd2b690e58503223b
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 4 ++--
On 9/3/20 11:11 PM, Rohit Khaire wrote:
Please add commit message here.
Signed-off-by: Rohit Khaire
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 49 --
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 64 +++-
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 42
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