[AMD Official Use Only - Internal Distribution Only]
From: amd-gfx on behalf of Likun Gao
Sent: Thursday, October 15, 2020 12:03 PM
To: amd-gfx@lists.freedesktop.org
Cc: Gao, Likun
Subject: [PATCH] drm/amdgpu: add function to program pbb mode for sienna
From: Likun Gao
Add function for sienna_cichlid to force PBB workload mode to zero by
checking whether there have SE been harvested.
Signed-off-by: Likun Gao
Change-Id: I3bf2fe0b976affe26c829ac67bee176018f13fe9
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 62 ++
1 file
remove duplicate gfxhub v1.1 function set.
put function of gfxhub_v1_1_get_xgmi_info to gfxhub v1_0 function set.
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.c | 13 +
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_1.h
From: Likun Gao
Update golden setting for sienna_cichlid.
Signed-off-by: Likun Gao
Change-Id: I9a1ad84c22748fc100a3327487c6287e237df490
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
[AMD Public Use]
Acked-by: Alex Deucher
From: amd-gfx on behalf of Jiansong
Chen
Sent: Wednesday, October 14, 2020 10:46 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chen, Jiansong (Simon) ; Zhou1, Tao
; Zhang, Hawking
Subject: [PATCH] Revert "drm/amdgpu:
In functions vegam_is_dpm_running & vegam_populate_avfs_parameters,
maybe there is no need to conver bool condition to bool variable
or bool return value.
This change is to make the code a bit more readable.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c | 7
This reverts commit 7e59138e97574e8dbecd1f259581277fff555d00.
TDR issue has been resovled by pmfw update.
Change-Id: Ia04709c4ba13835abfdec56558738bf6fbfac20d
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
On Wed, Oct 14, 2020 at 5:18 PM wrote:
>
> From: Tom Rix
>
> Representative checkpatch.pl warning
>
> WARNING: adding a line without newline at end of file
> 30: FILE: drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h:30:
> +#endif
>
> Signed-off-by: Tom Rix
Applied. Thanks!
Alex
> ---
>
On Wed, Oct 14, 2020 at 7:59 PM Huang Rui wrote:
>
> This patch fixes the gfx hang while use firmware direct loading mode.
>
> Signed-off-by: Huang Rui
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 20
> 1 file changed, 20 insertions(+)
>
> diff
On Wed, Oct 14, 2020 at 9:05 PM Quan, Evan wrote:
>
> [AMD Official Use Only - Internal Distribution Only]
>
> Hi Alex,
>
> It was intended to align with other ASICs. The output for this on Arcturus is:
> 0: 8.0GT/s, x16 618Mhz *
> Is not that OK?
Nevermind, I missed the *. I got mixed up
[AMD Official Use Only - Internal Distribution Only]
Hi Alex,
It was intended to align with other ASICs. The output for this on Arcturus is:
0: 8.0GT/s, x16 618Mhz *
Is not that OK?
BR
Evan
-Original Message-
From: Alex Deucher
Sent: Wednesday, October 14, 2020 9:18 PM
To: Quan, Evan
This patch fixes the gfx hang while use firmware direct loading mode.
Signed-off-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
From: Tom Rix
Representative checkpatch.pl warning
WARNING: adding a line without newline at end of file
30: FILE: drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.h:30:
+#endif
Signed-off-by: Tom Rix
---
drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_4_1_sh_mask.h | 2 +-
On 2020-10-13 13:08, Christian König wrote:
> Merge the functionality mostly into amdgpu_vm_bo_update_mapping.
>
> This way we can even handle small contiguous system pages without
> to much extra CPU overhead.
>
> Large contiguous allocations (1GB) still improve from 1.2 to 0.3 seconds.
>
>
On Wed, Oct 14, 2020 at 3:18 AM Evan Quan wrote:
>
> Disable/enable the GPO feature on UMD pstate entering/exiting.
>
> Change-Id: I4bd4b560b945227044df918c9066ffbbc17728ca
> Signed-off-by: Evan Quan
Series is:
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h |
Hi Dave, Daniel,
Fixes for 5.10.
The following changes since commit 9c27bc97aff8bbe62b5b29ebf528291dd85d9c86:
drm/amdgpu: Fix invalid number of character '{' in amdgpu_acpi_init
(2020-10-09 15:16:10 -0400)
are available in the Git repository at:
git://people.freedesktop.org/~agd5f/linux
On 10/14/20 10:55 AM, Alex Deucher wrote:
> Fix this to avoid build problems if DRM_AMD_DC_DCN3_02 is defined, but
> DRM_AMD_DC_DCN3_01 is not.
>
> Fixes: 36d26912e8d854 ("drm/amd/display: Add support for DCN302 (v2)")
> Reported-by: Randy Dunlap
> Signed-off-by: Alex Deucher
Acked-by: Randy
Acked-by: Nirmoy Das
On 10/14/20 7:55 PM, Alex Deucher wrote:
Fix this to avoid build problems if DRM_AMD_DC_DCN3_02 is defined, but
DRM_AMD_DC_DCN3_01 is not.
Fixes: 36d26912e8d854 ("drm/amd/display: Add support for DCN302 (v2)")
Reported-by: Randy Dunlap
Signed-off-by: Alex Deucher
---
Fix this to avoid build problems if DRM_AMD_DC_DCN3_02 is defined, but
DRM_AMD_DC_DCN3_01 is not.
Fixes: 36d26912e8d854 ("drm/amd/display: Add support for DCN302 (v2)")
Reported-by: Randy Dunlap
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/Kconfig | 1 +
1 file changed, 1
This fixes regression on device unplug and/or driver unload.
[ 65.681501 <0.04>] BUG: kernel NULL pointer dereference, address:
0008
[ 65.681504 <0.03>] #PF: supervisor write access in kernel mode
[ 65.681506 <0.02>] #PF: error_code(0x0002) - not-present
On connector destruction call drm_dp_mst_topology_mgr_destroy
to release resources allocated in drm_dp_mst_topology_mgr_init.
Do it only if MST manager was initialized before otherwsie a crash
is seen on driver unload/device unplug.
Signed-off-by: Andrey Grodzovsky
---
Please ignore this patch, it didn't workaround the fw bug.
Regards,
Nirmoy
On 10/14/20 3:52 PM, Nirmoy Das wrote:
Because of firmware bug, Raven asics can't handle jobs
scheduled to multiple compute queues. So enable only one
compute queue till we have a firmware fix.
Signed-off-by: Nirmoy
Am 14.10.20 um 17:06 schrieb Chauhan, Madhav:
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Wednesday, October 14, 2020 2:06 PM
To: Chauhan, Madhav ; amd-gfx@lists.freedesktop.org
Cc: Pan, Xinhui
Subject: Re: [PATCH 1/2] drm/amdgpu: increase the reserved VM size to
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Wednesday, October 14, 2020 2:06 PM
To: Chauhan, Madhav ; amd-gfx@lists.freedesktop.org
Cc: Pan, Xinhui
Subject: Re: [PATCH 1/2] drm/amdgpu: increase the reserved VM size to 2MB
Am 14.10.20 um 10:26 schrieb Chauhan,
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Kent Russell
Sent: Wednesday, October 14, 2020 7:51 AM
To: amd-gfx@lists.freedesktop.org
Cc: Russell, Kent
Subject: [PATCH] drm/amdkfd: Use kvfree in
Check validity of drm_gpu_scheduler before setting hw priority.
Also fix a minor indentation issue.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
Because of firmware bug, Raven asics can't handle jobs
scheduled to multiple compute queues. So enable only one
compute queue till we have a firmware fix.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 11 ++-
2
On 2020-10-14 9:20 a.m., Kazlauskas, Nicholas wrote:
On 2020-10-14 3:04 a.m., Yifan Zhang wrote:
Change-Id: I831a5ade8b87c23d21a63d08cc4d338468769e2b
Signed-off-by: Yifan Zhang
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 61 +++
1 file changed, 61 insertions(+)
diff
On 2020-10-14 3:04 a.m., Yifan Zhang wrote:
Change-Id: I831a5ade8b87c23d21a63d08cc4d338468769e2b
Signed-off-by: Yifan Zhang
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 61 +++
1 file changed, 61 insertions(+)
diff --git
On Wed, Oct 14, 2020 at 1:20 AM Evan Quan wrote:
>
> As for other clock domains.
>
> Change-Id: I0a78c133f00cd11133bc755bf0443505088f024c
> Signed-off-by: Evan Quan
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h| 1 +
>
On Wed, Oct 14, 2020 at 1:21 AM Evan Quan wrote:
>
> Populate current link speed, width and clock domain frequency.
>
> Change-Id: Ic342fbd8f5e2495d212eaa4b85b4e146838e0525
> Signed-off-by: Evan Quan
> ---
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 3 ---
>
Now that we use kvmalloc for the crat_image, we need to use kvfree when
we destroy this.
Fixes: a522a06f8044 ("drm/amdkfd: Use kvmalloc instead of kmalloc for VCRAT")
Reported-by: Morris Zhang
Signed-off-by: Kent Russell
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 2 +-
1 file changed, 1
[AMD Public Use]
Thanks for the clarifying, Dennis. So this is kind of race condition between
normal GPU reset and ras GPU reset. I 'm fine with the change. The patch is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Li, Dennis
Sent: Wednesday, October 14,
[AMD Public Use]
Hi, Hawking,
Driver has multi-path into GPU reset, so driver couldn't guarantee that
bad record update has been done before GPU reset.
Best Regards
Dennis Li
-Original Message-
From: Zhang, Hawking
Sent: Wednesday, October 14, 2020 5:52 PM
To: Li, Dennis ;
[AMD Public Use]
Hmm, I think bad page record update is done ahead of scheduling gpu reset work.
For mGPU case, shall we walk through all the nodes in a hive before issue gpu
reset work?
Regards,
Hawking
-Original Message-
From: Dennis Li
Sent: Wednesday, October 14, 2020 17:41
To:
because i2c is unstable in GPU reset, driver need protect
eeprom update from GPU reset, to not miss any bad page record.
Signed-off-by: Dennis Li
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 0e64c39a2372..695bcfc5c983 100644
Am 14.10.20 um 10:26 schrieb Chauhan, Madhav:
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Tuesday, October 13, 2020 10:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chauhan, Madhav ; Pan, Xinhui
Subject: [PATCH 1/2] drm/amdgpu: increase the reserved VM size to 2MB
[AMD Public Use]
-Original Message-
From: Christian König
Sent: Tuesday, October 13, 2020 10:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chauhan, Madhav ; Pan, Xinhui
Subject: [PATCH 1/2] drm/amdgpu: increase the reserved VM size to 2MB
Ideally this should be a multiple of the VM
Support NAVI10 ASPM setting.
Change-Id: I0c9410951e23b1d4a30bf8e373431dcb16a4573b
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h | 2 ++
drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 39
2 files changed, 41 insertions(+)
diff --git
Fulfill Navi gfx and pcie settings on umd pstate switching.
V2: temporarily skip the pcie ASPM setting considering the ASPM function
is not fully enabled yet
Change-Id: I8d746d4c25f890665feeffddf64164ed2b1f5ccc
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/amdgpu/nv.c | 24
Enable Navi1X MGCG perfmon setting.
Change-Id: Ifc860a798becbe372f974f7eb537a4a57ac4943f
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 16
2 files changed, 17 insertions(+)
diff --git
Disable/enable the GPO feature on UMD pstate entering/exiting.
Change-Id: I4bd4b560b945227044df918c9066ffbbc17728ca
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 1 +
drivers/gpu/drm/amd/pm/inc/smu_types.h| 1 +
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
For entering UMD stable Pstate, the operations to enter rlc_safe
mode, disable mgcg_perfmon and disable PCIE aspm are needed. And
the opposite operations should be performed on UMD stable Pstate
exiting.
V2: take those ASICs(CI/SI/VI) which may not support this into
consideration
Change-Id:
Change-Id: I382a5eac1002a6cb80500c0e593cba95e2da
Signed-off-by: Yifan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index
Change-Id: I831a5ade8b87c23d21a63d08cc4d338468769e2b
Signed-off-by: Yifan Zhang
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 61 +++
1 file changed, 61 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
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