This is needed for Sienna Cichlid.
Change-Id: I57aa099cd1b2020cf0c8b05d8463239ec33790cf
Signed-off-by: Evan Quan
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 75 ++-
1 file changed, 39 insertions(+), 36 deletions(-)
diff --git
This is needed for Sienna Cichlid.
Change-Id: I205190978743ec3e5176d051fba2c742e7769821
Signed-off-by: Evan Quan
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 125 +-
1 file changed, 65 insertions(+), 60 deletions(-)
diff --git
This allows BAR0 resizing to be done for cards which don't advertise support
for a size large enough to cover the VRAM but which do advertise at least
one size larger than the default. For example, my RX 5600 XT, which
advertises 256MB, 512MB and 1GB.
Signed-off-by: Darren Salt
---
Hi Dave, Daniel,
Fixes for 5.11.
The following changes since commit beaff108e1bf1e38c9def60dd09f7a4ed7910481:
drm/amd/powerplay: fix spelling mistake "smu_state_memroy_block" ->
"smu_state_memory_block" (2020-11-24 12:09:54 -0500)
are available in the Git repository at:
On 09/12/20 11:00 pm, Alex Deucher wrote:
> On Fri, Dec 4, 2020 at 3:41 PM Alex Deucher wrote:
>> And drop it when we detach. If the shared buffer is in vram,
>> we need to make sure we don't put the device into runtime
>> suspend.
>>
>> Signed-off-by: Alex Deucher
>
> Ping? Any thoughts on
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Evan Quan
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Thursday, December 10, 2020 12:01 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: remove leftover
The function was removed, but the declaration was leftover
leading to a warning.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
Hi Dave, Daniel,
Fixes for 5.10.
The following changes since commit 0477e92881850d44910a7e94fc2c46f96faa131f:
Linux 5.10-rc7 (2020-12-06 14:25:12 -0800)
are available in the Git repository at:
git://people.freedesktop.org/~agd5f/linux tags/amd-drm-fixes-5.10-2020-12-09
for you to fetch
[Why]
Inorder to enable freesync video mode, driver adds extra
modes based on preferred modes for common freesync frame rates.
When commiting these mode changes, a full modeset is not needed.
If the change in only in the front porch timing value, skip full
modeset and continue using the same
[Why]
If experimental freesync video mode module parameter is enabled, add
few extra display modes into the driver's mode list corresponding to common
video frame rates. When userspace sets these modes, no modeset will be
performed (if current mode was one of freesync modes or the base freesync
This patchset enables freesync video mode usecase where the userspace
can request a freesync compatible video mode such that switching to this
mode does not trigger blanking.
This feature is guarded by a module parameter which is disabled by
default. Enabling this paramters adds additional modes
[Why]
Adds a module parameter to enable experimental freesync video mode modeset
optimization. Enabling this mode allows the driver to skip a full modeset when
freesync compatible modes are requested by the userspace. This paramters also
adds some standard modes based on the connected monitor's
Chen, Jiansong (Simon) would like to recall the message, "[PATCH 5/5]
drm/amd/pm: fulfill sienna cichlid 2nd usb2.0 port workaround".
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[AMD Official Use Only - Internal Distribution Only]
Hi Evan,
Besides Navi21, other Navi2x Asics reuse sienna_cichlid_ppt.c and the
callbacks, have you taken their user cases into consideration?
Thanks!
Regards,
Jiansong
-Original Message-
From: amd-gfx On Behalf Of Evan Quan
Sent:
[AMD Public Use]
Yeah, we discussed this issue again. We think it's better UMD make some changes
instead of changing in KMD. If FLR happened, it's OK for UMD create new context
and continue to submit jobs.
However, if BACO or mode 1 reset happens, of course UMD could also submit jobs,
but
This patch does not change current behaviour.
The driver's job timeout handler now returns
status indicating back to the DRM layer whether
the task (job) was successfully aborted or whether
more time should be given to the task to complete.
Default behaviour as of this patch, is preserved,
The driver's timeout handler now returns a value back up to DRM.
This patch doesn't change current behaviour. I request it'd be applied
so that Andrey G. can take advantage of the value sent back up to DRM
from the GPU driver.
I'm still working on the last patch which takes advantage of this
On the resize attempt failing with -EINVAL, instead report an informational
message indicating that the requested BAR size is not listed as supported by
the VBIOS.
Without this, as I have an RX 5600 XT which lists only 256MB, 512MB and
1024MB as supported, I see
Hi,
On Tue, Dec 01, 2020 at 11:35:35AM +0100, Thomas Zimmermann wrote:
> Using struct drm_device.pdev is deprecated. Convert nouveau to struct
> drm_device.dev. No functional changes.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Ben Skeggs
> ---
> drivers/gpu/drm/nouveau/dispnv04/arb.c |
On Fri, Dec 4, 2020 at 3:41 PM Alex Deucher wrote:
>
> And drop it when we detach. If the shared buffer is in vram,
> we need to make sure we don't put the device into runtime
> suspend.
>
> Signed-off-by: Alex Deucher
Ping? Any thoughts on this? We really only need this for p2p since
The number of crtc should be 0 for ASICs that don't
have display engine. Remove the unnecessary asic type
check then.
Signed-off-by: Hawking Zhang
Reviewed-by: Feifei Xu
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git
GUI_IDLE interrupts controlled by CP_INT_CNTL_RING0
are only applicable to me0 pipe0.
For ASICs that have gfx pipe removed, don't toggle
those bits.
Signed-off-by: Hawking Zhang
Reviewed-by: Feifei Xu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 9 -
1 file changed, 8 insertions(+), 1
Check number of gfx ring, rather than asic type,
before cp gfx engine initialization so driver just
need to make sure number of gfx ring is initialized
correctly in gfx early_init phase. No need to add
additional asic type check everywhere when there is
new asic with gfx pipe removed.
[AMD Public Use]
Reviewed-by: Alex Deucher
From: Quan, Evan
Sent: Wednesday, December 9, 2020 3:37 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH] drm/amd/pm: typo fix (CUSTOM -> COMPUTE)
The "COMPUTE" was wrongly
[AMD Official Use Only - Internal Distribution Only]
Acked-by: Alex Deucher
From: Quan, Evan
Sent: Wednesday, December 9, 2020 1:35 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Quan, Evan
Subject: [PATCH] drm/amd/pm: fulfill the sienna
[AMD Public Use]
Good catch. I guess we are just lucky that we always need to specify the mec to
0 in real use case.
The patch is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Jiansong Chen
Sent: Wednesday, December 9, 2020 19:59
To:
On Thu, Dec 3, 2020 at 10:31 PM Alex Deucher wrote:
>
> On Tue, Sep 29, 2020 at 4:04 PM Alex Deucher wrote:
> >
> > On Tue, Sep 29, 2020 at 8:31 AM Jan Kiszka wrote:
> > >
> > > On 10.09.20 20:18, Deucher, Alexander wrote:
> > > > [AMD Public Use]
> > > >
> > > >
> > > >
> > > >> -Original
On Wed, Dec 09, 2020 at 08:49:38PM +0800, Hou, Xiaomeng (Matthew) wrote:
> RLC is halted when system suspend/shutdown. However, due to DPM enabled, PMFW
> is
> unaware of RLC being halted and will continue sending messages, which would
> eventually cause an ACPI hang. Use the
[AMD Public Use]
Series is Reviewed-by: Lijo Lazar
-Original Message-
From: Hou, Xiaomeng (Matthew)
Sent: Wednesday, December 9, 2020 6:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Huang, Ray ; Lazar, Lijo ; Wang,
Kevin(Yang) ; Hou, Xiaomeng (Matthew)
Subject: [PATCH v2 2/2]
RLC is halted when system suspend/shutdown. However, due to DPM enabled, PMFW is
unaware of RLC being halted and will continue sending messages, which would
eventually cause an ACPI hang. Use the system_feature_control interface to
notify SMU the status of RLC thus enable/disable DPM feature.
Add new PMFW message to notify RLC engine status.
Signed-off-by: Xiaomeng Hou
Change-Id: I7d714f8f245835cacb25e7cc4b248ddf183aebc1
---
drivers/gpu/drm/amd/pm/inc/smu_types.h | 2 +-
drivers/gpu/drm/amd/pm/inc/smu_v11_5_ppsmc.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff
[AMD Public Use]
Nitpick - you may want to send the message only during enable workflow. Apart
from that,
Series is Reviewed-by: Lijo Lazar
-Original Message-
From: Quan, Evan
Sent: Wednesday, December 9, 2020 9:49 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Lazar,
Correct pipe offset calculation in is_pipe_enabled function,
it should be done in queues.
Signed-off-by: Jiansong Chen
Change-Id: I826aa532ca1e5073e3329212a8096f8f5a0be057
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Am 08.12.20 um 21:16 schrieb Andrey Grodzovsky:
For BOs imported from outside of amdgpu, setting of amdgpu_gem_object_funcs
was missing in amdgpu_dma_buf_create_obj. Fix by refactoring BO creation
and amdgpu_gem_object_funcs setting into single function called
from both code paths.
Fixes:
Am 09.12.20 um 10:46 schrieb Liu ChengZhe:
If CS init return -ECANCELED, UMD will free and create new context.
Job in this new context could conitnue exexcuting. In the case of
BACO or mode 1, we can't allow this happpen. Because VRAM has lost
after whole gpu reset, the job can't guarantee to
If CS init return -ECANCELED, UMD will free and create new context.
Job in this new context could conitnue exexcuting. In the case of
BACO or mode 1, we can't allow this happpen. Because VRAM has lost
after whole gpu reset, the job can't guarantee to succeed.
Signed-off-by: Liu ChengZhe
---
The "COMPUTE" was wrongly spelled as "CUSTOM".
Change-Id: I44a6c93ea8badec2af883eb5b39261789baba036
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
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