[PATCH 6/8] amdgpu/pm: Powerplay API for smu , changes to clock and profile mode functions

New Functions smu_bump_power_profile_mode() - changes profile mode assuming calling function already has mutex smu_force_ppclk_levels() - accepts Powerplay enum pp_clock_type to specify clock to change smu_print_ppclk_levels() - accepts Powerplay enum pp_clock_type to request

[PATCH 7/8] amdgpu/pm: Powerplay API for smu , changed 4 dpm functions to use API

New Functions smu_get_mclk- implementation of the Powerplay API function get_mclk smu_get_sclk- implementation of the Powerplay API function get_sclk smu_handle_dpm_task - implementation of the Powerplay API function dispatch_tasks Modified Functions

[PATCH 8/8] amdgpu/pm: Powerplay API for smu , updates to some pm functions

Modified Functions smu_sys_set_pp_table()- modifed signature to match Powerplay API set_pp_table smu_force_performance_level() - modifed arg0 to match Powerplay API force_performance_level smu_od_edit_dpm_table() - modifed arg0 to match Powerplay API odn_edit_dpm_table

[PATCH 5/8] amdgpu/pm: Powerplay API for smu , changed 5 dpm powergating & sensor functions to use API

New Functions smu_get_baco_capability() - Implement Powerplay API get_asic_baco_capability smu_baco_set_state() - Implement Powerplay API set_asic_baco_state Modified Functions smu_read_sensor() - modifed signature to match Powerplay API read_sensor Other Changes added 3 above smu

[PATCH 3/8] amdgpu/pm: Powerplay API for smu , changed 6 pm hwmon fan functions to use API

Modified Functions smu_set_fan_speed_rpm() - modifed arg0 to match Powerplay API set_fan_speed_rpm smu_get_fan_control_mode() - modifed signature to match Powerplay API get_fan_control_mode smu_set_fan_control_mode() - modifed signature to match Powerplay API set_fan_control_mode

[PATCH 4/8] amdgpu/pm: Powerplay API for smu , changed 9 pm power functions to use API

Modified Files smu_get_power_limit() - modifed arg0 to match Powerplay API get_power_limit smu_set_power_limit() - modifed arg0 to match Powerplay API set_power_limit smu_sys_get_pp_table()- modifed signature to match Powerplay API get_pp_table

[PATCH 2/8] amdgpu/pm: Powerplay API for smu , changed 6 dpm reset functions to use API

Modified Functions smu_set_xgmi_pstate() - modifed arg0 to match Powerplay API set_xgmi_pstate smu_mode2_reset() - modifed arg0 to match Powerplay API asic_reset_mode_2 smu_switch_power_profile() - modifed arg0 to match Powerplay API switch_power_profile

[PATCH 1/8] amdgpu/pm: Powerplay API for smu , added get_performance_level

Modified Functions smu_get_performance_level() - modifed arg0 to match Powerplay API get_performance_level Other Changes added a new structure swsmu_dpm_funcs to hold smu functions for Powerplay API removed special smu handling from amdgpu_get_power_dpm_force_performance_level

[PATCH 0/8] amdgpu/pm: Powerplay API for smu

=== Description === Patches to add the Powerplay API to smu and simplify dpm/pm calling code === Test System === * DESKTOP(AMD FX-8350 + NAVI10(731F/ca), BIOS: F2) + ISO(Ubuntu 20.04.1 LTS) + Kernel(5.9.0-rc5-custom-pmcallback-00865-gd3b9ec1a13c9) === Patch Summary === linux:

[PATCH 14/14] drm/amd/display: add getter routine to retrieve mpcc mux

From: Josip Pavic [Why & How] Add function to identify which MPCC is providing input to a specified OPP Signed-off-by: Josip Pavic Acked-by: Bindu Ramamurthy --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 12 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h | 1 +

[PATCH 13/14] drm/amd/display: always program DPPDTO unless not safe to lower

From: Jake Wang [Why] We defer clock updates to after pipes have been programmed. In some instances we use DPPCLK that have been previously set to be "unused". This results in a brief window of time where underflow could occur. [How] During prepare bandwidth allow

[PATCH 12/14] drm/amd/display: [FW Promotion] Release 0.0.47

From: Yongqiang Sun - restore lvtma_pwrseq_delay2 from vbios integrated info table - restore MVID/NVID after power up. - Enable timer wake up mask when enable timer interrupt. Signed-off-by: Yongqiang Sun Acked-by: Bindu Ramamurthy --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--

[PATCH 11/14] drm/amd/display: updated wm table for Renoir

From: Jake Wang [Why] For certain timings, Renoir may underflow due to sr exit latency being too slow. [How] Updated wm table for renoir. Signed-off-by: Jake Wang Acked-by: Bindu Ramamurthy --- .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c| 16 1 file changed, 8

[PATCH 09/14] drm/amd/display: Multi-display underflow observed

From: Aric Cyr [Why] FP2 programming not happening when topology changes occur with multiple displays. [How] Ensure FP2 is programmed whenever global sync changes occur but wait for VACTIVE first to avoid underflow. Signed-off-by: Aric Cyr Acked-by: Bindu Ramamurthy ---

[PATCH 10/14] drm/amd/display: Acquire DSC during split stream for ODM only if top_pipe

From: Sung Lee [WHY] DSC should only be acquired per OPP. Therefore, DSC should only be acquired for the top_pipe when ODM is enabled. Not doing this check may lead to acquiring more DSC's than needed when doing MPO + ODM Combine. [HOW] Only acquire DSC if pipe is top_pipe. Signed-off-by: Sung

[PATCH 06/14] drm/amd/display: change SMU repsonse timeout to 2s.

From: Yongqiang Sun [Why] there is some garbage showing up during reboot test. Reason: SMU might handle display driver msg defered and driver will send next msg to SMU after 10ms timeout, once SMU FW handle previous msg, parameters are changed to next one, which result in a wrong value be

[PATCH 08/14] drm/amd/display: Remove unnecessary NULL check

From: Eryk Brol [Why] new_crtc_state is already dereferenced earlier in the function [How] Remove the check Signed-off-by: Eryk Brol Acked-by: Bindu Ramamurthy --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 05/14] drm/amd/display: gradually ramp ABM intensity

From: Rizvi [Why] Need driver to pass values of backlight ramp start and ramp reduction so that intensity can be ramped down appropriately. [How] Using abm_parameters structure to get these values from driver. Signed-off-by: Rizvi Acked-by: Bindu Ramamurthy ---

[PATCH 03/14] drm/amd/display: Modify the hdcp device count check condition

From: Martin Tsai [why] Some MST display may not report the internal panel to DEVICE_COUNT, that makes the check condition always failed. [how] To update this condition with the reported device count + 1 (because the immediate repeater's internal panel is possibly not included in DEVICE_COUNT)

[PATCH 07/14] drm/amd/display: Update RN/VGH active display count workaround

From: Michael Strauss [WHY] Virtual signals were previously counted as a workaround to S0i2 hang which is fixed on Renoir. This blocks S0i3 diags testing. [HOW] Stop counting virtual signals as S0i2 hang is fixed on Renoir. Signed-off-by: Michael Strauss Acked-by: Bindu Ramamurthy ---

[PATCH 02/14] drm/amd/display: Interfaces for hubp blank and soft reset

From: Wesley Chalmers [WHY] HUBP blanking sequence on DCN30 requires us to check if HUBP is in blank and also toggle HUBP_DISABLE, which should instead be called HUBP_SOFT_RESET for what it does in HW. Signed-off-by: Wesley Chalmers Acked-by: Bindu Ramamurthy ---

[PATCH 04/14] drm/amd/display: To modify the condition in indicating branch device

From: Martin Tsai [why] The sink count change HPD_IRQ will be ignored if the branch device has only DP DFP. [how] To remove the port type restriction. Signed-off-by: Martin Tsai Acked-by: Bindu Ramamurthy --- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 8 +--- 1 file changed, 1

[PATCH 01/14] drm/amd/display: handler not correctly checked at remove_irq_handler

From: Qingqing Zhuo [why] handler is supposedly passed in as a function pointer; however, the entire struct amdgpu_dm_irq_handler_data gets from the list is used to check match. [how] use the interrupt_handler within amdgpu_dm_irq_handler_data for checking match. Signed-off-by: Qingqing Zhuo

[PATCH 00/14] DC Patches December 21, 2020

This DC patchset brings improvements in multiple areas. In summary, we highlight: * Ramp down ABM intensity. * Firmware version 0.0.47. * Updation of wm table for Renoir. * Extend smu response timeout,Interfaces for hubp blank and soft reset. Aric Cyr (1): drm/amd/display: Multi-display

[PATCH] drm/amd/display: Create and Destroy PSR resources for DCN302

From: Joshua Aberback We need these to support PSR on DCN302 Signed-off-by: Joshua Aberback Signed-off-by: Bhawanpreet Lakha --- .../gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 13 + 1 file changed, 13 insertions(+) diff --git

Re: [PATCH] drm/amdkfd: check both client id and src id in interrupt handlers

On Fri, Dec 18, 2020 at 4:54 PM Felix Kuehling wrote: > > Am 2020-12-18 um 4:34 p.m. schrieb Alex Deucher: > > We can have the same src ids for different client ids so make sure to > > check both the client id and the source id when handling interrupts. > > > > Signed-off-by: Alex Deucher > >

Re: [PATCH] drm/amdkfd: check both client id and src id in interrupt handlers

Am 2020-12-18 um 4:34 p.m. schrieb Alex Deucher: > We can have the same src ids for different client ids so make sure to > check both the client id and the source id when handling interrupts. > > Signed-off-by: Alex Deucher Looks reasonable to me. Does this fix a real problem, e.g. KFD

[PATCH] drm/amdkfd: check both client id and src id in interrupt handlers

We can have the same src ids for different client ids so make sure to check both the client id and the source id when handling interrupts. Signed-off-by: Alex Deucher --- .../gpu/drm/amd/amdkfd/kfd_int_process_v9.c | 46 ++- 1 file changed, 35 insertions(+), 11 deletions(-)

Re: [PATCH] drm/amdgpu: fix handling of irq domains on soc15 and newer GPUs

Am 18.12.20 um 17:53 schrieb Alex Deucher: We need to take into account the client id otherwise we'll end up sending generic events for any src id that is registered. We only support irq domains on pre-soc15 parts so client is always legacy. I've seen that multiple times as well but always

[PATCH] drm/amdgpu: fix handling of irq domains on soc15 and newer GPUs

We need to take into account the client id otherwise we'll end up sending generic events for any src id that is registered. We only support irq domains on pre-soc15 parts so client is always legacy. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 3 ++- 1 file

Re: [PATCH 2/2] drm/amd/display: enable idle optimizations for linux (MALL stutter)

[AMD Public Use] Hi Kenneth, The patches currently have the Kconfig so make sure to enable that first. And dc_allow_idle_optimizations() will be called when all the vblank irqs are off. On Ubuntu, this will happen after the desktop is idle for a few seconds. Bhawan

Re: [PATCH] drm/amdgpu: Fix a copy-pasta comment

Reviewed-by: Nirmoy Das On 12/18/20 5:20 PM, Alex Deucher wrote: This is not a scsi driver. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

[PATCH] drm/amdgpu: Fix a copy-pasta comment

This is not a scsi driver. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index f194fafa619d..e46646679281

[PATCH] drm/amdgpu: only set DP subconnector type on DP and eDP connectors

Fixes a crash in drm_object_property_set_value() because the property is not set for internal DP ports that connect to a bridge chips (e.g., DP to VGA or DP to LVDS). Bug: https://bugzilla.kernel.org/show_bug.cgi?id=210739 Fixes: 65bf2cf95d3ade ("drm/amdgpu: utilize subconnector property for DP

[PATCH v2 1/1] drm/amdgpu: cleanup vce,vcn,uvd ring selftests

Use amdgpu_sa_bo instead of amdgpu_bo. v2: * do not initialize bo to get hint from compiler for -Wuninitialized * pass NULL fence to amdgpu_sa_bo_free if fence is undefined. Signed-off-by: Nirmoy Das --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 56 +++--

Re: [PATCH v3 05/12] drm/ttm: Expose ttm_tt_unpopulate for driver use

On Thu, Dec 17, 2020 at 04:06:38PM -0500, Andrey Grodzovsky wrote: > > On 12/17/20 3:48 PM, Daniel Vetter wrote: > > On Thu, Dec 17, 2020 at 9:38 PM Andrey Grodzovsky > > wrote: > > > > > > On 12/17/20 3:10 PM, Christian König wrote: > > > > [SNIP] > > > > > > > By eliminating such users, and

Re: [PATCH 1/1] drm/amdgpu: cleanup vce,vcn,uvd ring selftests

Am 18.12.20 um 14:55 schrieb Nirmoy Das: Use amdgpu_sa_bo instead of amdgpu_bo. Signed-off-by: Nirmoy Das --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 56 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 17 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 47

[PATCH 1/1] drm/amdgpu: cleanup vce,vcn,uvd ring selftests

Use amdgpu_sa_bo instead of amdgpu_bo. Signed-off-by: Nirmoy Das --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 56 +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 17 drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 47 ++--- 3 files changed, 45

Re: [PATCH v2 1/1] drm/amdgpu: clean up bo in vce and vcn test

Hi Christian, On 12/17/20 3:25 PM, Christian König wrote: Am 08.12.20 um 20:39 schrieb Nirmoy: On 12/8/20 8:04 PM, Christian König wrote: Am 08.12.20 um 19:59 schrieb Nirmoy Das: BO created with amdgpu_bo_create_reserved() wasn't clean properly before, which causes: [   21.056218] WARNING: