Please review.
Thanks,
Marek
From 5a6cf97b9eb1791c6722362a60427a43a2130f10 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?=
Date: Thu, 4 Feb 2021 02:46:20 -0500
Subject: [PATCH] drm/amdgpu: fix CGTS_TCC_DISABLE register offset on gfx10.3
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On 2/5/21 5:10 PM, Daniel Vetter wrote:
On Fri, Feb 5, 2021 at 5:22 PM Andrey Grodzovsky
wrote:
Daniel, ping. Also, please refer to the other thread with Bjorn from pci-dev
on the same topic I added you to.
Summarizing my take over there for here plus maybe some more
clarification.
Thanks Alex,
Reviewed-by: Rodrigo Siqueira
On 02/03, Alex Deucher wrote:
> This reverts commit 4a3dea8932d3b1199680d2056dd91d31d94d70b7.
>
> This causes blank screens for some users.
>
> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1388
> Cc: Alvin Lee
> Cc: Jun Lei
> Cc: Rodrigo
[AMD Public Use]
Hi all,
This week this patchset was tested on a HP Envy 360, with Ryzen 5 4500U, on the
following display types (via usb-c to dp/dvi/hdmi/vga):
4k 60z, 1440p 144hz, 1680*1050 60hz, internal eDP 1080p 60hz
Tested on an AMD RX6800 on the following display types (via DP):
4k60
On Fri, Feb 5, 2021 at 5:22 PM Andrey Grodzovsky
wrote:
>
> Daniel, ping. Also, please refer to the other thread with Bjorn from pci-dev
> on the same topic I added you to.
Summarizing my take over there for here plus maybe some more
clarification. There's two problems:
- You must guarantee
From: Aric Cyr
This version brings along following fixes:
- Fix error handling in dc/dcn10/dcn10_hw_sequencer_debug.c
- DIO Supported for virtual displays
- memset dmub_rb_cmd to 0 which fixes issues talking with firmware
- fix 64bit division issue on 32bit OS
- move edp sink present detection
From: Eric Yang
[Why]
At SW init, we may not be ready to do detect eDP sink.
Signed-off-by: Eric Yang
Reviewed-by: Jun Lei
Acked-by: Anson Jacob
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 40 +---
drivers/gpu/drm/amd/display/dc/dc_link.h | 2 ++
2 files changed, 24
From: Anthony Koo
Add new definition and union for dmub_rb_cmd_dig1_transmitter_control
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Anson Jacob
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 29 ---
1 file changed, 25 insertions(+), 4 deletions(-)
From: Dale Zhao
It is possible for ret_vsnprintf to be assigned negative value in
error cases. As an unsigned variable, negative values which
are stored in their 2's complement form gets treated as a positive
number. This will led to treating bad cases as good ones.
eg: -1 gets stored as
From: Wesley Chalmers
[WHY]
Virtual displays do not use the backend of the pipe, and so have
infinite backend bandwidth.
[HOW]
Add a skip_dio_check bool to the VBA struct, which is used to override
the DIOSupport calculations.
Signed-off-by: Wesley Chalmers
Reviewed-by: Jun Lei
Acked-by:
From: Wyatt Wood
[Why]
Since dmub_rb_cmds are not initialized to 0,
the header is filled with invalid data.
This is causing issues on the fw side.
[How]
Initialize dmub_rb_cmd unions to 0.
Signed-off-by: Wyatt Wood
Reviewed-by: Josip Pavic
Acked-by: Anson Jacob
---
From: Qingqing Zhuo
[Why]
Current implementation of mod_hdcp_hdcp2_validate_ake_cert()
does not process HDCP status message
TA_HDCP2_MSG_AUTHENTICATION_STATUS__SIGNATURE_CERTIFICAT_ERROR.
As a result, when there is a signature certificate error,
mod_hdcp_hdcp2_validate_ake_cert would return the
From: Lang Yu
Replace "/" with div_u64 for 64bit division on 32bit OS.
Signed-off-by: Lang Yu
Reviewed-by: Nicholas Kazlauskas
Acked-by: Anson Jacob
Acked-by: Huang Rui
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 ++--
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
From: Derek Lai
[Why and How]
VBIOS program DIG_CLK_PATTERN using engine ID instead of PHY ID.
Workaround by writing value for 0x1f (for HDMI) after calling vbios.
Signed-off-by: Derek Lai
Reviewed-by: Tony Cheng
Acked-by: Anson Jacob
---
.../drm/amd/display/dc/dcn10/dcn10_link_encoder.c |
From: Jun Lei
revert commit 6777c3863cdacdce84347483015db10dcdd61607
"drm/amd/display: implement support for DID2.0 dsc passthrough"
3x4K60 displays over MST with DSC enabled was not able to light up
due to this patch.
Signed-off-by: Jun Lei
Reviewed-by: Anthony Koo
Acked-by: Anson Jacob
From: Fangzhi Zuo
Signed-off-by: Fangzhi Zuo
Reviewed-by: Mikita Lipski
Acked-by: Anson Jacob
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
This version brings along following fixes:
- Fix error handling in dc/dcn10/dcn10_hw_sequencer_debug.c
- DIO Supported for virtual displays
- memset dmub_rb_cmd to 0 which fixes issues talking with firmware
- fix 64bit division issue on 32bit OS
- move edp sink present
On Wed, Feb 3, 2021 at 7:42 AM Takashi Iwai wrote:
>
> The current code tries to read the brightness value via
> dc_link_get_backlight_level() no matter whether it's controlled via
> aux or not, and this results in a bogus value returned.
> Fix it to read the current value via
>
On Wed, Feb 3, 2021 at 7:42 AM Takashi Iwai wrote:
>
> There seem devices that don't work with the aux channel backlight
> control. For allowing such users to test with the other backlight
> control method, provide a new module option, aux_backlight, to specify
> enabling or disabling the aux
Daniel, ping. Also, please refer to the other thread with Bjorn from pci-dev
on the same topic I added you to.
Andrey
On 1/29/21 2:25 PM, Christian König wrote:
Am 29.01.21 um 18:35 schrieb Andrey Grodzovsky:
On 1/29/21 10:16 AM, Christian König wrote:
Am 28.01.21 um 18:23 schrieb Andrey
Once the device has runtime suspended, we don't need to power it
back up again for system suspend. Likewise for resume, we don't
to power up the device again on resume only to power it back off
again via runtime pm because it's still idle.
v2: add DPM_FLAG_SMART_PREPARE as well
Acked-by:
as per:
https://www.kernel.org/doc/html/latest/driver-api/pm/devices.html
The prepare callback is required to support the DPM_FLAG_SMART_SUSPEND
driver flag. This allows runtime pm to auto complete when the
system goes into suspend avoiding a wake up on suspend and on resume.
Apply this for
[AMD Official Use Only - Internal Distribution Only]
I think the virt team probably wants it in amd-staging-drm-next so they can
start testing it. 5.12 is getting pretty tight. I'm not sure if there will be
another drm-misc PR or not for 5.12. Rebasing amd-staging-drm-next is turning
into a
The alternative is to wait till drm-misc-next is merged into drm-next,
then rebase amd-staging-drm-next on top of that (or directly
drm-misc-next) and push then.
Would give us at least a clean history. Question is rather if we want it
in 5.12?
Christian.
Am 05.02.21 um 15:50 schrieb
[AMD Official Use Only - Internal Distribution Only]
Good question. I think push it to drm-misc-next for upstream. We can carry it
internally in amd-staging-drm-next for internal testing and I can coordinate
with drm-next. I think the amdgpu changes are pretty straightforward, so
shouldn't
Hi Kenny
On Wed, Feb 3, 2021 at 8:01 PM Kenny Ho wrote:
>
> Daniel,
>
> I will have to get back to you later on the details of this because my
> head is currently context switched to some infrastructure and
> Kubernetes/golang work, so I am having a hard time digesting what you
> are saying. I
[AMD Public Use]
Series is Reviewed-by: Lijo Lazar
-Original Message-
From: Hou, Xiaomeng (Matthew)
Sent: Friday, February 5, 2021 6:09 PM
To: amd-gfx@lists.freedesktop.org
Cc: Huang, Ray ; Lazar, Lijo ; Wang,
Kevin(Yang) ; Hou, Xiaomeng (Matthew)
Subject: [PATCH 2/2] drm/amd/pm:
The original smu_get_power_limit callback accepts the power limit level
parameter as bool which limits to max and current. For possible needs to
retrieve other level like min, extend the parameter type using enum.
Signed-off-by: Xiaomeng Hou
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c| 4
Implement hwmon API for reading/setting slow and fast PPT limit.
APU power is managed to system-level requirements through the PPT
(package power tracking) feature. PPT is intended to limit power to the
requirements of the power source and could be dynamically updated to
maximize APU performance
Alex how do we want to merge this?
I've just pushed the first patch to drm-misc-next since that needed a
rebase because it touches other drivers as well.
But the rest is really AMD specific and I'm not sure if the dependent
stuff is already in there as well.
So if I push it to
On Fri, Feb 5, 2021 at 5:33 AM Alex Deucher wrote:
>
> On Thu, Feb 4, 2021 at 6:52 PM Dave Airlie wrote:
> >
> > On Thu, 4 Feb 2021 at 14:57, Alex Deucher wrote:
> > >
> > > Hi Dave, Daniel,
> > >
> > > More fixes for 5.12. Same PR from last week with the issue Felix reported
> > > fixed and a
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