[Public]
Series is
Reviewed-by: Lijo Lazar
-Original Message-
From: Powell, Darren
Sent: Sunday, June 6, 2021 10:30 AM
To: amd-gfx@lists.freedesktop.org
Cc: Powell, Darren
Subject: [PATCH v3 0/6] Modify smu_get_power_limit to implement Powerplay API
=== Description ===
modify
Hi,
On Fri, Jun 04, 2021 at 07:17:21PM +0200, Werner Sembach wrote:
> Add a new general drm property "active bpc" which can be used by graphic
> drivers
> to report the applied bit depth per pixel back to userspace.
Just a heads up, we'll need an open source project that has accepted it
before
From: Colin Ian King
There are two spelling mistakes in dml_print messages, fix these and
clear up checkpatch warning on overly wide line length.
Signed-off-by: Colin Ian King
---
.../drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c | 10 ++
1 file changed, 6 insertions(+), 4
Clean up the following includecheck warning:
./drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c:
dce110_hw_sequencer.h is included more than once.
No functional change.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
Hi,
On Wed, May 12, 2021 at 02:06:56PM +0200, Werner Sembach wrote:
> Hello,
>
> In addition to the existing "max bpc", and "Broadcast RGB/output_csc"
> drm properties I propose 4 new properties: "preferred pixel encoding",
> "active color depth", "active color range", and "active pixel
>
Reviewed-by: Nirmoy Das
On 6/5/2021 4:51 PM, Christian König wrote:
For GTT allocations with a GART address the res contains the VMID0
addresses and can't be used for VM handling.
So ignore the res when the pages array is given or we fill the page
tables with nonsense.
Signed-off-by:
[AMD Official Use Only]
Reviewed-by: Emily Deng
>-Original Message-
>From: amd-gfx On Behalf Of Peng Ju
>Zhou
>Sent: Monday, June 7, 2021 1:55 PM
>To: amd-gfx@lists.freedesktop.org
>Subject: [PATCH] drm/amdgpu: Fixing "Indirect register access for Navi12 sriov"
>for vega10
>
>The NV12
[Public]
> -Original Message-
> From: Lazar, Lijo
> Sent: Monday, June 7, 2021 4:19 PM
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: RE: [PATCH V2 3/5] drm/amdgpu: correct the audio function initial
> Dstate
>
> [Public]
>
> Thanks, that
[Public]
Thanks, that explains.
You may modify the comment to something like " amdgpu_get_audio_func() makes a
PMFW-aware D-state transition to update audio dev's D-state in PMFW" (now it
gives the impression that function makes audio dev to stay in D0 state).
> > +* Via
[AMD Official Use Only]
Hi Alex
The following patch series were ported from amd-staging-dkms to fix VCN IB test
fail.
Can you help to review it?
[PATCH 1/2] drm/amd/amdgpu: Use IP discovery data to determine VCN enablement
instead of MMSCH
[PATCH 2/2] drm/amd/amdgpu: add instance_number check
[Public]
What about separating to smu_cmn_utils.c/smu_utils.c or similar which is meant
for software based common/util functions? In general, it will have sw based
common funcs (not ASIC specific) and may be used outside (for ex: in
amdgpu_smu.c). smu_cmn continues to have the hw based
[AMD Official Use Only]
Hi Lijo,
I got your concern. However, the problem is what amdgpu_smu.c can see is
SMU_FEATURE_x_BIT(e.g. SMU_FEATURE_BACO_BIT) related.
While the bit mask stored in feature->enabled is FEATURE_x_BIT(e.g.
FEATURE_BACO_BIT which is asic specific) related.
So, a
Why: Previously hw fence is alloced separately with job.
It caused historical lifetime issues and corner cases.
The ideal situation is to take fence to manage both job
and fence's lifetime, and simplify the design of gpu-scheduler.
How:
We propose to embed hw_fence into amdgpu_job.
1. We cover
[AMD Official Use Only]
> -Original Message-
> From: Lazar, Lijo
> Sent: Friday, June 4, 2021 8:24 PM
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: Re: [PATCH V2 3/5] drm/amdgpu: correct the audio function initial
> Dstate
>
>
>
> On 6/4/2021
Am 05.06.21 um 11:06 schrieb Christophe JAILLET:
s/than/then/
Signed-off-by: Christophe JAILLET
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
The NV12 and VEGA10 share the same interface W/RREG32_SOC15*,
the callback functions in these macros may not be defined,
so NULL pointer must be checked but not in
macro __WREG32_SOC15_RLC__, fixing the lock of NULL pointer check.
Signed-off-by: Peng Ju Zhou
---
Am 07.06.21 um 09:52 schrieb Pekka Paalanen:
On Fri, 4 Jun 2021 19:17:21 +0200
Werner Sembach wrote:
Add a new general drm property "active bpc" which can be used by graphic drivers
to report the applied bit depth per pixel back to userspace.
While "max bpc" can be used to change the color
Hi John,
As talked offline, the patch fine with apu at present.
Reviewed-by: Changfeng
BR,
Changfeng.
From: Clements, John
Sent: Monday, June 7, 2021 11:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Changfeng
Subject: [PATCH] drm/amdgpu: Update psp fw attestation support list
[AMD
Zhu, Changfeng would like to recall the message, "[PATCH] drm/amdgpu: Update
psp fw attestation support list".
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On Mon, 7 Jun 2021 09:48:05 +0200
Maxime Ripard wrote:
> I've started to implement this for the raspberrypi some time ago.
>
> https://github.com/raspberrypi/linux/pull/4201
>
> It's basically two properties: a bitmask of the available output pixel
> encoding to report both what the display
Am 07.06.21 um 09:40 schrieb Maxime Ripard:
Hi,
On Fri, Jun 04, 2021 at 07:17:21PM +0200, Werner Sembach wrote:
Add a new general drm property "active bpc" which can be used by graphic drivers
to report the applied bit depth per pixel back to userspace.
Just a heads up, we'll need an open
On Fri, 4 Jun 2021 19:17:21 +0200
Werner Sembach wrote:
> Add a new general drm property "active bpc" which can be used by graphic
> drivers
> to report the applied bit depth per pixel back to userspace.
>
> While "max bpc" can be used to change the color depth, there was no way to
> check
>
Zhu, Changfeng would like to recall the message, "[PATCH] drm/amdgpu: Update
psp fw attestation support list".
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Zhu, Changfeng would like to recall the message, "[PATCH] drm/amdgpu: Update
psp fw attestation support list".
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
if (adev->asic_type == CHIP_VANGOGH)
BR,
Changfeng.
From: amd-gfx On Behalf Of Zhu,
Changfeng
Sent: Monday, June 7, 2021 11:24 AM
To: Clements, John ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: Update psp fw attestation support list
Hi John,
I think it's better to
Hi John,
I think it's better to replace
if (adev->flags & AMD_IS_APU)
with
if (adev->asic_type >= CHIP_VANGOGH)
As you say, rembrandt should support this feature.
BR,
Changfeng.
From: Clements, John
Sent: Monday, June 7, 2021 11:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Changfeng
[AMD Official Use Only - Internal Distribution Only]
Submitting patch to disable PSP FW attestation support on APU
Thank you,
John Clements
0001-drm-amdgpu-Update-psp-fw-attestation-support-list.patch
Description: 0001-drm-amdgpu-Update-psp-fw-attestation-support-list.patch
remove no need variable, just return the DC_OK
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
s/than/then/
Signed-off-by: Christophe JAILLET
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 89ebbf363e27..1476236f5c7c 100644
---
Am 04.06.21 um 19:30 schrieb Ville Syrjälä:
On Fri, Jun 04, 2021 at 07:17:23PM +0200, Werner Sembach wrote:
This commits implements the "active bpc" drm property for the Intel GPU driver.
Signed-off-by: Werner Sembach
---
drivers/gpu/drm/i915/display/intel_display.c | 13 +
Am 04.06.21 um 19:26 schrieb Ville Syrjälä:
On Fri, Jun 04, 2021 at 07:17:21PM +0200, Werner Sembach wrote:
Add a new general drm property "active bpc" which can be used by graphic drivers
to report the applied bit depth per pixel back to userspace.
While "max bpc" can be used to change the
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