On 10/28/2021 22:08, Alex Deucher wrote:
On Thu, Oct 28, 2021 at 10:35 PM Huang Rui wrote:
On Thu, Oct 28, 2021 at 10:53:36AM -0500, Mario Limonciello wrote:
Although this has been plumbed for Renoir, Green Sardine, Van Gogh,
and Yellow Carp the functionality in the SMU doesn't do anything fo
On Thu, Oct 28, 2021 at 10:35 PM Huang Rui wrote:
>
> On Thu, Oct 28, 2021 at 10:53:36AM -0500, Mario Limonciello wrote:
> > Although this has been plumbed for Renoir, Green Sardine, Van Gogh,
> > and Yellow Carp the functionality in the SMU doesn't do anything for
>
> I double confirmed them in t
On Thu, Oct 28, 2021 at 10:53:36AM -0500, Mario Limonciello wrote:
> Although this has been plumbed for Renoir, Green Sardine, Van Gogh,
> and Yellow Carp the functionality in the SMU doesn't do anything for
I double confirmed them in the firmware. These messages are actually
existed in SMU firmwa
[AMD Official Use Only]
Sorry, Mario.
Please don't upstream.
We need to discuss whether to drop pp_power_profile_mode support for RN/VGH.
--
Best Regards
Aaron Liu
> -Original Message-
> From: amd-gfx On Behalf Of Liu,
> Aaron
> Sent: Friday, October 29, 2021 10:03 AM
> To: Limonciello
[AMD Official Use Only]
Reviewed-by: Aaron Liu
--
Best Regards
Aaron Liu
> -Original Message-
> From: amd-gfx On Behalf Of
> Mario Limonciello
> Sent: Thursday, October 28, 2021 11:54 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Limonciello, Mario
> Subject: [PATCH] drm/amdgpu/pm: dro
On 2021-10-27 3:58 p.m., Andrey Grodzovsky wrote:
On 2021-10-27 10:50 a.m., Christian König wrote:
Am 27.10.21 um 16:47 schrieb Andrey Grodzovsky:
On 2021-10-27 10:34 a.m., Christian König wrote:
Am 27.10.21 um 16:27 schrieb Andrey Grodzovsky:
[SNIP]
Let me please know if I am still mis
Although this has been plumbed for Renoir, Green Sardine, Van Gogh,
and Yellow Carp the functionality in the SMU doesn't do anything for
these APUs. Drop the associated code with them.
Signed-off-by: Mario Limonciello
---
.../gpu/drm/amd/pm/inc/smu_v13_0_1_ppsmc.h| 4 +-
.../gpu/drm/amd/pm
Am 2021-10-27 um 9:42 p.m. schrieb Alistair Popple:
> On Wednesday, 27 October 2021 3:09:57 AM AEDT Felix Kuehling wrote:
>> Am 2021-10-25 um 12:16 a.m. schrieb Alistair Popple:
>>> MIGRATE_PFN_LOCKED is used to indicate to migrate_vma_prepare() that a
>>> source page was already locked during migr
On Thu, Oct 28, 2021 at 11:19 AM Paul Menzel wrote:
>
> Dear Alex,
>
>
> On 28.10.21 16:21, Alex Deucher wrote:
> > The DMA mask on SI parts is 40 bits not 44. Copy
> > paste typo.
> >
> > Fixes: 244511f386ccb9 ("drm/amdgpu: simplify and cleanup setting the dma
> > mask")
>
> This was present in
Dear Alex,
On 28.10.21 16:21, Alex Deucher wrote:
The DMA mask on SI parts is 40 bits not 44. Copy
paste typo.
Fixes: 244511f386ccb9 ("drm/amdgpu: simplify and cleanup setting the dma mask")
This was present in Linux 5.4-rc1. Can it also be the cause of some of
the crashes with the AMD Ryz
On 2021-10-28 10:46 a.m., Alex Deucher wrote:
Ping
On Wed, Oct 27, 2021 at 6:40 PM Alex Deucher wrote:
Need to guard some things with CONFIG_DRM_AMD_DC_DCN.
Fixes: 0c865d1d817b77 ("drm/amd/display: fix link training regression for 1 or 2
lane")
Signed-off-by: Alex Deucher
Reviewed-by: Ni
On 2021-10-28 10:46 a.m., Alex Deucher wrote:
ping
On Wed, Oct 27, 2021 at 6:40 PM Alex Deucher wrote:
Need to guard some things with CONFIG_DRM_AMD_DC_DCN.
Fixes: 707021dc0e16f6 ("drm/amd/display: Enable dpia in dmub only for DCN31 B0")
Signed-off-by: Alex Deucher
Reviewed-by: Nicholas K
ping
On Wed, Oct 27, 2021 at 6:40 PM Alex Deucher wrote:
>
> Need to guard some things with CONFIG_DRM_AMD_DC_DCN.
>
> Fixes: 707021dc0e16f6 ("drm/amd/display: Enable dpia in dmub only for DCN31
> B0")
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2
Ping
On Wed, Oct 27, 2021 at 6:40 PM Alex Deucher wrote:
>
> Need to guard some things with CONFIG_DRM_AMD_DC_DCN.
>
> Fixes: 0c865d1d817b77 ("drm/amd/display: fix link training regression for 1
> or 2 lane")
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_link_dp.
On 2021-10-27 10:43 p.m., JingWen Chen wrote:
On 2021/10/28 上午3:43, Andrey Grodzovsky wrote:
On 2021-10-25 10:57 p.m., JingWen Chen wrote:
On 2021/10/25 下午11:18, Andrey Grodzovsky wrote:
On 2021-10-24 10:56 p.m., JingWen Chen wrote:
On 2021/10/23 上午4:41, Andrey Grodzovsky wrote:
What do yo
The DMA mask on SI parts is 40 bits not 44. Copy
paste typo.
Fixes: 244511f386ccb9 ("drm/amdgpu: simplify and cleanup setting the dma mask")
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1762
Acked-by: Christian König
Tested-by: Paul Menzel
Signed-off-by: Alex Deucher
---
drivers/gpu/d
On Thu, Oct 28, 2021 at 4:33 AM Paul Menzel wrote:
>
> Dear Alex,
>
>
> On 28.10.21 00:19, Paul Menzel wrote:
>
> > On 27.10.21 20:23, Alex Deucher wrote:
> >> On Wed, Oct 27, 2021 at 2:22 PM Alex Deucher
> >> wrote:
> >>>
> >>> The DMA mask on SI parts is 40 bits not 44. Looks like a copy
> >>>
Use dma_resv_wait() instead of extracting the exclusive fence and
waiting on it manually.
Signed-off-by: Christian König
---
drivers/infiniband/core/umem_dmabuf.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/infiniband/core/umem_dmabuf.c
b/drivers/infiniba
Returning the exclusive fence separately is no longer used.
Signed-off-by: Christian König
---
drivers/dma-buf/dma-resv.c | 43 +++-
drivers/dma-buf/st-dma-resv.c| 26 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 4 +-
drivers/gpu
Don't touch the exclusive fence manually here, but rather use the
general dma_resv function. We did that for better hw reset handling but
this doesn't necessary work correctly.
Signed-off-by: Christian König
---
drivers/gpu/drm/radeon/radeon_uvd.c | 13 +
1 file changed, 5 insertions
Just grab all fences for the display flip in one go.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +-
2 files changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/
Just grab all fences in one go.
Signed-off-by: Christian König
---
drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
b/drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c
index 8dc93863bf96..b5e
The i915 driver implements a prune function which is called when it is very
likely that the fences inside the dma_resv object can be removed because they
are all signaled.
Move that function into the dma-resv.c code since the behavior of pruning
fences is something internal to the object.
Signed-
Dear Alex,
On 28.10.21 10:32, Paul Menzel wrote:
On 28.10.21 00:19, Paul Menzel wrote:
On 27.10.21 20:23, Alex Deucher wrote:
On Wed, Oct 27, 2021 at 2:22 PM Alex Deucher wrote:
The DMA mask on SI parts is 40 bits not 44. Looks like a copy
paste typo.
Bug: https://gitlab.freedesktop.or
Dear Alex,
On 28.10.21 00:19, Paul Menzel wrote:
On 27.10.21 20:23, Alex Deucher wrote:
On Wed, Oct 27, 2021 at 2:22 PM Alex Deucher
wrote:
The DMA mask on SI parts is 40 bits not 44. Looks like a copy
paste typo.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1762
Fixed locally.
Am 27.10.21 um 20:22 schrieb Alex Deucher:
The DMA mask on SI parts is 40 bits not 44. Looks like a copy
paste typo.
Signed-off-by: Alex Deucher
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drive
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