On 11/17/2021 11:50 AM, Darren Powell wrote:
Use of sysfs_emit by each of the specific device implementations is
problematic.
To remove this back to a higher level, this patch adds a new function
"get_clock_levels"
to the power-management API (amd_pm_funcs) and smu powerplay API
Use of sysfs_emit by each of the specific device implementations is
problematic.
To remove this back to a higher level, this patch adds a new function
"get_clock_levels"
to the power-management API (amd_pm_funcs) and smu powerplay API
(pptable_funcs). The
function returns an array of values
unmap range always set svms->drain_pagefaults flag to simplify both
parent range and child range unmap. Deferred list work takes mmap write
lock to read and clear svms->drain_pagefaults, to serialize with unmap
callback.
Add atomic flag svms->draining_faults, if svms->draining_faults is set,
page
VMA may be removed before unmap notifier callback, restore pages take
mmap write lock to lookup VMA to avoid race, and then create unregister
new range and check VMA access permission, then downgrade to take mmap
read lock to recover fault. Refactor code to avoid duplicate VMA lookup.
kfd process mmu release notifier callback drain retry fault to ensure no
retry fault comes after removing kfd process from the hash table,
otherwise svm page fault handler will fail to recover the fault and dump
GPU vm fault log.
Drain retry fault needs flush restore page fault work to wait for
Reviewed-by: Tao Zhou
> -Original Message-
> From: Li, Candice
> Sent: Wednesday, November 17, 2021 11:08 AM
> To: Zhou1, Tao ; amd-gfx@lists.freedesktop.org
> Cc: Clements, John
> Subject: RE: [PATCH] drm/amdgpu: Add recovery_lock to save bad pages
> function
>
> [Public]
>
> Thanks
[Public]
Thanks for the review, Tao. Updated the position for unlocking.
Fix race condition failure during UMC UE injection.
Signed-off-by: Candice Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
Thanks for your review, I'll add {} before push.
> -Original Message-
> From: Quan, Evan
> Sent: Wednesday, November 17, 2021 9:50 AM
> To: Zhou1, Tao ; amd-gfx@lists.freedesktop.org; Zhang,
> Hawking ; Clements, John
> ; Yang, Stanley ; Lazar,
> Lijo ; Wang, Yang(Kevin)
> Subject: RE:
[AMD Official Use Only]
Reviewed-by: Evan Quan
> -Original Message-
> From: Stanley.Yang
> Sent: Tuesday, November 16, 2021 4:03 PM
> To: amd-gfx@lists.freedesktop.org; Zhang, Hawking
> ; Clements, John ;
> Zhou1, Tao ; Quan, Evan
> Cc: Yang, Stanley
> Subject: [PATCH Review 1/1]
[AMD Official Use Only]
With the concern from Guchun addressed, the patch is reviewed-by: Evan Quan
> -Original Message-
> From: Zhou1, Tao
> Sent: Tuesday, November 16, 2021 6:29 PM
> To: amd-gfx@lists.freedesktop.org; Zhang, Hawking
> ; Clements, John ;
> Yang, Stanley ; Quan, Evan
- Remove drm_mm references and replace with drm buddy functionalities
- Add res cursor support for drm buddy
v2(Matthew Auld):
- replace spinlock with mutex as we call kmem_cache_zalloc(..., GFP_KERNEL)
in drm_buddy_alloc() function
- lock drm_buddy_block_trim() function as it calls
Move shared vram inline functions and structs
into a header file
Signed-off-by: Arunpravin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 51
1 file changed, 51 insertions(+)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
diff --git
On contiguous allocation, we round up the size
to the *next* power of 2, implement a function
to free the unused pages after the newly allocate block.
v2(Matthew Auld):
- replace function name 'drm_buddy_free_unused_pages' with
drm_buddy_block_trim
- replace input argument name
Implemented a function which walk through the order list,
compares the offset and returns the maximum offset block,
this method is unpredictable in obtaining the high range
address blocks which depends on allocation and deallocation.
for instance, if driver requests address at a low specific
- Make drm_buddy_alloc a single function to handle
range allocation and non-range allocation demands
- Implemented a new function alloc_range() which allocates
the requested power-of-two block comply with range limitations
- Moved order computation and memory alignment logic from
i915
Move the base i915 buddy allocator code into drm
- Move i915_buddy.h to include/drm
- Move i915_buddy.c to drm root folder
- Rename "i915" string with "drm" string wherever applicable
- Rename "I915" string with "DRM" string wherever applicable
- Fix header file dependencies
- Fix alignment issues
[AMD Official Use Only]
Acked-by: Alex Deucher
From: Christian König
Sent: Tuesday, November 16, 2021 5:43 AM
To: amd-gfx@lists.freedesktop.org ; Deucher,
Alexander
Subject: Re: [PATCH 2/6] drm/amdgpu: stop getting excl fence separately
Adding Alex.
Once
On 2021-11-16 15:10, Alex Deucher wrote:
> On Tue, Nov 16, 2021 at 3:09 AM Christian König
> wrote:
>>
>> Am 16.11.21 um 09:00 schrieb Lang Yu:
>>> On Tue, Nov 16, 2021 at 08:14:08AM +0100, Christian KKKnig wrote:
Am 16.11.21 um 04:27 schrieb Lang Yu:
> On Mon, Nov 15, 2021 at 01:04:15PM
On Tue, Nov 16, 2021 at 3:09 AM Christian König
wrote:
>
> Am 16.11.21 um 09:00 schrieb Lang Yu:
> > On Tue, Nov 16, 2021 at 08:14:08AM +0100, Christian KKKnig wrote:
> >> Am 16.11.21 um 04:27 schrieb Lang Yu:
> >>> On Mon, Nov 15, 2021 at 01:04:15PM +0100, Michel DDDnzer wrote:
> [SNIP]
>
Hi Alex,
thank you for your response.
On 15.11.2021 10:43, Alex Deucher wrote:
> [...]
>
> That patch adds support for systems with multiple backlights. Do you
> have multiple backlight devices now? If so, does the other one work?
No, there is still only one backlight device -- amdgpu_bl0.
>
[Public]
A coding style problem.
A {} is needed for the path after if (smu_version < 0x00440700).
if (smu_version < 0x00440700)
> + ret = smu_cmn_send_smc_msg(smu, SMU_MSG_Mode1Reset, NULL);
> + else {
> + /* fatal error triggered by ras, PMFW supports the flag
> +
Adding Alex.
Once more a ping to the mailing list.
Thanks,
Christian.
Am 11.11.21 um 09:58 schrieb Christian König:
Just a ping to the amd-gfx list.
Trivial cleanup, can anybody give me an rb for that?
Thanks,
Christian.
Am 28.10.21 um 15:26 schrieb Christian König:
Just grab all fences
On 11/16/2021 3:58 PM, Tao Zhou wrote:
If gpu reset is triggered by ras fatal error, tell it to smu in mode-1
reset message.
v2: move mode-1 reset function to aldebaran_ppt.c since it's aldebaran
specific currently.
Signed-off-by: Tao Zhou
Reviewed-by: Lijo Lazar
Thanks,
Lijo
---
If gpu reset is triggered by ras fatal error, tell it to smu in mode-1
reset message.
v2: move mode-1 reset function to aldebaran_ppt.c since it's aldebaran
specific currently.
Signed-off-by: Tao Zhou
---
drivers/gpu/drm/amd/pm/inc/smu_v13_0.h| 3 +-
Am 16.11.21 um 02:34 schrieb Bernard Zhao:
In function dc_sink_destruct, kfree will check pointer, no need
to check again.
This change is to cleanup the code a bit.
Signed-off-by: Bernard Zhao
This one and the other patch are Acked-by: Christian König
---
This change is to cleanup the code a bit.
Signed-off-by: Bernard Zhao
---
.../drm/amd/display/dc/dcn10/dcn10_resource.c | 18 ++
1 file changed, 6 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
Fix following coccicheck warning:
drivers/gpu/drm/radeon/r100.c:3450:26-27: WARNING opportunity for max()
drivers/gpu/drm/radeon/r100.c:2812:23-24: WARNING opportunity for max()
Signed-off-by: zhaoxiao
---
drivers/gpu/drm/radeon/r100.c | 10 ++
1 file changed, 2 insertions(+), 8
In function dc_sink_destruct, kfree will check pointer, no need
to check again.
This change is to cleanup the code a bit.
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/dc/core/dc_sink.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git
On 11/16/2021 2:17 PM, Zhou1, Tao wrote:
[AMD Official Use Only]
Hi Lijo,
Your concern is reasonable, but in fact smu_v13_0_mode1_reset is used only by
ALDEBARAN currently. I assume the PMFW of new smu v13 ASIC in the future will
follow this design, otherwise we could move the
[AMD Official Use Only]
Hi Lijo,
Your concern is reasonable, but in fact smu_v13_0_mode1_reset is used only by
ALDEBARAN currently. I assume the PMFW of new smu v13 ASIC in the future will
follow this design, otherwise we could move the implementation into xxx_ppt.c.
Regards,
Tao
>
On Fri, 12 Nov 2021 10:08:41 -0500
Jason Baron wrote:
> On 11/12/21 6:49 AM, Vincent Whitchurch wrote:
> > On Thu, Nov 11, 2021 at 03:02:04PM -0700, Jim Cromie wrote:
> >> Sean Paul proposed, in:
> >>
On 11/16/2021 1:32 PM, Stanley.Yang wrote:
update smu driver if and version to avoid mismatch log
v2:
update smu driver interface
A version mismatch can still happen with an older FW. I think it's
better to change the patch subject also as - "Update smu driver
interface for
[AMD Official Use Only]
> -Original Message-
> From: Li, Candice
> Sent: Tuesday, November 16, 2021 4:02 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Clements, John ; Zhou1, Tao
> ; Li, Candice
> Subject: [PATCH] drm/amdgpu: Add recovery_lock to save bad pages function
>
> Fix race
Am 16.11.21 um 09:00 schrieb Lang Yu:
On Tue, Nov 16, 2021 at 08:14:08AM +0100, Christian KKKnig wrote:
Am 16.11.21 um 04:27 schrieb Lang Yu:
On Mon, Nov 15, 2021 at 01:04:15PM +0100, Michel DDDnzer wrote:
[SNIP]
Though a single call to dce_v*_0_crtc_do_set_base() will
only pin the BO, I
update smu driver if and version to avoid mismatch log
v2:
update smu driver interface
Change-Id: I97f2bc4ed9a9cba313b744e2ff6812c90b244935
Signed-off-by: Stanley.Yang
---
.../drm/amd/pm/inc/smu13_driver_if_aldebaran.h | 18 +-
drivers/gpu/drm/amd/pm/inc/smu_v13_0.h
Fix race condition failure during UMC UE injection.
Signed-off-by: Candice Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index
update smu driver if version to avoid mismatch log
Change-Id: I97f2bc4ed9a9cba313b744e2ff6812c90b244935
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/pm/inc/smu_v13_0.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v13_0.h
[AMD Official Use Only]
Thanks Lijo, will be updated.
Regards,
Stanley
> -邮件原件-
> 发件人: Lazar, Lijo
> 发送时间: Tuesday, November 16, 2021 3:49 PM
> 收件人: Yang, Stanley ; amd-
> g...@lists.freedesktop.org; Zhang, Hawking ;
> Clements, John ; Zhou1, Tao
> ; Quan, Evan
> 主题: Re: [PATCH Review
On Tue, Nov 16, 2021 at 08:14:08AM +0100, Christian KKKnig wrote:
> Am 16.11.21 um 04:27 schrieb Lang Yu:
> > On Mon, Nov 15, 2021 at 01:04:15PM +0100, Michel DDDnzer wrote:
> > > [SNIP]
> > > > Though a single call to dce_v*_0_crtc_do_set_base() will
> > > > only pin the BO, I found it will be
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