This v2 patch extends to all GMC versions.
Regards,
Alex
> -Original Message-
> From: Sierra Guiza, Alejandro (Alex)
> Sent: Friday, April 22, 2022 9:25 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Sierra Guiza, Alejandro (Alex)
> Subject: [PATCH v2] drm/amdgpu: replace VM fault error
This is not a kernel error. These logs are caused by VM faults that
could not be handled. Typically, generated by user mode applications.
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 14 +++---
drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 14 +++---
On 2022-04-22 10:06, Philip Yang wrote:
Change SVM range mapping flags or access attributes don't trigger
migration, if range is already mapped on GPUs we should update GPU
mapping and pass flush_tlb flag true to amdgpu vm.
Change SVM range preferred_loc or migration granularity don't need
On 2022-04-22 17:15, Alex Sierra wrote:
This is not a kernel error. These logs are caused by VM faults that
could not be handled. Typically, generated by user mode applications.
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 20 ++--
Please update the
How about these patches?
Alex
On Fri, Apr 22, 2022 at 5:00 PM Alex Deucher wrote:
>
> On Fri, Apr 22, 2022 at 3:54 PM Wong, Alice wrote:
> >
> > [AMD Official Use Only]
> >
> > Hi Alex,
> >
> > The attached patch freed most of the allocated memory except for one
> > allocated by psp_tmr_init
This is not a kernel error. These logs are caused by VM faults that
could not be handled. Typically, generated by user mode applications.
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git
On Fri, Apr 22, 2022 at 3:54 PM Wong, Alice wrote:
>
> [AMD Official Use Only]
>
> Hi Alex,
>
> The attached patch freed most of the allocated memory except for one
> allocated by psp_tmr_init during psp_load_fw.
> Combination of the attached patch and calling psp_hw_fini when psp_hw_init
>
[ 168.544078] ==
[ 168.550309] WARNING: possible circular locking dependency detected
[ 168.556523] 5.16.0-kfd-fkuehlin #148 Tainted: GE
[ 168.562558] --
[ 168.568764]
The logic to update the IO links when a KFD device
is removed was not correct as it would miss updating
the proximity domain values for some nodes where the
node_from and node_to both were greater values than the
proximity domain value of the KFD device being removed
from topology.
Fixes:
Applied. Thanks!
Alex
On Fri, Apr 22, 2022 at 2:04 AM Haowen Bai wrote:
>
> After alloc fail, we do not need to kfree.
>
> Signed-off-by: Haowen Bai
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
On 2022-04-22 10:28, Melissa Wen wrote:
On 04/21, Harry Wentland wrote:
On 2022-04-21 15:20, Melissa Wen wrote:
On 04/21, Harry Wentland wrote:
On 2022-04-21 10:37, Melissa Wen wrote:
Hi all,
I'm examining how DRM color management properties (degamma, ctm, gamma)
are applied to AMD
From: Aric Cyr
This version brings along following fixes:
- Keep tracking of DSC packed PPS for future use
- Maintain current link settings in link loss interrupt
- Remove DDC write and read size check
- Read PSR-SU cap DPCD for specific panel
- Don't pass HostVM by default on DCN3.1
- Reset
From: Ilya
[Why]
Store current packed PPS data in dc_stream_state for future use.
Reviewed-by: Aric Cyr
Acked-by: Tom Chung
Signed-off-by: Ilya Bakoulin
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 ++
drivers/gpu/drm/amd/display/dc/dc_stream.h | 2 +-
2 files changed, 3
From: Dillon Varone
Integer no longer needed.
Reviewed-by: Martin Leung
Acked-by: Tom Chung
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
From: Gary Li
[Why]
DP compliance test case 400.3.2.3 is failed because in link loss interrupt
the current link settings is not used in the DP link training.
[How]
In link loss interrupt, use the current link settings in the following DP
link training.
Reviewed-by: Wenjing Liu
Acked-by: Tom
From: "Leo (Hanghong) Ma"
[Why]
Customer found I2C over AUX using ADL_Display_DDCBlockAccess_Get
will fail when sending more than 256 bytes of data;
[How]
Remove the write and read size checking to allow sending data more
than 256 bytes;
Reviewed-by: Martin Leung
Acked-by: Tom Chung
From: David Zhang
[why & how]
For some specific eDP panel, we'd check the PSR-SU cap during boot
by reading the vendor specific DPCD, otherwise it will cause to
false report the eDP panel which supports PSR-SU as an non-PSR-SU
panel.
- add the vendor specific DPCD address in ddc_service_types
From: Michael Strauss
[WHY]
Roll back previous change to stop passing this value by default, instead
add a debug flag to override to previous behaviour (or force HostVM calcs)
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Michael Strauss
---
From: Evgenii Krasnikov
[WHY]
After hibernate system might be using old invalid psr_power_opt and
psr_allow_active that never get reset
[HOW]
Reset cached Panel Self Refresh parameters when PSR is first configured
for eDP in dc_link_setup_psr.
Reviewed-by: Harry Vanzylldejong
Acked-by: Tom
From: Ilya
[Why]
Can be useful for verifying the correctness of audio output.
Reviewed-by: Aric Cyr
Acked-by: Tom Chung
Signed-off-by: Ilya Bakoulin
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c | 1 +
.../gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h | 8
From: Dmytro Laktyushkin
Clean up the sequence by making sure clk_mgr always builds a
reasonable clock table regardless of what we read from smu
by moving all defaults from resource soc struct to clk_mgr.
Now the only thing resource soc update does is read
the clock table and apply any DC
From: Aric Cyr
This version brings along following improvements:
- Fix HDCP QUERY Error for eDP and Tiled
- Insert smu busy status before sending another request
Acked-by: Tom Chung
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1
From: Mustapha Ghaddar
[WHY]
For dio_output_encoder ID we are relying on SW concept which is
invisible to HW
[HOW]
Needed to create separate cases for when DPIA and non DPIA for
dio link encoder ID
Reviewed-by: Wenjing Liu
Reviewed-by: James Zhang
Acked-by: Tom Chung
Signed-off-by: Mustapha
From: Oliver Logush
[why]
Need to check if result register is busy before sending another request
[how]
Call method to check if result register is busy
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Oliver Logush
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/dcn301_smu.c
This version brings along following fixes:
- Keep tracking of DSC packed PPS for future use
- Maintain current link settings in link loss interrupt
- Remove DDC write and read size check
- Read PSR-SU cap DPCD for specific panel
- Don't pass HostVM by default on DCN3.1
- Reset cached PSR
[AMD Official Use Only]
Looks ok to me .
You can add reviewed-by: Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of David Yu
Sent: Friday, April 22, 2022 12:09 PM
To: amd-gfx@lists.freedesktop.org
Cc: Yu, David
Subject: [PATCH] drm/amdgpu: Ta fw needs to be loaded for SRIOV
Load ta fw during psp_init_sriov_microcode to enable XGMI. It is required to be
loaded by both guest and host starting from Arcturus. Cap fw needs to be loaded
first.
Fix previously patch that was pushed by mistake.
Signed-off-by: David Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 4 ++--
[AMD Official Use Only]
Please add some more info in the description to explain why we need to add
TA in SRIOV guest .
Regard
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of David Yu
Sent: Friday, April 22, 2022 10:58 AM
To: amd-gfx@lists.freedesktop.org
Cc: Yu, David
Hi Dave, Daniel,
More stuff for 5.19.
The following changes since commit d68cf992ded575928cf4ddf7c64faff0d8dcce14:
drm/amd/amdgpu: Remove static from variable in RLCG Reg RW (2022-04-14
15:29:20 -0400)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
Load ta fw during psp_init_sriov_microcode to enable XGMI
Signed-off-by: David Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index
On 04/21, Harry Wentland wrote:
>
>
> On 2022-04-21 15:20, Melissa Wen wrote:
> > On 04/21, Harry Wentland wrote:
> > >
> > >
> > > On 2022-04-21 10:37, Melissa Wen wrote:
> > > > Hi all,
> > > >
> > > > I'm examining how DRM color management properties (degamma, ctm, gamma)
> > > > are
Change SVM range mapping flags or access attributes don't trigger
migration, if range is already mapped on GPUs we should update GPU
mapping and pass flush_tlb flag true to amdgpu vm.
Change SVM range preferred_loc or migration granularity don't need
update GPU mapping, skip the validate_and_map.
On 2022-04-21 16:17, Felix Kuehling
wrote:
Am
2022-04-19 um 20:47 schrieb Philip Yang:
Change SVM range mapping flags or access
attributes don't trigger
migration, if range is already mapped on GPUs we should update
After alloc fail, we do not need to kfree.
Signed-off-by: Haowen Bai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index ec709997c9c7..5fb3e69c04c4 100644
---
[AMD Official Use Only]
Reviewed-by: Evan Quan
> -Original Message-
> From: Chen, Guchun
> Sent: Friday, April 22, 2022 5:47 PM
> To: amd-gfx@lists.freedesktop.org; Koenig, Christian
> ; Zhang, Hawking ;
> Deucher, Alexander ; Lazar, Lijo
> ; Quan, Evan
> Cc: Chen, Guchun
> Subject:
Add a quirk to switch baco trigger sequence from armd3 sequence
to control by driver itself on several SKUs, otherwise, SMU will
fail to be resumed from runtime suspend. Will drop this after a
clean solution between kernel driver and SMU FW is available.
amdgpu :63:00.0: amdgpu: GECC is
[AMD Official Use Only]
Thanks Lijo.
@Deucher, Alexander I just landed the change on our drm-next branch.
BR
Evan
> -Original Message-
> From: Lazar, Lijo
> Sent: Friday, April 22, 2022 5:25 PM
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ;
>
On 4/22/2022 2:23 PM, Quan, Evan wrote:
[AMD Official Use Only]
-Original Message-
From: Lazar, Lijo
Sent: Friday, April 22, 2022 4:36 PM
To: Quan, Evan ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ;
pmen...@molgen.mpg.de; arthur.ma...@internode.on.net
Subject: Re:
[AMD Official Use Only]
> -Original Message-
> From: Lazar, Lijo
> Sent: Friday, April 22, 2022 4:36 PM
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ;
> pmen...@molgen.mpg.de; arthur.ma...@internode.on.net
> Subject: Re: [PATCH V2] drm/amd/pm: fix the
On 4/22/2022 1:57 PM, Quan, Evan wrote:
[AMD Official Use Only]
-Original Message-
From: Lazar, Lijo
Sent: Monday, April 11, 2022 6:06 PM
To: Quan, Evan ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ;
pmen...@molgen.mpg.de; arthur.ma...@internode.on.net
Subject: Re:
[AMD Official Use Only]
> -Original Message-
> From: Lazar, Lijo
> Sent: Monday, April 11, 2022 6:06 PM
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ;
> pmen...@molgen.mpg.de; arthur.ma...@internode.on.net
> Subject: Re: [PATCH V2] drm/amd/pm: fix the
[AMD Official Use Only]
> -Original Message-
> From: Thorsten Leemhuis
> Sent: Thursday, April 21, 2022 4:29 PM
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ;
> pmen...@molgen.mpg.de; arthur.ma...@internode.on.net
> Subject: Re: [PATCH V2] drm/amd/pm: fix
Am 21.04.22 um 23:13 schrieb Zack Rusin:
On Thu, 2022-04-21 at 12:17 +0200, Christian König wrote:
⚠ External Email
Am 20.04.22 um 21:28 schrieb Zack Rusin:
[SNIP]
To figure out what it is could you try the following code
fragment:
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_validation.c
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