[why]
Passthrough case is treated as root bus and pcie_gen_mask is set as
default value that does not support GEN 3 and GEN 4 for PCIe link
speed. So PCIe link speed will be downgraded at smu hw init in
passthrough condition
[how]
Move get pci info after detect virtualization and check if it is
[AMD Official Use Only - General]
drm/amdgpu: don't enable secure display on incompatible platforms
[why]
[drm] psp gfx command LOAD_TA(0x1) failed and response status is (0x7)
[drm] psp gfx command INVOKE_CMD(0x3) failed and response status is (0x4)
amdgpu :04:00.0: amdgpu:
On Wed, May 17, 2023 at 10:27 PM Srinivasan Shanmugam
wrote:
>
Patch title should be prefixed with drm/amdgpu:. With that fixed:
Reviewed-by: Alex Deucher
> Fix below checkpatch warnings:
>
> WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
> WARNING: Comparisons should place the
Fix below checkpatch warnings:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: Comparisons should place the constant on the right side of the test
WARNING: Missing a blank line after declarations
Cc: Luben Tuikov
Cc: Alex Deucher
Cc: Christian König
Signed-off-by: Srinivasan
On 5/17/23 12:33, Hamza Mahfooz wrote:
Since, we are only interested in having
drm_edid_override_connector_update(), update the value of
connector->edid_blob_ptr. We don't care about the return value of
drm_edid_override_connector_update() here. So, drop count.
Fixes: 068553e14f86
On 5/17/23 12:33, Hamza Mahfooz wrote:
set_abm_event() is never actually used. So, drop it.
Fixes: b46c01aa0329 ("drm/amd/display: Refactor ABM feature")
Reported-by: kernel test robot
Reported-by: Tom Rix
Signed-off-by: Hamza Mahfooz
---
drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c |
On 5/17/23 12:33, Hamza Mahfooz wrote:
get_available_dsc_slices() returns the number of indices set, and all of
the users of get_available_dsc_slices() don't cross the returned bound
when iterating over available_slices[]. So, the memset() in
get_available_dsc_slices() is redundant and can be
On 2023-05-17 17:40, Mukul Joshi wrote:
Add a low priority DRM scheduler for VRAM clearing instead of using
the exisiting high priority scheduler. Use the high priority scheduler
for migrations and evictions.
Signed-off-by: Mukul Joshi
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +--
Add a low priority DRM scheduler for VRAM clearing instead of using
the exisiting high priority scheduler. Use the high priority scheduler
for migrations and evictions.
Signed-off-by: Mukul Joshi
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
On Tue, May 9, 2023 at 11:33 AM Chia-I Wu wrote:
>
> Extend the address and size validations to AMDGPU_VA_OP_UNMAP and
> AMDGPU_VA_OP_CLEAR by moving the validations to amdgpu_gem_va_ioctl.
>
> Internal users of amdgpu_vm_bo_map are no longer validated but they
> should be fine.
>
> Userspace
Additional checks are necessary related to stream and scaling changes
before setting freesync video mode when an eDP panel is in use,
otherwise it can create artifacts on the panel.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2162
Fixes: 541d54055b75 ("drm/amd/display: Fix hang when
On Wed, May 17, 2023 at 3:08 AM Su Hui wrote:
>
> No need cast (void*) to (struct radeon_device *)
> or (struct radeon_ring *).
>
> Signed-off-by: Su Hui
Applied. thanks!
Alex
> ---
> drivers/gpu/drm/radeon/r100.c | 8
> drivers/gpu/drm/radeon/r300.c | 2 +-
>
On Wed, May 17, 2023 at 11:02 AM Alex Deucher wrote:
>
> + dri-devel for scheduler
>
> On Tue, May 9, 2023 at 6:23 AM ZhenGuo Yin wrote:
> >
> > [Why]
> > drm_sched_entity_add_dependency_cb ignores the scheduled fence and return
> > false.
> > If entity's dependency is a schedulerd error fence
On Thu, May 11, 2023 at 5:29 AM ZhenGuo Yin wrote:
>
> [Why]
> UMD is not aware of entity error, and will keep submitting jobs
> into the error entity.
>
> [How]
> Add entity error check when getting entity from ctx.
>
> Signed-off-by: ZhenGuo Yin
Looks correct to me.
Reviewed-by: Alex Deucher
On Wed, May 17, 2023 at 12:18 PM Graham Sider wrote:
>
> For GC 9.4.3, set gfx_target_version to 90402 for rev 1 and later (APU
> or dGPU), 90401 for rev 0 dGPU, and 90400 for rev 0 APU.
>
> Signed-off-by: Graham Sider
> Reviewed-by: Amber Lin
Acked-by: Alex Deucher
> ---
>
[AMD Official Use Only - General]
Reviewed-by: Mukul Joshi
From: amd-gfx on behalf of Alex Deucher
Sent: Wednesday, May 17, 2023 2:40 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Joshi, Mukul
; Chen, Guchun
Subject: [PATCH] drm/amdgpu/gmc9:
No invocation of get_user_pages() use the vmas parameter, so remove it.
The GUP API is confusing and caveated. Recent changes have done much to
improve that, however there is more we can do. Exporting vmas is a prime
target as the caller has to be extremely careful to preclude their use
after the
On 2023-05-17 15:06, Alex Deucher wrote:
Allocate large local variable on heap to avoid exceeding the
stack size:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.c: In function
‘svm_range_validate_and_map’:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.c:1690:1: warning: the frame size
of 2360
Allocate large local variable on heap to avoid exceeding the
stack size:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.c: In function
‘svm_range_validate_and_map’:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.c:1690:1: warning: the frame size
of 2360 bytes is larger than 2048 bytes
Rework logic or use do_div() to avoid problems on 32 bit.
v2: add a missing case for XCP macro
v3: fix out of bounds array access
v4: fix xcp handling harder
Acked-by: Guchun Chen (v1)
Reviewed-by: Mukul Joshi (v3)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c |
Since, we are only interested in having
drm_edid_override_connector_update(), update the value of
connector->edid_blob_ptr. We don't care about the return value of
drm_edid_override_connector_update() here. So, drop count.
Fixes: 068553e14f86 ("drm/amd/display: assign edid_blob_ptr with edid from
set_abm_event() is never actually used. So, drop it.
Fixes: b46c01aa0329 ("drm/amd/display: Refactor ABM feature")
Reported-by: kernel test robot
Reported-by: Tom Rix
Signed-off-by: Hamza Mahfooz
---
drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 12
get_available_dsc_slices() returns the number of indices set, and all of
the users of get_available_dsc_slices() don't cross the returned bound
when iterating over available_slices[]. So, the memset() in
get_available_dsc_slices() is redundant and can be dropped.
Fixes: 97bda0322b8a
[AMD Official Use Only - General]
Reviewed-by: Mukul Joshi
From: Deucher, Alexander
Sent: Wednesday, May 17, 2023 1:17 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Chen, Guchun
; Joshi, Mukul
Subject: [PATCH] drm/amdgpu/gmc9: fix 64 bit
Reviewed-by: Philip Yang
On 2023-05-17 12:19, Graham Sider wrote:
The extra legacy TLB flush mitigation is only required on rev0.
Signed-off-by: Graham Sider
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git
Acked-by: Luben Tuikov
Regards,
Luben
On 2023-05-17 11:56, Srinivasan Shanmugam wrote:
> Fix below checkpatch errors & warnings:
>
> In amdgpu_uvd.c:
>
> WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
> WARNING: Prefer 'unsigned int *' to bare use of 'unsigned *'
> WARNING: Missing
Acked-by: Luben Tuikov
Regards,
Luben
On 2023-05-17 11:13, Srinivasan Shanmugam wrote:
> Fix below checkpatch insisted error & warnings:
>
> ERROR: space required before the open brace '{'
> WARNING: braces {} are not necessary for any arm of this statement
> + if ((type ==
tree/branch: INFO setup_repo_specs:
/db/releases/20230517200055/lkp-src/repo/*/linux-next
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 065efa589871e93b6610c70c1e9de274ef1f1ba2 Add linux-next specific
files for 20230517
Error/Warning reports:
https
Acked-by: Luben Tuikov
Regards,
Luben
On 2023-05-17 09:11, Srinivasan Shanmugam wrote:
> Fix below checkpatch warnings:
>
> WARNING: Missing a blank line after declarations
> + struct amdgpu_connector *amdgpu_connector =
> to_amdgpu_connector(connector);
> +
Rework logic or use do_div() to avoid problems on 32 bit.
v2: add a missing case for XCP macro
v3: fix out of bounds array access
Acked-by: Guchun Chen (v1)
Reviewed-by: Mukul Joshi (v2)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 15 +++
[AMD Official Use Only - General]
Reviewed-by: Mukul Joshi
From: Alex Deucher
Sent: Wednesday, May 17, 2023 12:28 PM
To: Joshi, Mukul
Cc: Deucher, Alexander ;
amd-gfx@lists.freedesktop.org ; Chen, Guchun
Subject: Re: [PATCH] drm/amdgpu/gmc9: fix 64 bit
On Wed, May 17, 2023 at 12:26 PM Joshi, Mukul wrote:
>
> [AMD Official Use Only - General]
>
>
> Hi Alex,
>
>
> From: amd-gfx on behalf of Alex
> Deucher
> Sent: Wednesday, May 17, 2023 10:31 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ;
[AMD Official Use Only - General]
Hi Alex,
From: amd-gfx on behalf of Alex Deucher
Sent: Wednesday, May 17, 2023 10:31 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Chen, Guchun
Subject: [PATCH] drm/amdgpu/gmc9: fix 64 bit division in
[AMD Official Use Only - General]
Acked-by: Alex Deucher
From: amd-gfx on behalf of Graham Sider
Sent: Wednesday, May 17, 2023 12:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Sider, Graham
Subject: [PATCH] drm/amdgpu: disable extra gfx943 legacy flush on
The extra legacy TLB flush mitigation is only required on rev0.
Signed-off-by: Graham Sider
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 15 +--
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
For GC 9.4.3, set gfx_target_version to 90402 for rev 1 and later (APU
or dGPU), 90401 for rev 0 dGPU, and 90400 for rev 0 APU.
Signed-off-by: Graham Sider
Reviewed-by: Amber Lin
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
GFXOFF may be flushed at suspend entry and it may be important
to ensure it reaches desired target state. In SMU13 designs that
use IMU, validate the state is reached.
This mirrors the implementation done for SMU10 and SMU12.
Signed-off-by: Mario Limonciello
---
GFXOFF may be flushed at suspend entry and it may be important
to ensure it reaches desired target state.
Signed-off-by: Mario Limonciello
---
.../gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c| 26 +++
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git
DCN 3.1.4 is reported to hang on s2idle entry if graphics activity
is happening during entry. This is because GFXOFF was scheduled as
delayed but RLC gets disabled in s2idle entry sequence which will
hang GFX IP if not already in GFXOFF.
To help this problem, flush any delayed work for GFXOFF
GFXOFF may be flushed at suspend entry and it may be important
to ensure it reaches desired target state.
Signed-off-by: Mario Limonciello
---
.../drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 57 +--
1 file changed, 28 insertions(+), 29 deletions(-)
diff --git
DCN 3.1.4 s2idle entry will hang
occasionally on s2idle entry, but only if running Wayland and only
when using `systemctl suspend`, not `echo mem | tee /sys/power/state`.
This happens because using `systemctl suspend` will cause the screen
to lock right before writing mem into /sys/power/state.
Fix below checkpatch errors & warnings:
In amdgpu_uvd.c:
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: Prefer 'unsigned int *' to bare use of 'unsigned *'
WARNING: Missing a blank line after declarations
WARNING: %Lx is non-standard C, use %llx
ERROR: space required before
Fix below checkpatch insisted error & warnings:
ERROR: space required before the open brace '{'
WARNING: braces {} are not necessary for any arm of this statement
+ if ((type == VCN_ENCODE_RING) && (vcn_config &
VCN_BLOCK_ENCODE_DISABLE_MASK)) {
[...]
+ } else if ((type ==
Acked-by: Luben Tuikov
Regards,
Luben
On 2023-05-17 10:45, Srinivasan Shanmugam wrote:
> Fix below checkpatch insisted error & warnings:
>
> ERROR: Macros with complex values should be enclosed in parentheses
> WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
> WARNING: braces {} are
+ dri-devel for scheduler
On Tue, May 9, 2023 at 6:23 AM ZhenGuo Yin wrote:
>
> [Why]
> drm_sched_entity_add_dependency_cb ignores the scheduled fence and return
> false.
> If entity's dependency is a schedulerd error fence and drm_sched_stop is
> called
> due to TDR, drm_sched_entity_pop_job
Fix below checkpatch insisted error & warnings:
ERROR: Macros with complex values should be enclosed in parentheses
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: braces {} are not necessary for single statement blocks
WARNING: Block comments use a trailing */ on a separate
Rework logic or use do_div() to avoid problems on 32 bit.
v2: add a missing case for XCP macro
Acked-by: Guchun Chen (v1)
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 9 -
[AMD Official Use Only - General]
-Original Message-
From: Deucher, Alexander
Sent: Wednesday, May 17, 2023 6:25 PM
To: SHANMUGAM, SRINIVASAN ; Koenig, Christian
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH v2] drm/amd/amdgpu: Remove redundant else branch in
amdgpu_encoders.c
Fix below checkpatch warnings:
WARNING: Missing a blank line after declarations
+ struct amdgpu_connector *amdgpu_connector =
to_amdgpu_connector(connector);
+ amdgpu_encoder->active_device = amdgpu_encoder->devices
& amdgpu_connector->devices;
[AMD Official Use Only - General]
Assuming there are no issues resulting from the re-ordering of the function
calls, it looks fine to me.
Acked-by: Alex Deucher
From: Chen, Horace
Sent: Wednesday, May 17, 2023 2:27 AM
To: Liu01, Tong (Esther) ;
[AMD Official Use Only - General]
> -Original Message-
> From: SHANMUGAM, SRINIVASAN
>
> Sent: Tuesday, May 9, 2023 10:03 AM
> To: Koenig, Christian ; Deucher, Alexander
>
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
>
> Subject: [PATCH] drm/amd/amdgpu: Fix warnings in
[AMD Official Use Only - General]
> -Original Message-
> From: SHANMUGAM, SRINIVASAN
>
> Sent: Wednesday, May 17, 2023 6:07 AM
> To: Koenig, Christian ; Deucher, Alexander
>
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
>
> Subject: [PATCH v2] drm/amd/amdgpu: Remove
On Tue, May 16, 2023 at 10:23 PM Limonciello, Mario wrote:
>
>
> On 5/16/2023 4:57 PM, Alex Deucher wrote:
> > On Tue, May 16, 2023 at 5:50 PM Limonciello, Mario wrote:
> >>
> >> On 5/16/2023 4:39 PM, Alex Deucher wrote:
> >>> On Tue, May 16, 2023 at 2:15 PM Mario Limonciello
> >>> wrote:
>
Don't assume that only the driver would be accessing LNKCTL. ASPM
policy changes can trigger write to LNKCTL outside of driver's control.
And in the case of upstream bridge, the driver does not even own the
device it's changing the registers for.
Use RMW capability accessors which do proper
Don't assume that only the driver would be accessing LNKCTL. ASPM
policy changes can trigger write to LNKCTL outside of driver's control.
And in the case of upstream bridge, the driver does not even own the
device it's changing the registers for.
Use RMW capability accessors which do proper
Thanks for fixing this up.
Reviewed-by: Alex Deucher
On Wed, May 17, 2023 at 5:45 AM Jack Xiao wrote:
>
> 1. Need flush HDP for MQD putting in vram
> 2. Zero out mes MQD
>
> Signed-off-by: Jack Xiao
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4
>
From: Aric Cyr
This version brings along following fixes:
- Improve the message printed
- Disable dcn315 pixel rate crb when scaling
- Update SR watermarks for DCN314
- Fix dcn315 pixel rate crb scaling check
- Reset CRTC State Before Restore from S2idle
- Have Payload Properly Created After
From: Josip Pavic
[Why & How]
Cache the trace buffer size retrieved from DMUB FW in the driver
Reviewed-by: Nicholas Kazlauskas
Reviewed-by: Aric Cyr
Acked-by: Tom Chung
Signed-off-by: Josip Pavic
---
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 +
From: Rodrigo Siqueira
DCN30 has a lot of files in the Makefile, and adding each one next to
the other makes it hard to read and can increase the chance of merge
conflicts. This commit just reorganize the Makefile to put each file
associated with DCN30 in its own line.
Reviewed-by: Chris Park
From: Saaem Rizvi
[WHY and HOW]
Currently, on DCN32 we have an old workaround to resolve a DIO FIFO
speed issue when writing to the OTG DIVIDER register. However, this
workaround is not safe as we should be applying the DIO FIFO rampup
logic when the OTG re disabled along with the encoders. This
From: Qingqing Zhuo
[Why]
Drop dead code for Linux.
[How]
Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DC
Reviewed-by: Ariel Bernstein
Acked-by: Tom Chung
Signed-off-by: Qingqing Zhuo
---
.../dc/clk_mgr/dce112/dce112_clk_mgr.c| 8 +-
.../dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c | 2
From: Cruise Hung
[Why]
The register header for DCN314 is not correct.
[How]
Update correct DCN314 register header.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Cruise Hung
---
drivers/gpu/drm/amd/display/dmub/src/Makefile | 2 +-
From: Alvin Lee
[Description]
- Previously we wanted to apply extra 60us of prefetch for min DCFCLK
(200Mhz), but DCFCLK can be calculated to be 201Mhz which underflows
also without the extra prefetch
- Instead, apply the the extra 60us prefetch for any DCFCLK freq <=
300Mhz
Reviewed-by:
From: Daniel Miess
[Why]
Underflow observed when using a display with a large vblank region
and low refresh rate
[How]
Simplify calculation of vblank_nom
Increase value for VBlankNomDefaultUS to 800us
Fixed a null pointer from previous commit of this change
Reviewed-by: Nicholas Kazlauskas
From: Daniel Miess
Revert commit 43e5893f10ff606e60d1494c41acc59f54efedb0
drm/amd/display: Fix possible underflow for displays with large vblank
Because it cause some regression
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Daniel Miess
---
From: Saaem Rizvi
[WHY]
Currently, there is an intermittent issue where a screen can either go
blank or be corrupted.
[HOW]
To resolve the issue we trigger the ramping logic for DIO FIFO so that
it goes back up to the correct speed.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
From: Fangzhi Zuo
At drm suspend sequence, MST dc_sink is removed. When commit cached
MST stream back in drm resume sequence, the MST stream payload is not
properly created and added into the payload table. After resume, topology
change is reprobed by removing existing streams first. That leads
From: Dmytro Laktyushkin
fix dcn315 pixel rate crb scaling check error
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Dmytro Laktyushkin
---
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
From: Hersen Wu
[Why] some test apps report dp link training waring even dp
training pass. there are 4 tries of lt within
perform_link_training_with_retries. if lt pass within 4 tries,
it will NOT be reated as lt failure. for each try of lt, if lt
fails, current driver implementation prints
From: Alan Liu
[Why]
During gpu-reset, we toggle vblank irq by calling dc_interrupt_set()
instead of amdgpu_irq_get/put() because we don't want to change the irq
source's refcount. However, we see the warning when vblank irq is enabled
by dc_interrupt_set() during gpu-reset but disabled by
From: Nicholas Kazlauskas
[Why & How]
Update parameters for SR watermarks for DCN314
Reviewed-by: Charlene Liu
Acked-by: Tom Chung
Signed-off-by: Nicholas Kazlauskas
---
.../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
From: Dmytro Laktyushkin
The rough calculation does not account for scaling. Also, make 2
segments the minimum allowed per surface to avoid potential 0 detile
with mpc/odm combine on such outputs.
Reviewed-by: Ariel Bernstein
Acked-by: Tom Chung
Signed-off-by: Dmytro Laktyushkin
---
From: Cruise Hung
[Why]
The DMUB diagnostic data was not printed out correctly.
[How]
Print the DMUB diagnostic data line by line.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Tom Chung
Signed-off-by: Cruise Hung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 12 +++
From: Aurabindo Pillai
[Why]
Change how DC version and hardware version is printed when driver is
loaded.
- Remove exclamation
- Add DC version and hardware version to both success and failure cases
- Add version in between appropriate filler words to make a complete
statement.
Reviewed-by:
This DC patchset brings improvements in multiple areas. In summary, we have:
- Improve the message printed
- Disable dcn315 pixel rate crb when scaling
- Update SR watermarks for DCN314
- Fix dcn315 pixel rate crb scaling check
- Reset CRTC State Before Restore from S2idle
- Have Payload Properly
Using reserved vmid for the specify vmhub.
Signed-off-by: Chong Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4
3 files changed, 14 insertions(+)
diff --git
[AMD Official Use Only - General]
-Original Message-
From: Alex Deucher
Sent: Thursday, May 11, 2023 7:55 AM
To: SHANMUGAM, SRINIVASAN
Cc: Koenig, Christian ; Deucher, Alexander
; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/amdgpu: Remove redundant else branch in
Adhere to Linux kernel coding style.
Reported by checkpatch:
WARNING: else is not generally useful after a break or return
Cc: Christian König
Cc: Alex Deucher
Signed-off-by: Srinivasan Shanmugam
---
v2:
- Avoid mulitple return statements in amdgpu_dig_monitor_is_duallink
function
1. Need flush HDP for MQD putting in vram
2. Zero out mes MQD
Signed-off-by: Jack Xiao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 3 +++
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 3 +++
3 files changed, 10 insertions(+)
diff --git
[AMD Official Use Only - General]
Thanks for the clarification, Thomas. The patch is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Chai, Thomas
Sent: Wednesday, May 17, 2023 14:31
To: Zhang, Hawking ; amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Li, Candice ;
No need cast (void*) to (struct radeon_device *)
or (struct radeon_ring *).
Signed-off-by: Su Hui
---
drivers/gpu/drm/radeon/r100.c | 8
drivers/gpu/drm/radeon/r300.c | 2 +-
drivers/gpu/drm/radeon/r420.c | 2 +-
drivers/gpu/drm/radeon/r600.c | 2 +-
Hi
Am 17.05.23 um 03:58 schrieb Sui Jingfeng:
Hi, Thomas
After apply your patch set, the kernel with
arch/loongarch/configs/loongson3_defconfig
can not finish compile anymore. gcc complains:
AR drivers/gpu/built-in.a
AR drivers/built-in.a
AR built-in.a
AR
[AMD Official Use Only - General]
reset_context is a local variable in amdgpu_ras_do_recovery, if gpu_reset_flag
is not used, read regRLC_RLCS_FED_STATUS_0 register and check sdma fed error
field may move into amdgpu_ras_do_recovery, which may corrupt the code
structure of amdgpu_ras.c.
[AMD Official Use Only - General]
Hi Alex,
Can you help review this patch?
Currently on passthrough, GPU is also on the root bus but it is not APU.
Current driver regard it as APU and limit the PCIE link speed to gen2. It
causes some failure on some OCL benchmark.
Thanks & Regards,
Horace.
I think we replaced this with golden timestamp value which doesn't
require GFX register access.
Ah yes; through
5591a051b86b ("drm/amdgpu: refine get gpu clock counter method")
This wasn't part of the kernel this was originally reported on.
I suspect this would significantly decrease the
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