This patch adds the missing code comment for memory barrier
WARNING: memory barrier without comment
+ mb();
WARNING: memory barrier without comment
+ mb();
Cc: Guchun Chen
Cc: Christian König
Cc: Alex Deucher
Cc: "Pan, Xinhui"
Signed-off-by:
This patch adds the missing code comment for memory barrier
WARNING: memory barrier without comment
+ mb();
WARNING: memory barrier without comment
+ mb();
Cc: Guchun Chen
Cc: Christian König
Cc: Alex Deucher
Cc: "Pan, Xinhui"
Signed-off-by:
This patch adds the missing code comment for memory barrier
WARNING: memory barrier without comment
+ mb();
WARNING: memory barrier without comment
+ mb();
Cc: Guchun Chen
Cc: Christian König
Cc: Alex Deucher
Cc: "Pan, Xinhui"
Signed-off-by:
From: Jiadong Zhu
The parameter amdgpu_mcbp shall have priority against the default value
calculated from the chip version.
User could disable mcbp by setting the parameter mcbp as zero.
v2: do not trigger preemption in sw ring muxer when mcbp is disabled.
Signed-off-by: Jiadong Zhu
---
Hello Felix,
I appreciate the code review.
Will correct the typo (seems to have appeared during patch creation
following compilation).
Shortly as the compilation is successful, V2 will be sent.
-Atul
On 8/8/23 15:47, Felix Kuehling wrote:
On 2023-08-08 16:57, Atul Raut wrote:
To prevent
These functions don't use kernel-doc notation for comments so
don't begin each comment block with the "/**" kernel-doc marker.
This prevents a bunch of kernel-doc warnings:
dmub_replay.c:37: warning: This comment starts with '/**', but isn't a
kernel-doc comment. Refer
On 2023-08-08 16:57, Atul Raut wrote:
To prevent its redundant implementation and streamline
code, use memdup_user.
This fixes warnings reported by Coccinelle:
./drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c:2811:13-20: WARNING
opportunity for memdup_user
Signed-off-by: Atul Raut
---
To prevent its redundant implementation and streamline
code, use memdup_user.
This fixes warnings reported by Coccinelle:
./drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c:2811:13-20: WARNING
opportunity for memdup_user
Signed-off-by: Atul Raut
---
gfx_v9_4_3_xcc_set_compute_eop_interrupt_state should use *REG32_RLC
so CP_ME1_PIPE0_INT_CNTL registers can be accessed with SRIOV.
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
WREG32/RREG32_RLC should specify the instance so the correct XCC's RLCG
interface can be used.
Signed-off-by: Victor Lu
---
.../drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c | 4 +--
.../drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c | 25 +++
.../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c|
The "rlcg_reg_access_supported" flag is missing. Add it back in.
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index
amdgpu_virt_kiq_reg_write_reg_wait is hardcoded to use MEC engine 0.
Add xcc_inst as a parameter to allow it to use different MEC engines.
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 3 ++-
The WREG32/RREG32_SOC15_IP_NO_KIQ call is using XCC0's RLCG interface
when programming other XCCs.
Add inst parameter to them.
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 16
drivers/gpu/drm/amd/amdgpu/soc15_common.h | 6 +++---
2 files changed,
On 2023-08-07 18:05, Alex Deucher wrote:
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Signed-off-by: Alex Deucher
The series is
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 4
1 file
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 71cd4fc492ec41e4acd85e98bbf7a13753fc1e03 Add linux-next specific
files for 20230808
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202307251531.p8zlftmz-...@intel.com
https
In the unlikely event of radeon_ring_lock() failing, its errno return
value should be processed. This patch checks said return value and
prints a debug message in case of an error.
Found by Linux Verification Center (linuxtesting.org) with static
analysis tool SVACE.
Fixes: 48c0c902e2e6
Four hdmi_*_infoframe_init() functions that initialize different
types of hdmi infoframes only return the default 0 value, contrary to
their descriptions. Yet these functions are still unnecessarily checked
against possible errors in case of failure.
Remove redundant error checks in calls to
Applied. Thanks!
Alex
On Mon, Aug 7, 2023 at 9:22 AM Xiongfeng Wang wrote:
>
> PCI core API pci_dev_id() can be used to get the BDF number for a pci
> device. We don't need to compose it mannually. Use pci_dev_id() to
> simplify the code a little bit.
>
> Signed-off-by: Xiongfeng Wang
> ---
>
The series is:
Acked-by: Leo Liu .
On 2023-08-08 12:26, Samir Dhume wrote:
The structures are the same as v4_0 except for the
init header
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/mmsch_v4_0_3.h | 37 +++
1 file changed, 37 insertions(+)
It's the same situation as SIGSEGV. A process can catch the signal,
but if it doesn't, it gets killed. GL and Vulkan APIs give you a way
to catch the GPU error and prevent the process termination. If you
don't use the API, you'll get undefined behavior, which means anything
can happen, including
Applied. Thanks!
Alex
On Tue, Aug 8, 2023 at 4:38 AM Quan, Evan wrote:
>
> [AMD Official Use Only - General]
>
> Reviewed-by: Evan Quan
>
> > -Original Message-
> > From: Umio Yasuno
> > Sent: Tuesday, August 8, 2023 2:41 PM
> > To: amd-gfx@lists.freedesktop.org
> > Cc: Deucher,
[AMD Official Use Only - General]
Thanks Leo. I'll restore the check for sriov before calling
amdgpu_virt_alloc_mm_table(). That will make it consistent with other vcn ip
versions. I'll retain the check for sriov inside amdgpu_virt_alloc_mm_table()
as well, as a conservative check.
Thanks,
BASE: VCN0 unified (32 byte boundary)
BASE+4: MJPEG0
BASE+5: MJPEG1
BASE+6: MJPEG2
BASE+7: MJPEG3
BASE+12: MJPEG4
BASE+13: MJPEG5
BASE+14: MJPEG6
BASE+15: MJPEG7
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 17 ++---
1 file changed, 14 insertions(+), 3
For sriov, doorbell index for vcn0 for AID needs to be on
32 byte boundary so we need to move the vcn end doorbell
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
initialization table handshake with mmsch
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 260 +---
1 file changed, 236 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
initialization table handshake with mmsch
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c | 174 ---
1 file changed, 153 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 66eb0c8e6f94..1e5aad207878 100644
---
The structures are the same as v4_0 except for the
init header
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/mmsch_v4_0_3.h | 37 +++
1 file changed, 37 insertions(+)
create mode 100644 drivers/gpu/drm/amd/amdgpu/mmsch_v4_0_3.h
diff --git
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 550ac040b4be..411c1d802823 100644
---
On 8/7/2023 10:20, Alex Deucher wrote:
On Tue, Aug 1, 2023 at 4:15 PM Mario Limonciello
wrote:
Accessing the blob for amdgpu discovery from debugfs triggers:
[ 1924.487667] kernel BUG at mm/usercopy.c:102!
usercopy_abort() explains that it needs to be solved by creating
a cache to store the
On Tue, 8 Aug 2023 at 15:59, Christian König
wrote:
>
> Am 08.08.23 um 00:05 schrieb Alex Deucher:
> > We are dropping the IOMMUv2 path, so no need to enable this.
> > It's often buggy on consumer platforms anyway.
> >
> > Signed-off-by: Alex Deucher
>
> Bye ATC, it wasn't really nice with you
Am 08.08.23 um 00:05 schrieb Alex Deucher:
We are dropping the IOMMUv2 path, so no need to enable this.
It's often buggy on consumer platforms anyway.
Signed-off-by: Alex Deucher
Bye ATC, it wasn't really nice with you :)
Acked-by: Christian König for the whole series.
---
[AMD Official Use Only - General]
Hi all,
This week this patchset was tested on the following systems:
* Lenovo ThinkBook T13s Gen4 with AMD Ryzen 5 6600U
* MSI Gaming X Trio RX 6800
* Gigabyte Gaming OC RX 7900 XTX
These systems were tested on the following
On Mon, Aug 7, 2023 at 11:18 PM wrote:
>
> From: Jiadong Zhu
>
> The parameter amdgpu_mcbp shall have priority against the default value
> calculated from the chip version.
> User could disable mcbp by setting the parameter mcbp as zero.
>
> Signed-off-by: Jiadong Zhu
I think this should be
Acked-by: Alex Deucher
On Tue, Aug 8, 2023 at 2:43 AM Deng, Emily wrote:
>
> [AMD Official Use Only - General]
>
> Ping.
>
> >-Original Message-
> >From: Emily Deng
> >Sent: Monday, August 7, 2023 1:11 PM
> >To: amd-gfx@lists.freedesktop.org
> >Cc: Deng, Emily
> >Subject: [PATCH]
On 2023-07-28 15:15, Samir Dhume wrote:
initialization table handshake with mmsch
Signed-off-by: Samir Dhume
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 257 +---
1 file changed, 233 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
On Fri, Aug 4, 2023 at 3:03 PM Daniel Vetter wrote:
>
> On Tue, Jun 27, 2023 at 10:23:23AM -0300, André Almeida wrote:
> > Create a section that specifies how to deal with DRM device resets for
> > kernel and userspace drivers.
> >
> > Acked-by: Pekka Paalanen
> > Signed-off-by: André Almeida
>
On 8/8/2023 3:56 PM, Feng, Kenneth wrote:
[AMD Official Use Only - General]
Currently no_fan is determined in sw init.
if (!smu->ppt_funcs->get_fan_control_mode)
smu->adev->pm.no_fan = true;
This is the case that some boards have fans and some don't have.
[AMD Official Use Only - General]
Currently no_fan is determined in sw init.
if (!smu->ppt_funcs->get_fan_control_mode)
smu->adev->pm.no_fan = true;
This is the case that some boards have fans and some don't have.
smu->ppt_funcs->get_fan_control_mode still need to be defined.
On 8/8/2023 1:21 PM, Kenneth Feng wrote:
disallow the fan setting if there is no fan on smu13
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
[AMD Official Use Only - General]
OK, will do
-
Best Regards,
Thomas
-Original Message-
From: Zhang, Hawking
Sent: Tuesday, August 8, 2023 5:50 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Chai, Thomas ; Yang,
Stanley ; Chai, Thomas ; Li,
[AMD Official Use Only - General]
Like other psp callback helper defined in amdgpu_psp.h, let's define a macro
called psp_fatal_error_recovery_quirk to wrap the psp function
(psp_v13_0_fatal_error_recovery_quirk)
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of YiPeng
[AMD Official Use Only - General]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Candice Li
Sent: Tuesday, August 8, 2023 17:04
To: amd-gfx@lists.freedesktop.org
Cc: Li, Candice
Subject: [PATCH] drm/amdgpu: Extend poison mode check to
Treat SDMA/VCN/JPEG as RAS capable IP blocks in poison mode.
Signed-off-by: Candice Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index
[AMD Official Use Only - General]
Reviewed-by: Evan Quan
> -Original Message-
> From: Umio Yasuno
> Sent: Tuesday, August 8, 2023 2:41 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Quan, Evan
> ; Limonciello, Mario
> Subject: [PATCH] fix throttle_status for other
Mode1 reset needs to recover mp1 in fatal error case
for mp0 v13_0_10.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 +++
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 24 +++-
3 files changed, 27
disallow the fan setting if there is no fan on smu13
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2720
Signed-off-by: Umio Yasuno
---
.../drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c| 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2720
Signed-off-by: Umio Yasuno
---
.../drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c| 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
[AMD Official Use Only - General]
Ping.
>-Original Message-
>From: Emily Deng
>Sent: Monday, August 7, 2023 1:11 PM
>To: amd-gfx@lists.freedesktop.org
>Cc: Deng, Emily
>Subject: [PATCH] drm/amdgpu/irq: Move irq resume to the beginning
>
>Need to move irq resume to the beginning of
Am 18.07.23 um 07:13 schrieb Guchun Chen:
~0 as no xcp partition is used in several places, so improve its
definition by a macro for code consistency.
Suggested-by: Christian König
Signed-off-by: Guchun Chen
Reviewed-by: Felix Kuehling
I guess you already pushed this, so just for the
51 matches
Mail list logo
