[AMD Official Use Only - General]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Thursday, October 12, 2023 12:58
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
Subject: [PATCH v2 3/3] drm/amd/pm: Add P2S
[AMD Official Use Only - General]
Please ignore this patch as tOS is not loaded on VF and hence the path is not
taken.
Thanks,
Lijo
-Original Message-
From: amd-gfx On Behalf Of Lijo Lazar
Sent: Thursday, October 12, 2023 11:21 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher,
[AMD Official Use Only - General]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Thursday, October 12, 2023 13:51
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
Subject: [PATCH] drm/amdgpu: Restrict PSP OS version
Only physical function can read PSP OS version register on PSP v13.x
SOCs.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c
index
[AMD Official Use Only - General]
Series is.
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Lijo Lazar
Sent: Thursday, October 12, 2023 12:58 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Hawking
Subject: [PATCH v2
Add P2S table load support on SMU v13.0.6 ASICs.
Signed-off-by: Lijo Lazar
---
v2: Fixed MP0 IP version check (Hawking)
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 7 ++
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 71 +++
2 files changed, 78 insertions(+)
diff --git
Add support to load P2S tables through PSP.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 27 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 6 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 1 +
3 files changed, 34 insertions(+)
diff --git
Adds FW id for P2S table.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
index dfd60db97012..4bb5e10217bb 100644
---
On 10/12/2023 7:43 AM, Zhang, Hawking wrote:
[AMD Official Use Only - General]
+ if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(11, 0, 6)) {
Typo? 11, 0, 6 -> 13, 0, 6
Thanks for the catch. Will send a v2.
Thanks,
Lijo
Regards,
Hawking
-Original Message-
From:
Hi Dave, Daniel,
Fixes for 6.6.
The following changes since commit 94f6f0550c625fab1f373bb86a6669b45e9748b3:
Linux 6.6-rc5 (2023-10-08 13:49:43 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.6-2023-10-11
for you to
[AMD Official Use Only - General]
+ if (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(11, 0, 6)) {
Typo? 11, 0, 6 -> 13, 0, 6
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Wednesday, October 11, 2023 23:32
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ;
On 2023-10-11 21:31, vitaly.pros...@amd.com wrote:
> From: Vitaly Prosyak
>
> When software 'pci unplug' using IGT is executed we got a sysfs directory
> entry is NULL for differant ras blocks like hdp, umc, etc.
> Before call 'sysfs_remove_file_from_group' and 'sysfs_remove_group'
> check that
[AMD Official Use Only - General]
-Original Message-
From: Alex Deucher
Sent: Wednesday, October 11, 2023 10:20 PM
To: Zhang, Jesse(Jie)
Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
; Yang, Philip ; Kuehling,
Felix ; Zhang, Yifan
Subject: Re: [PATCH] drm/amdgpu: disable
From: Vitaly Prosyak
When software 'pci unplug' using IGT is executed we got a sysfs directory
entry is NULL for differant ras blocks like hdp, umc, etc.
Before call 'sysfs_remove_file_from_group' and 'sysfs_remove_group'
check that 'sd' is not NULL.
[ +0.01] RIP:
[AMD Official Use Only - General]
Hi,
Can I get the RB for this patch? To fix the reset failure with following
calltrace?
[ 72.743001] amdgpu :03:00.0: amdgpu: [gfxhub] page fault (src_id:0
ring:160 vmid:0 pasid:0, for process pid 0 thread pid 0)
[ 72.743009] [drm] ring
From: Xiaogang Chen
This is needed to correctly handle BOs imported into compute VM from gfx.
Both kfd and gfx should use same bo_va when map the Bos into same VM, otherwise
we may trigger kernel general protection when iterate mappings from bo_va.
Signed-off-by: Felix Kuehling
Acked-by:
On 2023-10-11 14:22, David Francis wrote:
When the CPU is XGMI connected, the PCIe links should
not be enumerated for topology purposes. However, PCIe
transfer should still be a valid option for memory attachment
that requires it.
You could be more specific here. This is for remote doorbells
On 2023-10-11 14:22, David Francis wrote:
dmaunmap can call ttm_bo_validate, which expects the
ttm dma_resv to be held.
Acquire the locks in amdgpu_amdkfd_gpuvm_dmaunmap_mem.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 2 +-
On 10/10/2023 9:40 AM, Philip Yang wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
Remove prange validate_timestamp which is not accurate for multiple
GPUs.
Use the bitmap_mapped flag to skip the
On 10/10/2023 9:40 AM, Philip Yang wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
Replace prange->mapped_to_gpu with prange->bitmap_mapped[], which is per
GPU flag and based on prange granularity,
On 10/10/2023 9:40 AM, Philip Yang wrote:
Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.
If using sdma update GPU page table, kfd flush tlb does nothing if vm
update fence callback doesn't update
It's not enabled in hardware so the code is dead.
Remove it.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 86 +-
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 56 -
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 83
When the CPU is XGMI connected, the PCIe links should
not be enumerated for topology purposes. However, PCIe
transfer should still be a valid option for memory attachment
that requires it.
Move the XGMI connection check out of the shared helper
function amdgpu_device_is_peer_accessible and into
dmaunmap can call ttm_bo_validate, which expects the
ttm dma_resv to be held.
Acquire the locks in amdgpu_amdkfd_gpuvm_dmaunmap_mem.
Signed-off-by: David Francis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 12 +++-
Add support to load P2S tables through PSP.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 27 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 6 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 1 +
3 files changed, 34 insertions(+)
diff --git
Add P2S table load support on SMU v13.0.6 ASICs.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 7 ++
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 71 +++
2 files changed, 78 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
Adds FW id for P2S table.
Signed-off-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
index dfd60db97012..4bb5e10217bb 100644
---
On Wed, Oct 11, 2023 at 3:52 AM Jesse Zhang wrote:
>
> Temporary workaround to fix issues observed in some compute applications
> when GFXOFF is enabled on GFX9.
>
> Signed-off-by: Jesse Zhang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 4
> 1 file changed, 4 insertions(+)
>
>
[AMD Official Use Only - General]
Reviewed-by: Asad Kamal
Thanks & Regards
Asad
-Original Message-
From: Gadre, Mangesh
Sent: Wednesday, October 11, 2023 3:11 PM
To: amd-gfx@lists.freedesktop.org; Zhang, Hawking ;
Lazar, Lijo ; Ma, Le ; Zhang, Morris
; Kamal, Asad
Cc: Gadre,
On 10/11/2023 2:55 PM, Asad Kamal wrote:
Expose ras table version & schema info to sysfs
v2: Updated schema to get poison support info
from ras context, removed asic specific checks
Signed-off-by: Asad Kamal
One nit inline. With/without that change,
Reviewed-by: Lijo Lazar
---
This reverts commit 3cf01336313894419498a0d5eb367f092a436195.
XCP_CTL register is programmed by firmware and
register access is protected.
Signed-off-by: Mangesh Gadre
Reviewed-by: Lijo Lazar
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 23 +++
1 file changed, 11
Expose ras table version & schema info to sysfs
v2: Updated schema to get poison support info
from ras context, removed asic specific checks
Signed-off-by: Asad Kamal
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 51 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 3 ++
2
Temporary workaround to fix issues observed in some compute applications
when GFXOFF is enabled on GFX9.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
In radeon_tv_get_modes(), the return value of drm_cvt_mode()
is assigned to mode, which will lead to a NULL pointer
dereference on failure of drm_cvt_mode(). Add a check to
avoid null point dereference.
Signed-off-by: Ma Ke
---
drivers/gpu/drm/radeon/radeon_connectors.c | 2 ++
1 file changed,
[AMD Official Use Only - General]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Lazar, Lijo
Sent: Wednesday, October 11, 2023 14:51
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Wang, Yang(Kevin)
Subject: [PATCH] drm/amdgpu: Read
PSP OS updates the version information in register. On APUs with PSPv13,
PSP OS will already be loaded with SBIOS. Hence use the version register
instead of using information in driver binary header.
Signed-off-by: Lijo Lazar
Reviewed-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c |
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