RE: [PATCH] drm/amdgpu: fix uninitialized scalar variable warning

[Public] > -Original Message- > From: Wang, Yang(Kevin) > Sent: Tuesday, April 30, 2024 12:14 PM > To: Huang, Tim ; amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander ; Koenig, Christian > > Subject: RE: [PATCH] drm/amdgpu: fix uninitialized scalar variable warning > > [Public] > >

RE: [PATCH] drm/amdgpu: fix uninitialized scalar variable warning

[Public] -Original Message- From: amd-gfx On Behalf Of Huang, Tim Sent: Tuesday, April 30, 2024 11:32 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Koenig, Christian Subject: RE: [PATCH] drm/amdgpu: fix uninitialized scalar variable warning [Public] [Public] Ping ...

RE: [PATCH 1/2] drm/amd/pm: fix uninitialized variable warnings for vega10_hwmgr

[AMD Official Use Only - General] Series is Reviewed-by: Yang Wang Best Regards, Kevin -Original Message- From: amd-gfx On Behalf Of Huang, Tim Sent: Tuesday, April 30, 2024 11:28 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Koenig, Christian Subject: RE: [PATCH

RE: [PATCH] drm/amdgpu: fix uninitialized scalar variable warning

[Public] Ping ... > -Original Message- > From: Huang, Tim > Sent: Friday, April 26, 2024 9:14 AM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander ; Koenig, Christian > ; Huang, Tim > Subject: [PATCH] drm/amdgpu: fix uninitialized scalar variable warning > > Clear warning

RE: [PATCH 1/2] drm/amd/pm: fix uninitialized variable warnings for vega10_hwmgr

[AMD Official Use Only - General] Ping ... > -Original Message- > From: Huang, Tim > Sent: Sunday, April 28, 2024 4:45 PM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander ; Koenig, Christian > ; Huang, Tim > Subject: [PATCH 1/2] drm/amd/pm: fix uninitialized variable

RE: [PATCH 2/3] drm/amd/pm: fix the Out-of-bounds read warning

[Public] This patch is, Reviewed-by: Tim Huang Best Regards, Tim Huang > -Original Message- > From: Jesse Zhang > Sent: Friday, April 26, 2024 3:29 PM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander ; Koenig, Christian > ; Huang, Tim ; Zhang, > Jesse(Jie) ; Zhang,

RE: [PATCH 1/3 V2] drm/amd/pm: Fix negative array index read warning for pptable->DpmDescriptor

[Public] This patch is, Reviewed-by: Tim Huang Best Regards, Tim Huang > -Original Message- > From: Jesse Zhang > Sent: Sunday, April 28, 2024 5:38 PM > To: amd-gfx@lists.freedesktop.org > Cc: Deucher, Alexander ; Koenig, Christian > ; Huang, Tim ; Zhang, > Jesse(Jie) ; Zhang,

RE: [PATCH 1/3 V2] drm/amd/pm: Fix negative array index read warning for pptable->DpmDescriptor

[AMD Official Use Only - General] Ping ... -Original Message- From: Jesse Zhang Sent: Sunday, April 28, 2024 5:38 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Koenig, Christian ; Huang, Tim ; Zhang, Jesse(Jie) ; Zhang, Jesse(Jie) Subject: [PATCH 1/3 V2] drm/amd/pm:

Re: [PATCH 2/3] drm/amdgpu: Reduce mem_type to domain double indirection

On 2024-04-29 12:47, Tvrtko Ursulin wrote: From: Tvrtko Ursulin All apart from AMDGPU_GEM_DOMAIN_GTT memory domains map 1:1 to TTM placements. And the former be either AMDGPU_PL_PREEMPT or TTM_PL_TT, depending on AMDGPU_GEM_CREATE_PREEMPTIBLE. Simplify a few places in the code which convert

Re: [PATCH] drm/amdkfd: update buffer_{store,load}_* modifiers for gfx940

On 2024-04-29 17:50, Jay Cornwall wrote: On 4/29/2024 06:06, Lancelot SIX wrote: Instruction modifiers of the untyped vector memory buffer instructions (MUBUF encoded) changed in gfx940.  The slc, scc and glc modifiers have been replaced with sc0, sc1 and nt. The current CWSR trap handler is

Re: [PATCH] drm/amdkfd: update buffer_{store,load}_* modifiers for gfx940

On 4/29/2024 06:06, Lancelot SIX wrote: Instruction modifiers of the untyped vector memory buffer instructions (MUBUF encoded) changed in gfx940. The slc, scc and glc modifiers have been replaced with sc0, sc1 and nt. The current CWSR trap handler is written using pre-gfx940 modifier names,

Re: [PATCH v2 2/2] drm/amdgpu/pm: Fix uninitialized variable warning

[AMD Official Use Only - General] Series is: Acked-by: Alex Deucher From: Ma, Jun Sent: Monday, April 29, 2024 3:58 AM To: amd-gfx@lists.freedesktop.org Cc: Feng, Kenneth ; Deucher, Alexander ; Wang, Yang(Kevin) ; Koenig, Christian ; Ma, Jun Subject: [PATCH

[linux-next:master] BUILD REGRESSION b0a2c79c6f3590b74742cbbc76687014d47972d8

tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: b0a2c79c6f3590b74742cbbc76687014d47972d8 Add linux-next specific files for 20240429 Error/Warning reports: https://lore.kernel.org/oe-kbuild-all/20240429.kkvw8mvg-...@intel.com https

AMD Dell m18 r1/7600XT Laptop Issue dcn31_panel_cntl_construct+0x49/0x60 [amdgpu]

is this a bug or a support issue for this laptop? [4.739919] [ cut here ] [4.739920] WARNING: CPU: 17 PID: 551 at drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_panel_cntl.c:172 dcn31_panel_cntl_construct+0x49/0x60 [amdgpu] [4.740183] Modules linked in:

[PATCH v2 2/2] drm/amd/display: Move PRIMARY plane zpos higher

From: Leo Li [Why] Compositors have different ways of assigning surfaces to DRM planes for render offloading. It may decide between various strategies: overlay, underlay, or a mix of both (see here for more info: https://gitlab.freedesktop.org/emersion/libliftoff/-/issues/76) One way for

[PATCH v2 1/2] drm/amd/display: Introduce overlay cursor mode

From: Leo Li [Why] DCN is the display hardware for amdgpu. DRM planes are backed by DCN hardware pipes, which carry pixel data from one end (memory), to the other (output encoder). Each DCN pipe has the ability to blend in a cursor early on in the pipeline. In other words, there are no

Re: [PATCH 2/2] drm/amdkfd: Allow memory oversubscription on small APUs

On 2024-04-29 06:38, Yu, Lang wrote: [Public] -Original Message- From: Kuehling, Felix Sent: Saturday, April 27, 2024 6:45 AM To: Yu, Lang ; amd-gfx@lists.freedesktop.org Cc: Yang, Philip ; Koenig, Christian ; Zhang, Yifan ; Liu, Aaron Subject: Re: [PATCH 2/2] drm/amdkfd: Allow

RE: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5

[AMD Official Use Only - General] Reviewed-by: Ruijing Dong ruijing.d...@amd.com Thanks, Ruijing From: amd-gfx On Behalf Of Jiang, Sonny Sent: Monday, April 29, 2024 9:49 AM To: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH v3] drm/amdgpu: IB test encode test

[PATCH 1/3] drm/amdgpu: Add amdgpu_bo_is_vm_bo helper

From: Tvrtko Ursulin Help code readability by replacing a bunch of: bo->tbo.base.resv == vm->root.bo->tbo.base.resv With: amdgpu_vm_is_bo_always_valid(vm, bo) No functional changes. v2: * Rename helper and move to amdgpu_vm. (Christian) Signed-off-by: Tvrtko Ursulin Cc: Christian König

[PATCH 2/3] drm/amdgpu: Reduce mem_type to domain double indirection

From: Tvrtko Ursulin All apart from AMDGPU_GEM_DOMAIN_GTT memory domains map 1:1 to TTM placements. And the former be either AMDGPU_PL_PREEMPT or TTM_PL_TT, depending on AMDGPU_GEM_CREATE_PREEMPTIBLE. Simplify a few places in the code which convert the TTM placement into a domain by checking

[PATCH 3/3] drm/amdgpu: Describe preemptible objects in debugfs

From: Tvrtko Ursulin Instead of mixing them together with regular system memory objects mark them explicitly as 'PREEMPTIBLE'. Signed-off-by: Tvrtko Ursulin Cc: Christian König Cc: Felix Kuehling --- No idea on the name to use.. :) --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 +++ 1

Re: [PATCH] drm/amd/display: Add MSF panel to DPCD 0x317 patch list

Applied. Thanks! On Fri, Mar 8, 2024 at 8:58 PM wrote: > > From: Tobias Jakobi > > This 8.4 inch panel is integrated in the Ayaneo Kun handheld > device. The panel resolution is 2560×1600, i.e. it has > portrait dimensions. > > Decoding the EDID shows: > Manufacturer: MSF > Model: 4099 >

Re: [PATCH] drm/amd/display: Remove duplicate dcn401/dcn401_clk_mgr.h header

Applied. Thanks! On Wed, Apr 24, 2024 at 11:42 PM Jiapeng Chong wrote: > > ./drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c: > dcn401/dcn401_clk_mgr.h is included more than once. > > Reported-by: Abaci Robot > Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=8885 >

Re: [PATCH] drm/amd/display: Remove duplicate spl/dc_spl_types.h header

Applied. Thanks! On Wed, Apr 24, 2024 at 9:52 PM Jiapeng Chong wrote: > > ./drivers/gpu/drm/amd/display/dc/inc/hw/transform.h: spl/dc_spl_types.h is > included more than once. > > Reported-by: Abaci Robot > Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=8884 > Signed-off-by: Jiapeng

Re: [PATCH] drm/amdgpu: Fix signedness bug in sdma_v4_0_process_trap_irq()

Applied. Thanks! On Sun, Apr 28, 2024 at 9:32 PM Zhou, Bob wrote: > > [Public] > > Reviewed-by: Bob Zhou > > Regards, > Bob > > -Original Message- > From: Dan Carpenter > Sent: 2024年4月28日 20:57 > To: Zhou, Bob > Cc: Deucher, Alexander ; Koenig, Christian > ; Pan, Xinhui ; David

Re: [PATCH] Revert "drm/amd/pm: fixes a random hang in S4 for SMU v13.0.4/11"

On 4/29/2024 08:38, Alex Deucher wrote: This reverts commit 31729e8c21ecfd671458e02b6511eb68c2225113. This causes problems with reboots/shutdowns for some users. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3351 Signed-off-by: Alex Deucher Cc: Tim Huang It would be unfortunate

[PATCH 04/11] drm/amdgpu/mes12: add mes mapping legacy queue support

From: Jack Xiao Add mes12 map legacy queue packet submission. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 26 ++ 1 file changed, 26 insertions(+) diff --git

[PATCH 08/11] drm/amdgpu: add module parameter 'amdgpu_uni_mes'

From: Jack Xiao Add module parameter 'amdgpu_uni_mes' to enable/disable unified mes fw support. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 ++

[PATCH 11/11] drm/amdgpu/discovery: add mes v12_0 ip block

From: Likun Gao Add mes v12_0 ip block. v2: squash in update (Alex) v3: rebase on unified mes changes (Alex) Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 9 + 1 file changed, 9 insertions(+)

[PATCH 10/11] drm/amdgpu/discovery: add gfx v12_0 ip block

From: Likun Gao Add gfx v12_0 ip block. v2: Squash in update (Alex) v3: add exp flag (Alex) Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 7 +++ 1 file changed, 7 insertions(+) diff --git

[PATCH 09/11] drm/amdgpu/mes12: disable logging output

From: Jack Xiao Random page fault was oberserved, temporarily disable mes log buffer output. Signed-off-by: Jack Xiao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 06/11] drm/amdgpu: Disable unmapped doorbell handling basic mode on mes 12

From: shaoyunl The new mechanism for unmapped doorbell handling requires both driver side and MES fw side change. The FW side changes are still not released. Signed-off-by: shaoyunl Reviewed-by: Harish Kasiviswanthan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

[PATCH 05/11] drm/amdgpu/gfx: enable mes to map legacy queue support

From: Jack Xiao Enable mes to map legacy queue support. v2: drop unused gfx_v12_0_kiq_enable_kgq() (Alex) Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 39 +

[PATCH 07/11] drm/amdgpu/mes12: add legacy setting hw resource interface

From: Jack Xiao For unified mes fw, add the legacy interface to set hardware resources. v2: remove warning (Alex) Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c| 22 +--

[PATCH 03/11] drm/amdgpu/mes12: enable uni_mes fw on mes pipe0

From: Jack Xiao Enable the unified mes firmware on mes pipe0. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 51 +++--- 1 file changed, 38 insertions(+), 13 deletions(-) diff --git

[PATCH 01/11] drm/amdgpu/mes: add uni_mes fw loading support

From: Jack Xiao Add the unified mes firmware loading support. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 5 - 2 files changed, 5 insertions(+), 1 deletion(-)

[PATCH 02/11] drm/amdgpu/mes12: add uni_mes fw loading support

From: Jack Xiao Add the unified mes firmware loading support. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

[PATCH 11/14] drm/amdkfd: fix NULL ptr for debugfs mqds on GFX v12

From: Eric Huang mqd_stride function in gfx v12 is not implemented, that causes NULL ptr error. Add the generic func to fix it. Signed-off-by: Eric Huang Reviewed-by: Harish Kasiviswanathan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c | 3 +++ 1 file

[PATCH 10/14] drm/amdkfd: enable single alu ops for gfx12

From: Jonathan Kim GFX12 debugging requires setting up precise ALU operation for catching ALU exceptions. Signed-off-by: Jonathan Kim Tested-by: Lancelot Six Reviewed-by: Eric Huang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdkfd/kfd_debug.c| 15 +--

[PATCH 05/14] drm/amdkfd: save and restore barrier state for gfx12

From: Lancelot SIX Add support to save and restore the work group barrier state in gfx12 CWSR trap handler. There is no support to directly restore the signal count of a barrier state, so instead this patch repeatedly calls s_barrier_signal to increment the signal count to the desired value.

[PATCH 14/14] drm/amdkfd: mark GFX12 system and peer GPU memory mappings as MTYPE_NC

From: Sreekant Somasekharan Due to a HW bug, the system memory mappings and peer GPU mappings on GFX12 need to be marked as MTYPE_NC. Cc: Joe Greathouse Cc: David Belanger Signed-off-by: Rajneesh Bhardwaj Signed-off-by: Sreekant Somasekharan Reviewed-by: Harish Kasiviswanathan

[PATCH 09/14] drm/amdkfd: fix support for trap on wave start and end for gfx12

From: Jonathan Kim Similar to GFX11, GFX12 supports trapping on wave start and end. Signed-off-by: Jonathan Kim Signed-off-by: Alex Deucher --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c| 48 +-- 1 file changed, 43 insertions(+), 5 deletions(-) diff --git

[PATCH 12/14] drm/amdkfd: Enable atomic support for GFX12

From: David Belanger Enable flag in KFD and set the atomic support bit in MQD. Signed-off-by: David Belanger Reviewed-by: Harish Kasiviswanathan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 ++ drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c | 3 +++

[PATCH 07/14] drm/amdkfd: Enable GFX12 trap handler

From: David Belanger Updated switch statement to use GFX12 trap handler. Signed-off-by: David Belanger Reviewed-by: Harish Kasiviswanathan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdkfd/kfd_device.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git

[PATCH 13/14] drm/amd/amdkfd: Add GFX12 PTE flag to SVM get PTE function

From: Sreekant Somasekharan Add new GFX12 PTE flag AMDGPU_PTE_IS_PTE to svm_range_get_pte_flags function. This resolves the issues related to SVM enablement in GFX12. Signed-off-by: Sreekant Somasekharan Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher ---

[PATCH 01/14] drm/amdkfd: Added device queue manager files for GFX12.

From: David Belanger Initial implementation, based on GFX11. v2: squash in include fix from David (Alex) Signed-off-by: David Belanger Reviewed-by: Harish Kasiviswanathan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdkfd/Makefile | 1 +

[PATCH 06/14] drm/amdkfd: enable missed single-step workaround for gfx12

From: Laurent Morichetti When trap_ctrl.trap_after_inst is set, it is possible for a wave to enter the trap handler, after single-stepping an instruction and a save_context is raised, with only save_context set in excp_flag_priv. Because excp_flag_priv.trap_after_inst is not reliably set, we

[PATCH 08/14] drm/amdkfd: always enable ttmp setup for gfx12

From: Jonathan Kim Similar to GFX11, always enable the setup of trap temporaries on GFX12. Signed-off-by: Jonathan Kim Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 1 +

[PATCH 04/14] drm/amdkfd: Add gfx12 trap handler support

From: Jay Cornwall - HWREG changes since gfx11 - Save/restore barrier state - get_wave_size is now reserved by assembler v2: rebase (Alex) Signed-off-by: Jay Cornwall Reviewed-by: Harish Kasiviswanathan Signed-off-by: Alex Deucher --- .../gpu/drm/amd/amdkfd/cwsr_trap_handler.h| 465

[PATCH 03/14] drm/amdkfd: Move trap handler coherence flags to preprocessor

From: Jay Cornwall No functional change. Preparation for gfx12 support. v2: drop unrelated change (Alex) Signed-off-by: Jay Cornwall Reviewed-by: Harish Kasiviswanathan Signed-off-by: Alex Deucher --- .../amd/amdkfd/cwsr_trap_handler_gfx10.asm| 127 +- 1 file changed,

[PATCH 02/14] drm/amdkfd: Added gfx_v12_kfd2kgd interface for GFX12.

From: David Belanger Initial implementation, based on GFX11. v2: Removed functions not needed by cp scheduler. v3: Fixed typos. v4: squash in warning fix (Alex) Signed-off-by: David Belanger Acked-by: Jonathan Kim Reviewed-by: Harish Kasiviswanathan Signed-off-by: Alex Deucher ---

Re: [PATCH 3/3] drm/amdgpu: Fix pinned GART area accounting and fdinfo reporting

On 2024-04-29 5:43, Tvrtko Ursulin wrote: On 26/04/2024 23:24, Felix Kuehling wrote: On 2024-04-26 12:43, Tvrtko Ursulin wrote: From: Tvrtko Ursulin When commit b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible SG BOs") added a new TTM region it missed to notice the conceptual

[PATCH 26/31] drm/amdgpu: fix active rb and cu number for gfx12

From: Likun Gao Correct the algorithm of active CU and RB to bypass the disabled SA for gfx12. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 81 +- 1 file changed, 55 insertions(+), 26

[PATCH 20/31] drm/amd: Move fw init from sw_init to early_init for imu v12

From: Likun Gao Move microcode loading from sw_init to early_init to align with the perious version of imu init sequence. Signed-off-by: Likun Gao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 16 1 file changed, 8 insertions(+), 8 deletions(-)

[PATCH 28/31] drm/amdgpu: init gfxhub setting to align with mmhub

From: Likun Gao Align gfxhub settings with mmhub when program rlc ram. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/imu_v12_0.c | 39 ++ 1 file changed, 39 insertions(+) diff --git

[PATCH 11/31] drm/amdgpu: Enable MES to handle doorbell ring on unmapped queue

From: shaoyunl On MES12, HW can monitor up to 2048 doorbells that not be mapped currently and trigger the interrupt to MES when these unmapped doorbell been ringed. Signed-off-by: shaoyunl Reviewed-by: Felix Kuehling Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c |

[PATCH 21/31] drm/amd/amdgpu: workaround for the imu fw loading

From: Kenneth Feng workaournd for the imu fw loading on gfx 12.0 without psp Signed-off-by: Kenneth Feng Reviewed-by: Likun Gao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/imu_v12_0.c | 5 + 1 file changed, 5 insertions(+) diff --git

[PATCH 22/31] drm/amdgpu: set different fw data addr for mec pipe

From: Likun Gao For MEC fw data, different pipe should programed into different address. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff

[PATCH 31/31] drm/amdgpu: Enable event log on MES 12

From: shaoyunl Enable event log through the HW specific FW API Signed-off-by: shaoyunl Reviewed-by: Harish Kasiviswanthan Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

[PATCH 17/31] drm/amdgpu: skip imu related function if dpm=0

From: Likun Gao Only execute IMU related functions if dpm>0. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git

[PATCH 23/31] drm/amd/amdgpu: update GFX12 wave data registers

From: Tom St Denis Signed-off-by: Tom St Denis Reviewed-by: Jonathan Kim Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c

[PATCH 27/31] drm/amdgpu: skip dpm check to init imu fw

From: Likun Gao Skip dpm check to init imu firmware for imu v12. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 19/31] drm/amdgpu: support S fw load for gfx v12

From: Likun Gao Support Save & Restore related fw load with backdoor RLC autoload type on gfx v12. Signed-off-by: Likun Gao Reviewed-by: Kenneth Feng Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 16 1 file changed, 16 insertions(+) diff --git

[PATCH 15/31] drm/amdgpu: set cp fw address set for gfx v12

From: Likun Gao Split PFF/ME/MEC firmware address setting function from related load microcode funtion, as it's also needed for rlc autolad. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 186

[PATCH 25/31] drm/amdgpu: use new method to program rlc ram

From: Likun Gao Program rlc ram with golden setting data instead. The old method (program_imu_rlc_ram_old) should be retired in the future. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/imu_v12_0.c | 70

[PATCH 24/31] drm/amd/amdgpu: add cgcg interface for gfx 12.0

From: Kenneth Feng add cgcg interface for gfx 12.0 Signed-off-by: Kenneth Feng Reviewed-by: Likun Gao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 190 - drivers/gpu/drm/amd/amdgpu/soc24.c | 3 + 2 files changed, 191 insertions(+), 2

[PATCH 18/31] drm/amdgpu/gfx12: recalculate available compute rings to use

From: Jack Xiao Recalculate the number of compute rings to use based on the gfx hardware configuration. As needed reserve half of compute rings for mes, kgd can't use up all compute rings. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher ---

[PATCH 06/31] drm/amdgpu: Add mes_v12_api_def.h for gfx12

From: Harish Kasiviswanathan Add MES_v12 header definition for gfx12 v2: Modify SET_SHADER_DEBUGGER to match mes_v11 definition. This doesn't change the structure layout v3: Removed unncessary comment and spaces Signed-off-by: Harish Kasiviswanathan Signed-off-by: Alex Deucher ---

[PATCH 30/31] drm/amdgpu: Enable unmapped doorbell handling basic mode on mes 12

From: shaoyunl Enable basic mode handling for doorbell ring on unmapped CP queue. In this mode, MES can start schedule the queue mapping based on HW interrupt instead of timer. Signed-off-by: shaoyunl Reviewed-by: Harish Kasiviswanthan Signed-off-by: Alex Deucher ---

[PATCH 29/31] drm/amdgpu: Switch to smuio func to get gpu clk counter

From: Hawking Zhang Switch to smuio callback to query gpu clock counter Signed-off-by: Hawking Zhang Reviewed-by: Likun Gao Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git

[PATCH 02/31] drm/amdgpu/discovery: Set GC family for GC 12.0 IP

From: Likun Gao Set GC family for GC 12.0 IPs. v2: squash in updates (Alex) Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 4 1 file changed, 4 insertions(+) diff --git

Re: [PATCH 3/3] drm/amdgpu: Fix pinned GART area accounting and fdinfo reporting

On 2024-04-29 9:45, Tvrtko Ursulin wrote: On 29/04/2024 12:11, Christian König wrote: Am 29.04.24 um 11:43 schrieb Tvrtko Ursulin: On 26/04/2024 23:24, Felix Kuehling wrote: On 2024-04-26 12:43, Tvrtko Ursulin wrote: From: Tvrtko Ursulin When commit b453e42a6e8b ("drm/amdgpu: Add new

[PATCH 16/31] drm/amd/amdgpu: imu fw loading support

From: Kenneth Feng support imu related function for gfx v12. Signed-off-by: Kenneth Feng Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/Makefile| 3 +- drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 4 +-

[PATCH 12/31] drm/amdgpu: fix trap enablement for gfx12

From: Jonathan Kim Fix request to MES to set SQ_SHADER_TBA_HI.trap_en for GFX12. Signed-off-by: Jonathan Kim Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c

[PATCH 13/31] drm/amdgpu/mes12: update data cache boundary

From: Jack Xiao Enlarge the data cache boundary. v2: use the fix data cache boundary. Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH 01/31] drm/amdgpu: Add gfx v12_0_0 family id

From: Likun Gao Add gfx v12_0_0 family id Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- include/uapi/drm/amdgpu_drm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index

[PATCH 08/31] drm/amdgpu: Add mes v12_0 ip block support (v4)

From: Jack Xiao v1: Add mes v12_0 ip block support. (Jack) v2: Switch to gfx.kiq array. (Hawking) v3: Switch to AMDGPU_GFXHUB(0). (Hawking) v4: Rebase (Alex) Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Hawking Zhang Signed-off-by: Alex Deucher ---

[PATCH 10/31] drm/amdgpu: enable mes v12 self test

From: Jack Xiao 1. fix available compute queue to use 2. enable mes v12 self test Signed-off-by: Jack Xiao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 2 +- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 6 ++ 2 files changed, 7

[PATCH 09/31] drm/amdgpu: set mes fw address for mes v12

From: Likun Gao Split the function of mes fimrware address setting from mes firmware load for mes v12, as it's also needed for rlc autoload. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 37

[PATCH 07/31] drm/amdgpu: init mes ucode name for gfx v12

From: Likun Gao Keep gfx v12 mes fw name to gc_12_x_x_mes.bin and gc_12_x_x_mes1.bin. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH 05/31] drm/amdgpu: add rlc TOC header file for soc24

From: Likun Gao Add RLC autoload TOC header file for soc24 ASIC. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h | 47 + 1 file changed, 47 insertions(+) diff --git

[PATCH 04/31] drm/amdgpu: add new TOC structure

From: Likun Gao Add new RLC_TABLE_OF_CONTENT structure definition. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h | 27 + 1 file changed, 27 insertions(+) diff --git

[PATCH 03/31] drm/amdgpu: add gfx12 clearstate header

From: Likun Gao Add gfx12 clearstate register arrays. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/clearstate_gfx12.h | 121 ++ 1 file changed, 121 insertions(+) create mode 100644

RE: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5

[AMD Official Use Only - General] Reviewed-by: Leo Liu > -Original Message- > From: amd-gfx On Behalf Of Sonny > Jiang > Sent: Thursday, April 25, 2024 4:11 PM > To: amd-gfx@lists.freedesktop.org > Cc: Jiang, Sonny ; Jiang, Sonny > > Subject: [PATCH v3] drm/amdgpu: IB test encode test

Re: [PATCH v3] drm/amdgpu: Fix the uninitialized variable warning

On Fri, Apr 26, 2024 at 5:57 AM Ma Jun wrote: > > Check the user input and phy_id value range to fix > "Using uninitialized value phy_id" > > Signed-off-by: Ma Jun Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c | 4 > 1 file changed, 4 insertions(+)

Re: [PATCH 1/3] drm/amdgpu: Add amdgpu_bo_is_vm_bo helper

Am 29.04.24 um 15:34 schrieb Tvrtko Ursulin: On 29/04/2024 12:02, Christian König wrote: Am 26.04.24 um 18:43 schrieb Tvrtko Ursulin: From: Tvrtko Ursulin Help code readability by replacing a bunch of: bo->tbo.base.resv == vm->root.bo->tbo.base.resv With: amdgpu_bo_is_vm_bo(bo, vm) No

Re: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5

[AMD Official Use Only - General] Ping. Sonny From: Jiang, Sonny Sent: Thursday, April 25, 2024 4:12 PM To: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5 By tests, I didn't find error on VCN1 to

Re: [PATCH] drm/amd/pm: fix uninitialized variable warning for smu_v13

On Mon, Apr 29, 2024 at 3:52 AM Tim Huang wrote: > > Clear warning that using uninitialized variable when the dpm is > not enabled and reuse the code for SMU13 to get the boot frequency. > > Signed-off-by: Tim Huang Acked-by: Alex Deucher > --- > drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h

[PATCH] Revert "drm/amd/pm: fixes a random hang in S4 for SMU v13.0.4/11"

This reverts commit 31729e8c21ecfd671458e02b6511eb68c2225113. This causes problems with reboots/shutdowns for some users. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3351 Signed-off-by: Alex Deucher Cc: Tim Huang --- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c | 12

Re: [PATCH] drm/amdgpu/vpe: fix vpe dpm clk ratio setup failed

On Mon, Apr 29, 2024 at 3:07 AM Peyton Lee wrote: > > Some version of BIOS does not enable all clock levels, > resulting in high level clock frequency of 0. > The number of valid CLKs must be confirmed in advance. > > Signed-off-by: Peyton Lee Acked-by: Alex Deucher > --- >

RE: [PATCH 00/46] DC Patches April 29, 2024

[Public] Hi all, This week this patchset was tested on the following systems: * Lenovo ThinkBook T13s Gen4 with AMD Ryzen 5 6600U * MSI Gaming X Trio RX 6800 * Gigabyte Gaming OC RX 7900 XTX These systems were tested on the following display/connection types: *

Re: [PATCH 3/3] drm/amdgpu: Fix pinned GART area accounting and fdinfo reporting

On 26/04/2024 23:24, Felix Kuehling wrote: On 2024-04-26 12:43, Tvrtko Ursulin wrote: From: Tvrtko Ursulin When commit b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible SG BOs") added a new TTM region it missed to notice the conceptual imbalance in GART pin size accounting as

Re: [PATCH] drm/amdgpu: fix doorbell regression

Am 29.04.24 um 14:50 schrieb Shashank Sharma: This patch adds a missed handling of PL domain doorbell while handling VRAM faults. Fixes: a6ff969fe9cb ("drm/amdgpu: fix visible VRAM handling during faults") Cc: Christian Koenig Cc: Alex Deucher Signed-off-by: Shashank Sharma Signed-off-by:

[PATCH] drm/amdgpu: fix doorbell regression

This patch adds a missed handling of PL domain doorbell while handling VRAM faults. Fixes: a6ff969fe9cb ("drm/amdgpu: fix visible VRAM handling during faults") Cc: Christian Koenig Cc: Alex Deucher Signed-off-by: Shashank Sharma Signed-off-by: Arvind Yadav ---

Re: [PATCH 3/3] drm/amdgpu: Fix pinned GART area accounting and fdinfo reporting

Am 29.04.24 um 11:43 schrieb Tvrtko Ursulin: On 26/04/2024 23:24, Felix Kuehling wrote: On 2024-04-26 12:43, Tvrtko Ursulin wrote: From: Tvrtko Ursulin When commit b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible SG BOs") added a new TTM region it missed to notice the

[PATCH] drm/amdkfd: update buffer_{store, load}_* modifiers for gfx940

Instruction modifiers of the untyped vector memory buffer instructions (MUBUF encoded) changed in gfx940. The slc, scc and glc modifiers have been replaced with sc0, sc1 and nt. The current CWSR trap handler is written using pre-gfx940 modifier names, making the source incompatible with a strict

Re: [PATCH 3/3] drm/amdgpu: Fix pinned GART area accounting and fdinfo reporting

Am 26.04.24 um 18:43 schrieb Tvrtko Ursulin: From: Tvrtko Ursulin When commit b453e42a6e8b ("drm/amdgpu: Add new placement for preemptible SG BOs") added a new TTM region it missed to notice the conceptual imbalance in GART pin size accounting as done in amdgpu_bo_pin/unpin. That imbalance

Re: [PATCH 2/3] drm/amdgpu: Reduce mem_type to domain double indirection

Am 26.04.24 um 18:43 schrieb Tvrtko Ursulin: From: Tvrtko Ursulin All apart from AMDGPU_GEM_DOMAIN_GTT memory domains map 1:1 to TTM placements. And the former be either AMDGPU_PL_PREEMPT or TTM_PL_TT, depending on AMDGPU_GEM_CREATE_PREEMPTIBLE. Simplify a few places in the code which convert

Re: [PATCH 1/3] drm/amdgpu: Add amdgpu_bo_is_vm_bo helper

Am 26.04.24 um 18:43 schrieb Tvrtko Ursulin: From: Tvrtko Ursulin Help code readability by replacing a bunch of: bo->tbo.base.resv == vm->root.bo->tbo.base.resv With: amdgpu_bo_is_vm_bo(bo, vm) No functional changes. Ah,yes that was on my TODO list as well. But I would have rather added

RE: [PATCH 1/2] drm/amdkfd: Let VRAM allocations go to GTT domain on small APUs

[Public] >-Original Message- >From: Kuehling, Felix >Sent: Saturday, April 27, 2024 6:52 AM >To: Yu, Lang ; amd-gfx@lists.freedesktop.org >Cc: Yang, Philip ; Koenig, Christian >; Zhang, Yifan ; Liu, >Aaron >Subject: Re: [PATCH 1/2] drm/amdkfd: Let VRAM allocations go to GTT >domain on

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