From: Jing Zhou
[Why]
DP1.2 LL CTS test failure.
[How]
The failure is caused by not verify stream link is equal
to link, only check stream and link is not null.
Signed-off-by: Jing Zhou
Reviewed-by: Wenjing Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core
on Linux, only DCN+
Signed-off-by: Krunoslav Kovac
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c | 5 -
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h | 2 ++
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu
c data.
Signed-off-by: Lewis Huang
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/core/dc_link_ddc.c | 87 +--
.../gpu/drm/amd/display/dc/inc/dc_link_ddc.h | 3 +
2 files changed, 63 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/d
.
[How] Add a condition to check if timing sync is disabled so that
synchronized vblank can be set to false.
Signed-off-by: Jaehyun Chung
Reviewed-by: Alvin Lee
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
From: Dmytro Laktyushkin
Remove code used to allow compilation error free
interface change.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 29
1 file changed, 29 deletions
DC inclusion from module.
-Filter out problematic types and inclusions
Signed-off-by: Bayan Zabihiyan
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +-
drivers/gpu/drm/amd/display/dc/dc_dsc.h | 14 +++-
drivers/gpu/drm/amd/display
From: Qingqing Zhuo
Signed-off-by: Qingqing Zhuo
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
.../amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c | 8
.../display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c| 8
.../drm/amd/display/dc/dml
-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 105 ++--
drivers/gpu/drm/amd/display/dc/dc_stream.h| 18 +
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 576 +-
.../gpu/drm/amd/display/dc/inc
From: Vitaly Prosyak
[Why & How]
Use dcn2 blender, shaper, 3dlut registers
Signed-off-by: Vitaly Prosyak
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
Acked-by: Vitaly Prosyak
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_dpp.h | 84 +++
.../drm/amd/display/dc/d
Leung
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 14 --
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h| 16
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
index cb20d10288c0
Summary Of Changes
*add surface registers
*underflow fixes
*i2c/aux refactors
*DSC fixes
Alvin Lee (1):
drm/amd/display: Don't allocate payloads if link lost
Anthony Koo (1):
drm/amd/display: 3.2.49
Bayan Zabihiyan (1):
drm/amd/display: Isolate DSC module from driver dependencies
From: Alvin Lee
We should not allocate payloads if the link is lost until the link is retrained.
Some displays require this.
Signed-off-by: Alvin Lee
Reviewed-by: Wenjing Liu
Acked-by: Bhawanpreet Lakha
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 10 +-
drivers/gpu/drm/amd
From: Ilya Bakoulin
[Why]
DML diags tests are failing because the struct contents get
clobbered by a memcpy.
[How]
Remove the memcpy call.
Signed-off-by: Ilya Bakoulin
Reviewed-by: Dmytro Laktyushkin
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 1
. Offset calculations are tweaked for non-rotated
cursor hotspot and width/height.
Signed-off-by: Jaehyun Chung
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 13 +++
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 34
.
[How]
- add relevant fields to shift / mask initialization
Signed-off-by: Joshua Aberback
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/dce/dce_hwseq.h| 43 ---
1 file changed, 17 insertions(+), 26 deletions(-)
diff --git a/drivers
From: Derek Lai
[Why]
We should be using the ddc_num from res_caps. As the
pipe count != number of i2c resources.
[How]
Use ddc_num from res_cap instead of pipe count.
Signed-off-by: Derek Lai
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dce
-by: Bhawanpreet Lakha
---
.../dc/dml/dcn20/display_mode_vba_20v2.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 22455db54980
From: Dmytro Laktyushkin
Need to memset all odm pipes when calling dc_remove_stream_from_ctx
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 65 +--
1 file changed, 32 insertions
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index
Reviewed-by: Charlene Liu
Reviewed-by: Eric Yang
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20
-by: Jun Lei
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 1 +
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 54 +--
2 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers
From: David Francis
DRM provides drm_dp_mst_dump_topology, which prints
useful information about MST devices
Hook this up to a debugfs file named amdgpu_mst_topology
Signed-off-by: David Francis
Acked-by: Bhawanpreet Lakha
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 24
From: Dmytro Laktyushkin
Update bw validation to use prev and next odm pipe pointers
for populating dml inputs.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 40 +--
1 file changed
From: Charlene Liu
[Description]
OS will reserve HW state in UEFI mode.
Driver init_hw reset to RGB which caused HDMI green in YCbCr mode.
read HW blank_color based on acc_mode.
Signed-off-by: Charlene Liu
Reviewed-by: Dmytro Laktyushkin
Acked-by: Bhawanpreet Lakha
---
.../amd/display/dc
From: Jaehyun Chung
[How] Allocate memory for default page and program memory block addr
into default page addr register.
Signed-off-by: Jaehyun Chung
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display
From: Bayan Zabihiyan
[Why]
We need to have the ability to to tell us set degamma on the cursor.
[How]
Pass a flag down to register programming that tells us if the
current surface format needs cursor degamma.
Signed-off-by: Bayan Zabihiyan
Reviewed-by: Krunoslav Kovac
Acked-by: Bhawanpreet
From: Wyatt Wood
[Why]
A recent bug showed that logging would be useful in debugging
various gamma issues.
[How]
Add logging in dc.
Fix formatting for easier graphing.
Signed-off-by: Wyatt Wood
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc/dcn10
From: Dmytro Laktyushkin
dcn20 requires special casing for odm.
This change treats odm as alternative to mpc tree on dcn20.
This is planned to be fixed in a future refactor
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd
and freesync will work.
Signed-off-by: Yogesh Mohan Marimuthu
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
b/drivers/gpu/drm/amd
for V_TOTAL_CONTROL.
Signed-off-by: Bayan Zabihiyan
Reviewed-by: Charlene Liu
Acked-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 +++-
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 2 ++
.../drm/amd/display/dc/dce110/dce110_hw_sequencer.c
From: Nikola Cornij
[why]
num_slices_h was not being checked
[How]
Fix the typo and check num_slices_h
Signed-off-by: Nikola Cornij
Reviewed-by: Harry Wentland
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 +-
1 file changed, 1 insertion(+), 1
From: Charlene Liu
[Description]
port spdif fix to staging:
spdif hardwired to afmt inst 1.
spdif func pointer
spdif resource allocation (reserve last audio endpoint for spdif only)
Signed-off-by: Charlene Liu
Reviewed-by: Dmytro Laktyushkin
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm
-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 11 ---
1 file changed, 11 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index
From: Anthony Koo
Signed-off-by: Anthony Koo
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index
Othman
Reviewed-by: Chris Park
Acked-by: Ahmad Othman
Acked-by: Bhawanpreet Lakha
---
.../amd/display/modules/freesync/freesync.c | 276 --
.../amd/display/modules/inc/mod_freesync.h| 2 +
.../amd/display/modules/inc/mod_info_packet.h | 2 +-
.../display/modules
From: Qingqing Zhuo
[Why]
This function is not being used, it was left in
when introducing DCN2
[How]
Remove the function
Signed-off-by: Qingqing Zhuo
Reviewed-by: Eric Bernstein
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c | 1 -
drivers/gpu/drm/amd
-by: Zi Yu Liao
Reviewed-by: Eric Yang
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index
From: Dmytro Laktyushkin
ODM next and prev pipe were missing from dc_copy_state
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Nikola Cornij
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 ++
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2
-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c
index 379c9e4ac63b..c4f861e6bd53 100644
--- a/drivers/gpu/drm/amd
From: Qingqing Zhuo
IEEE OUI will now be used while referring to certain vendors.
instead of normal index
Signed-off-by: Qingqing Zhuo
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/core/dc_link_ddc.c | 2 +-
.../gpu/drm/amd/display/dc/core
From: Ilya Bakoulin
Set the writeback Hratio and Vratio in dml.
Signed-off-by: Ilya Bakoulin
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc
From: Joseph Gravenor
add new function to get the voltage at the end of
dcn_validate_bandwidth, to check against the
highest voltage we allow.
Created a stub to allow for optimizations
Signed-off-by: Joseph Gravenor
Reviewed-by: Eric Yang
Acked-by: Bhawanpreet Lakha
Acked-by: Sun peng Li
2.3.
Signed-off-by: Josip Pavic
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
.../amd/display/modules/power/power_helpers.c | 121 --
1 file changed, 109 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
b/drivers
From: Dmytro Laktyushkin
A previous odm change broke stream enable by always setting
n_multiply as if odm was on.
This fixes the check for odm by making sure opp count is >1
rather than not 0.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet La
From: Wyatt Wood
Adding NULL checks to various parameters in log_tf, to avoid
nullptr errors
Signed-off-by: Wyatt Wood
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
Acked-by: Nikola Cornij
---
.../gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c| 9 ++---
1 file changed, 6
and move the part
of the code that free acquired resources to outside where to keep or to
free resources is actually determined
Signed-off-by: Su Sung Chung
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 ++-
drivers/gpu/drm/amd/display/dc
Summary Of Changes
*ODM fixes
*Gamma logging
*DSC fixes
Ahmad Othman (1):
drm/amd/display: Refactoring VTEM
Anthony Koo (2):
drm/amd/display: 3.2.47
drm/amd/display: 3.2.48
Bayan Zabihiyan (2):
drm/amd/display: add Cursor Degamma logic for DCN2
drm/amd/display: Expose OTG_V_TOTAL_MID
From: Dmytro Laktyushkin
Currently odm is handled using top_bottom pipe by special casing
the differing opps to differentiate from mpc combine.
Since top/bottom pipe list was made to track mpc muxing this creates
difficulties in adding a 4 pipe odm case support.
Rather than continue using mpc
, and replace with a comment describing
why it returns zero.
Signed-off-by: Julian Parkin
Reviewed-by: Wenjing Liu
Acked-by: Bhawanpreet Lakha
---
.../bios/dce110/command_table_helper_dce110.c | 36 +++
.../dce112/command_table_helper2_dce112.c | 36 +++
.../bios
be applied after HUBP powers back on again.
Signed-off-by: Zi Yu Liao
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 10807fa46ad6..202e092f8ecf 100644
--- a/drivers/gpu/drm/amd
-by: Bhawanpreet Lakha
---
.../display/dc/clk_mgr/dcn10/rv1_clk_mgr.c| 14 +++
.../display/dc/dce110/dce110_hw_sequencer.c | 25 +--
2 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c
b/drivers/gpu/drm/amd
From: abdoulaye berthe
[Description]
The spec does not allow POST_LT_ADJ_GRANTED to be set when TPS4 is used.
Signed-off-by: abdoulaye berthe
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 56 ++-
1 file changed, 31 insertions(+), 25
earlier.
Signed-off-by: Anthony Koo
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 42 ++-
1 file changed, 32 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd
near degamma -> CTM -> linear regamma -> RGB to YUV (709) -> ...
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Sun peng Li
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 32 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 10 +-
.
, something that can't currnetly be done with the
framework for stream updates.
[How]
Duplicate the framework used for surface updates for stream updates
as well. Copy all the updates after checking the update type.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Harry Wentland
Acked-by: Bhawanpreet
From: Jordan Lazare
[Why]
VBios sometimes reports incorrect object type as encoder instead of
connector
[How]
Change error message to debug message
Signed-off-by: Jordan Lazare
Reviewed-by: Harry Wentland
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2
the bit.
Signed-off-by: Thomas Lim
Reviewed-by: Eric Yang
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 32 ++-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.h | 2 ++
.../drm/amd/display/dc/dcn10
From: Charlene Liu
Signed-off-by: Charlene Liu
Reviewed-by: Chris Park
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c | 4 +---
drivers/gpu/drm/amd/display/dc/dce/dce_audio.h | 7 +++
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 3f22212437ca
Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/Makefile | 4 +-
.../drm/amd/display/dc/core/dc_vm_helper.c| 123 --
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 2 +
.../gpu/drm/amd/display
From: Derek Lai
1. Add i2c_hw_Status check to make sure when HW i2c is in use.
2. Don't reset HW engine in is_hw_busy() and instead do this in
process_transaction() because SW i2c does not check if hw i2c is in use
Signed-off-by: Derek Lai
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
From: Eric Bernstein
No need to assert just return
Signed-off-by: Eric Bernstein
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 7ec6884acee4
From: Krunoslav Kovac
Using this logic breaks driver unload, this is a temporary fix
a followup patch will properly fix this
Signed-off-by: Krunoslav Kovac
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/modules/color/color_gamma.c | 6 ++
1 file
From: Wesley Chalmers
[WHY]
By the time output csc matrix is being programmed, stream connection to
OPP has been established, but this information has not been relayed back
to HUBP.
Signed-off-by: Wesley Chalmers
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
Acked-by: Krunoslav Kovac
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 59a9e1ea806d
From: Chris Park
These are no longer needed, Also added RESERVED bits.
Signed-off-by: Chris Park
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
Acked-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 1 -
drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
is an RGB256 identity
and the new logical identity will inidicate
that the given gamma ramp regardless of its
type is identity.
Signed-off-by: Harmanprit Tatla
Reviewed-by: Krunoslav Kovac
Acked-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc_hw_types.h
From: Wesley Chalmers
[WHY]
This is meant to make it clearer that 0xf is not a valid OPP ID, and
that code making use of OPP IDs should not accept this value.
Signed-off-by: Wesley Chalmers
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dcn10
to decide whether to power off edp.
Signed-off-by: SivapiriyanKumarasamy
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
Acked-by: Reza Amini
---
.../display/dc/dce110/dce110_hw_sequencer.c | 35 ++-
1 file changed, 26 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm
0 is
unknown, and pass that value on to the reported link rate.
This re-introduces behaviour present in previous versions that appears
to have been accidentally removed.
Signed-off-by: Wesley Chalmers
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core
From: "Tao.Huang"
Signed-off-by: Tao.Huang
Reviewed-by: Jun Lei
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/
Summary Of Changes
*Rework CRTC color management
*Add underflow asserts
*i2c fix
*gamma fixes
Anthony Koo (1):
drm/amd/display: fix issue with eDP not detected on driver load
Aric Cyr (3):
drm/amd/display: 3.2.33
drm/amd/display: 3.2.34
drm/amd/display: 3.2.35
Charlene Liu (2):
From: Charlene Liu
Implement floor, ceil, and fabs
Signed-off-by: Charlene Liu
Reviewed-by: Charlene Liu
Acked-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc/calcs/dcn_calc_math.c | 20 +++
.../drm/amd/display/dc/calcs/dcn_calc_math.h | 3 +++
.../drm/amd/display/dc/dml
This fixes the warning below
error: ‘ret’ may be used uninitialized in this function
[-Werror=maybe-uninitialized]
int xgmi_tx_link, ret;
^~~
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
S_LOW_MASK) |
~^
(((uint64_t)feature_mask[1] << SMU_FEATURES_HIGH_SHIFT) &
SMU_FEATURES_HIGH_MASK));
~~~~~~
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/po
From: Wesley Chalmers
[WHY]
DCN code should make as few references to DCE as possible
[HOW]
Copy DCE110 implementation of find_first_free_match_stream_enc_for_link
into DCN10
Signed-off-by: Wesley Chalmers
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
.../drm/amd/display/dc/dcn10
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 8795e29ea888
raw for determining FAST vs MEDIUM. It's too
fragile to changes like this.
Explicitly specify the update type per update flag instead. It's not
as clever as checking the bits itself but at least it's correct.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: Harry Wentland
Acked-by: Bhawanpreet La
From: Joshua Aberback
Signed-off-by: Joshua Aberback
Reviewed-by: Abdoulaye Berthe
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 6 +++---
drivers/gpu/drm/amd/display/dc/dc_types.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git
From: Aric Cyr
DPRX should send the VCP extended colorimetry packet if the
sink supports DPCD rev1.4 and reports the extended colorimetry
bit.
Signed-off-by: Aric Cyr
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c | 4
-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dce/dce_abm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
index da96229db53a..2959c3c9390b 100644
--- a/drivers/gpu/drm/amd/display/dc/dce
params"
- call it after calling "program_global_sync"
- make sure it's called after because it relies on the cached dlg params
Signed-off-by: Joshua Aberback
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
Acked-by: Jun Lei
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c |
From: Wesley Chalmers
[WHY]
From DCE110 onward, we have the ability to assign DIG BE and FE
separately for any display connector type; before, we could only do this
for DP.
Signed-off-by: Wesley Chalmers
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/core
From: Dmytro Laktyushkin
* add plane state null checks
* add and set update surface flags
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 ++
.../gpu/drm/amd/display/dc/core/dc_resource.c
-off-by: Chiawen Huang
Reviewed-by: Tony Cheng
Acked-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 3 +++
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 4
drivers/gpu/drm/amd/display/dc/dc_link.h
From: Aric Cyr
Signed-off-by: Aric Cyr
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index fb573f483cb5
From: Jun Lei
move the update of otg instance outside of hw programming logic,
since this is sw state, it should always be updated and should
never be optimized away.
Signed-off-by: Jun Lei
Reviewed-by: Eric Yang
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 4
From: Charlene Liu
add these parameters for future use
Signed-off-by: Charlene Liu
Reviewed-by: Dmytro Laktyushkin
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/display
-by: SivapiriyanKumarasamy
Reviewed-by: Anthony Koo
Acked-by: Bhawanpreet Lakha
---
.../display/dc/dce110/dce110_hw_sequencer.c | 85 ---
1 file changed, 35 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
b/drivers/gpu/drm/amd
From: Vitaly Prosyak
[Why & How]
Reuse existent code path and in order to do that apply de gamma
in 1D blender LUT and re use MPC OGAM.
Follow up is required.
Signed-off-by: Vitaly Prosyak
Reviewed-by: Aric Cyr
Acked-by: Bhawanpreet Lakha
Acked-by: Krunoslav Kovac
Acked-by: Vitaly Pro
.
The logic should be the same as DCE and DCN with some minor register
naming differences.
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: David Francis
Acked-by: Bhawanpreet Lakha
---
.../dc/dce120/dce120_timing_generator.c | 89 +++
1 file changed, 89 insertions(+)
diff --git
Summary Of Changes
* CRC capture for dce112
* EDID read refactor
* Explicit update type for planes
Aric Cyr (3):
drm/amd/display: 3.2.30
drm/amd/display: Use VCP for extended colorimetry
drm/amd/display: 3.2.31
Charlene Liu (2):
drm/amd/display: define v_total_min and max parameters
From: Joshua Aberback
Add a fast_validate parameter in dc_validate_global_state for future use
Change-Id: If7a7ea618ba85bdddc8ee4419cd01e2fae3fda93
Signed-off-by: Joshua Aberback
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
From: Dmytro Laktyushkin
This function needs to re-calculate the scaling on the pipe
that loses it's half.
Change-Id: I448583eb13f17f868377aab2b1a5d68beb43989f
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Eric Bernstein
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/core
: I25f32ff13d1e81e20eea233ffdddadf704ecd8d2
Signed-off-by: Nicholas Kazlauskas
Reviewed-by: David Francis
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 56 +++
1 file changed, 44 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
ble in debugger to turn on measuring).
Change-Id: I828306882837c77c92a66f5c2b9d2de296685416
Signed-off-by: Joshua Aberback
Reviewed-by: Tony Cheng
Acked-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 18 +++
drivers/gpu/drm/amd/display/dc/dc.h |
: I6bbc31b03ef35a3b8f8469ab2a633895f2590cef
Signed-off-by: Roman Li
Reviewed-by: David Francis
Acked-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu
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