RE: [PATCH] drm/amdgpu/powerplay:avoid to show invalid DPM table info

2020-04-17 Thread Dai, Yuxian (David)
[AMD Official Use Only - Internal Distribution Only] On Fri, Apr 17, 2020 at 10:58:59AM +0800, Yuxian Dai wrote: > for different ASIC support different the number of DPM levels, we > should avoid to show the invalid level value. > v1 -> v2: > follow the suggestion,clarifiy the description

RE: [PATCH] drm/amdgpu/powerplay:avoid to show invalid DPM table info

2020-04-16 Thread Dai, Yuxian (David)
[AMD Official Use Only - Internal Distribution Only] On Wed, Apr 15, 2020 at 07:20:31PM +0800, Yuxian Dai wrote: > we should avoid to show the invalid level value when the DPM_LEVELS > supported number changed > > Signed-off-by: Yuxian Dai > Change-Id: Ib66d0cf34a866fa6f0cedd1d5fc642f59236787d

RE: [PATCH] drm/amdgpu: unify fw_write_wait for new gfx9 asics

2020-04-08 Thread Dai, Yuxian (David)
[AMD Official Use Only - Internal Distribution Only] -Original Message- From: Liu, Aaron Sent: Wednesday, April 8, 2020 2:46 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Huang, Ray ; Dai, Yuxian (David) ; Liu, Aaron Subject: [PATCH] drm/amdgpu: unify fw_write_wait

RE: [PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK

2020-04-02 Thread Dai, Yuxian (David)
[AMD Official Use Only - Internal Distribution Only] On Wed, Apr 01, 2020 at 07:41:12PM +0800, Yuxian Dai wrote: > 1.Using the FCLK DPM table to set the MCLK for DPM states consist of > three entities: > FCLK > UCLK > MEMCLK > All these three clk change together, MEMCLK from FCLK, so use the

RE: [PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK

2020-04-01 Thread Dai, Yuxian (David)
[AMD Official Use Only - Internal Distribution Only] 1,Using the FCLK DPM table to set the MCLK for DPM states consist of three entities: FCLK UCLK MEMCLK All these three clk change together, MEMCLK from FCLK, so use the fclk frequency. 2,we should show the current working clock freqency from

RE: [PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK for DPM states consist of three entities :FCLK, UCLK, MEMCLK all these three clk change together , MEMCLK from FCLK.

2020-03-31 Thread Dai, Yuxian (David)
[AMD Official Use Only - Internal Distribution Only] On Tue, Mar 31, 2020 at 09:41:44AM -0400, Alex Deucher wrote: > On Tue, Mar 31, 2020 at 6:10 AM Yuxian Dai wrote: > > > > From: "yuxia...@amd.com" > > Your patch title is too long; it is basically the whole patch > description rather than

RE: [PATCH] drm/amd/powerplay: suppress nonsupport profile mode overrun message

2019-12-18 Thread Dai, Yuxian (David)
: Thursday, December 19, 2019 3:17 PM To: Dai, Yuxian (David) Cc: Liang, Prike ; amd-gfx@lists.freedesktop.org; Quan, Evan Subject: Re: [PATCH] drm/amd/powerplay: suppress nonsupport profile mode overrun message [AMD Official Use Only - Internal Distribution Only] On Thu, Dec 19, 2019 at 03:04:

RE: [PATCH] drm/amd/powerplay: suppress nonsupport profile mode overrun message

2019-12-18 Thread Dai, Yuxian (David)
ber 19, 2019 2:46 PM To: amd-gfx@lists.freedesktop.org Cc: Quan, Evan ; Huang, Ray ; Dai, Yuxian (David) ; Liang, Prike Subject: [PATCH] drm/amd/powerplay: suppress nonsupport profile mode overrun message SMU12 not support WORKLOAD_DEFAULT_BIT and WORKLOAD_PPLIB_POWER_SAVING_BIT. Signed