On Thu, 15 Feb 2024, Ilpo Järvinen wrote:
> Convert open coded RMW accesses for LNKCTL2 to use
> pcie_capability_clear_and_set_word() which makes its easier to
> understand what the code tries to do.
>
> LNKCTL2 is not really owned by any driver because it is a collection of
On Thu, 15 Feb 2024, Deucher, Alexander wrote:
> [Public]
>
> > -Original Message-
> > From: Ilpo Järvinen
> > Sent: Thursday, February 15, 2024 8:32 AM
> > To: Deucher, Alexander ; amd-
> > g...@lists.freedesktop.org; Daniel Vetter ; David Airli
have support for proper locking for a selected set of registers
(LNKCTL2 is not yet among them but likely will be in the future) to
avoid losing concurrent updates.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/radeon/cik.c | 40
have support for proper locking for a selected set of registers
(LNKCTL2 is not yet among them but likely will be in the future) to
avoid losing concurrent updates.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Reviewed-by: Dean Luick
---
drivers/infiniband/hw/hfi1/pcie.c | 30
separately to reduce the size of the
BW controller series.
[1]
https://lore.kernel.org/linux-pci/20240105112547.7301-1-ilpo.jarvi...@linux.intel.com/
Ilpo Järvinen (3):
drm/radeon: Use RMW accessors for changing LNKCTL2
drm/amdgpu: Use RMW accessors for changing LNKCTL2
RDMA/hfi1: Use RMW
have support for proper locking for a selected set of registers
(LNKCTL2 is not yet among them but likely will be in the future) to
avoid losing concurrent updates.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/amd/amdgpu/cik.c | 41
is also useful as
a cleanup.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/amd/amdgpu/cik.c | 41
drivers/gpu/drm/amd/amdgpu/si.c | 41
2 files changed, 30 insertions(+), 52 deletions(-)
diff --git
is also useful as
a cleanup.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/radeon/cik.c | 40 ++--
drivers/gpu/drm/radeon/si.c | 40 ++--
2 files changed, 30 insertions(+), 50 deletions(-)
diff --git
On Mon, 30 Oct 2023, Ma Jun wrote:
> Add documentation about AMD's Wifi band RFI mitigation (WBRF) mechanism
> explaining the theory and how it is used.
>
> Signed-off-by: Ma Jun
> ---
> Documentation/driver-api/wbrf.rst | 76 +++
> 1 file changed, 76 insertions(+)
On Tue, 14 Nov 2023, Mario Limonciello wrote:
> pci_is_thunderbolt_attached() looks at the hierarchy of the PCIe device
> to determine if any bridge along the way has the is_thunderbolt bit set.
> This bit will only be set when one of the devices in the hierarchy is an
> Intel Thunderbolt device.
#if defined(CONFIG_PCIEPORTBUS) || defined(CONFIG_EEH)
> void pci_uevent_ers(struct pci_dev *pdev, enum pci_ers_result err_type);
> #endif
>
Reviewed-by: Ilpo Järvinen
--
i.
On Tue, 14 Nov 2023, Mario Limonciello wrote:
> The logic to calculate bandwidth limits may be used at multiple call sites
> so split it up into its own static function instead.
>
> No intended functional changes.
>
> Suggested-by: Ilpo Järvinen
> Signed-off-by: Mario Li
0644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -441,6 +441,7 @@ struct pci_dev {
> unsigned intis_hotplug_bridge:1;
> unsigned intshpc_managed:1; /* SHPC owned by shpchp */
> unsigned intis_thunderbolt:1; /* Thunderbolt controller */
> + unsigned intno_command_complete:1; /* No command completion */
> /*
>* Devices marked being untrusted are the ones that can potentially
>* execute DMA attacks and similar. They are typically connected
>
Reviewed-by: Ilpo Järvinen
--
i.
On Fri, 3 Nov 2023, Mario Limonciello wrote:
> The USB4 spec specifies that PCIe ports that are used for tunneling
> PCIe traffic over USB4 fabric will be hardcoded to advertise 2.5GT/s and
> behave as a PCIe Gen1 device. The actual performance of these ports is
> controlled by the fabric
On Fri, 3 Nov 2023, Mario Limonciello wrote:
> All callers have switched to dev_is_removable() for detecting
> hotpluggable PCIe devices.
>
> Signed-off-by: Mario Limonciello
> ---
> include/linux/pci.h | 22 --
> 1 file changed, 22 deletions(-)
>
> diff --git
On Fri, 3 Nov 2023, Mario Limonciello wrote:
> pci_is_thunderbolt_attached() only works for Intel TBT devices. Switch to
> using dev_is_removable() to be able to detect USB4 devices as well.
Please extend this with more details. I had to lookup the TBT change to
be able to make any guess why
On Fri, 3 Nov 2023, Mario Limonciello wrote:
> commit 493fb50e958c ("PCI: pciehp: Assume NoCompl+ for Thunderbolt
> ports") added a check into pciehp code to explicitly set NoCompl+
> for all Intel Thunderbolt controllers, including those that don't
> need it.
>
> This overloaded the purpose of
On Fri, 3 Nov 2023, Mario Limonciello wrote:
> pci_is_thunderbolt_attached() only works for Intel TBT devices. Switch to
> using dev_is_removable() to be able to detect USB4 devices as well.
Same here as with 1/9.
--
i.
> Signed-off-by: Mario Limonciello
> ---
>
On Thu, 2 Nov 2023, Johannes Berg wrote:
> On Thu, 2023-11-02 at 13:55 +0200, Ilpo Järvinen wrote:
>
> > > +static void get_chan_freq_boundary(u32 center_freq, u32 bandwidth, u64
> > > *start, u64 *end)
> > > +{
> > > + bandwidth = MHZ_TO_KHZ(ba
On Mon, 30 Oct 2023, Ma Jun wrote:
> From: Evan Quan
>
> To support the WBRF mechanism, Wifi adapters utilized in the system must
> register the frequencies in use (or unregister those frequencies no longer
> used) via the dedicated calls. So that, other drivers responding to the
> frequencies
d-sfh-hid/sfh1_1/amd_sfh_interface.h
> index 9d31d5b510eb..78e22850417a 100644
> --- a/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.h
> +++ b/drivers/hid/amd-sfh-hid/sfh1_1/amd_sfh_interface.h
> @@ -151,4 +151,5 @@ struct hpd_status {
>
> void sfh_interface_init(struct amd_mp2_dev *mp2);
> void amd_sfh1_1_set_desc_ops(struct amd_mp2_ops *mp2_ops);
> +int amd_sfh_float_to_int(u32 flt32_val);
> #endif
Reviewed-by: Ilpo Järvinen
--
i.
On Wed, 18 Oct 2023, Shyam Sundar S K wrote:
> In order to provide GPU inputs to TA for the Smart PC solution to work, we
> need to have interface between the PMF driver and the AMDGPU driver.
>
> Add the initial code path for get interface from AMDGPU.
>
> Co-developed-by: Mario Limonciello
>
On Wed, 18 Oct 2023, Shyam Sundar S K wrote:
> From: Basavaraj Natikar
>
> AMDSFH has information about the User presence information via the Human
> Presence Detection (HPD) sensor which is part of the AMD sensor fusion hub.
> Add PMF and AMDSFH interface to get this information.
>
>
On Wed, 18 Oct 2023, Shyam Sundar S K wrote:
> PMF driver sends constant inputs to TA which its gets via the other
> subsystems in the kernel. To debug certain TA issues knowing what inputs
> being sent to TA becomes critical. Add debug facility to the driver which
> can isolate Smart PC and TA
t_bios_buffer(struct amd_pmf_dev
> *dev)
>
> memcpy(dev->policy_buf, dev->policy_base, dev->policy_sz);
>
> + amd_pmf_hex_dump_pb(dev);
> if (pb_side_load)
> amd_pmf_open_pb(dev, dev->dbgfs_dir);
Reviewed-by: Ilpo Järvinen
--
i.
On Wed, 18 Oct 2023, Shyam Sundar S K wrote:
> A policy binary is OS agnostic, and the same policies are expected to work
> across the OSes. At times it becomes difficult to debug when the policies
> inside the policy binaries starts to misbehave. Add a way to sideload such
> policies
On Wed, 18 Oct 2023, Shyam Sundar S K wrote:
> On 10/18/2023 2:50 PM, Ilpo Järvinen wrote:
> > On Wed, 18 Oct 2023, Shyam Sundar S K wrote:
> >
> >> In order to provide GPU inputs to TA for the Smart PC solution to work, we
> >> need to have interface between the
On Tue, 17 Oct 2023, Ma Jun wrote:
> From: Evan Quan
>
> To support the WBRF mechanism, Wifi adapters utilized in the system must
> register the frequencies in use(or unregister those frequencies no longer
> used) via the dedicated calls. So that, other drivers responding to the
> frequencies
On Tue, 17 Oct 2023, Ma Jun wrote:
> Add documentation about AMD's Wifi band RFI mitigation (WBRF) mechanism
> explaining the theory and how it is used.
>
> Signed-off-by: Ma Jun
> ---
> Documentation/driver-api/wbrf.rst | 73 +++
> 1 file changed, 73 insertions(+)
On Tue, 17 Oct 2023, Ma Jun wrote:
> From: Evan Quan
>
> The newly added WBRF feature needs this interface for channel
> width calculation.
>
> Signed-off-by: Ma Jun
> Signed-off-by: Evan Quan
>
> --
> v8->v9:
> - correct typo(Mhz -> MHz) (Johnson)
> ---
> include/net/cfg80211.h | 8
On Tue, 17 Oct 2023, Ma Jun wrote:
> From: Evan Quan
>
> To support the WBRF mechanism, Wifi adapters utilized in the system must
> register the frequencies in use(or unregister those frequencies no longer
Space is missing.
--
i.
On Tue, 17 Oct 2023, Ma Jun wrote:
> From: Evan Quan
>
> Fulfill the SMU13.0.7 support for Wifi RFI mitigation feature.
>
> Signed-off-by: Evan Quan
> Reviewed-by: Mario Limonciello
> Signed-off-by: Ma Jun
> --
> v10->v11:
> - downgrade the prompt level on message failure(Lijo)
> ---
>
On Tue, 17 Oct 2023, Ma Jun wrote:
> Due to electrical and mechanical constraints in certain platform designs
> there may be likely interference of relatively high-powered harmonics of
> the (G-)DDR memory clocks with local radio module frequency bands used
> by Wifi 6/6e/7.
>
> To mitigate
On Tue, 17 Oct 2023, Ma Jun wrote:
> From: Evan Quan
>
> With WBRF feature supported, as a driver responding to the frequencies,
> amdgpu driver is able to do shadow pstate switching to mitigate possible
> interference(between its (G-)DDR memory clocks and local radio module
> frequency bands
On Tue, 17 Oct 2023, Ma Jun wrote:
> From: Evan Quan
>
> Fulfill the SMU13.0.0 support for Wifi RFI mitigation feature.
>
> Signed-off-by: Evan Quan
> Reviewed-by: Mario Limonciello
> Signed-off-by: Ma Jun
> --
> v10->v11:
> - downgrade the prompt level on message failure(Lijo)
> ---
>
On Tue, 10 Oct 2023, Shyam Sundar S K wrote:
> PMF driver sends changing inputs from each subystem to TA for evaluating
> the conditions in the policy binary.
>
> Add initial support of plumbing in the PMF driver for Smart PC to get
> information from other subsystems in the kernel.
>
>
On Tue, 10 Oct 2023, Shyam Sundar S K wrote:
> On 10/10/2023 6:38 PM, Ilpo Järvinen wrote:
> > On Tue, 10 Oct 2023, Shyam Sundar S K wrote:
> >
> >> Sometimes policy binary retrieved from the BIOS maybe incorrect that can
> >> end up in failing to ena
On Tue, 10 Oct 2023, Shyam Sundar S K wrote:
> Sometimes policy binary retrieved from the BIOS maybe incorrect that can
> end up in failing to enable the Smart PC solution feature.
>
> Use print_hex_dump_debug() to dump the policy binary in hex, so that we
> debug the issues related to the
On Mon, 9 Oct 2023, Shyam Sundar S K wrote:
> On 10/4/2023 5:44 PM, Ilpo Järvinen wrote:
> > On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> >
> >> PMF driver sends changing inputs from each subystem to TA for evaluating
> >> the conditions in the policy bina
On Mon, 9 Oct 2023, Shyam Sundar S K wrote:
>
>
> On 10/4/2023 4:20 PM, Ilpo Järvinen wrote:
> > On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> >
> >> AMD PMF driver loads the PMF TA (Trusted Application) into the AMD
> >> ASP's (AMD Security Proces
On Mon, 9 Oct 2023, Shyam Sundar S K wrote:
> On 10/4/2023 6:19 PM, Ilpo Järvinen wrote:
> > On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> >
> >> In order to provide GPU inputs to TA for the Smart PC solution to work, we
> >> need to have interface between the
On Mon, 9 Oct 2023, Shyam Sundar S K wrote:
> On 10/4/2023 5:30 PM, Ilpo Järvinen wrote:
> > On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> >
> >> PMF Policy binary is a encrypted and signed binary that will be part
> >> of the BIOS. PMF driver via the AC
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> AMD PMF driver loads the PMF TA (Trusted Application) into the AMD
> ASP's (AMD Security Processor) TEE (Trusted Execution Environment).
>
> PMF Trusted Application is a secured firmware placed under
> /lib/firmware/amdtee gets loaded only when the
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> AMD PMF driver loads the PMF TA (Trusted Application) into the AMD
> ASP's (AMD Security Processor) TEE (Trusted Execution Environment).
>
> PMF Trusted Application is a secured firmware placed under
> /lib/firmware/amdtee gets loaded only when the
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> Sometimes policy binary retrieved from the BIOS maybe incorrect that can
> end up in failing to enable the Smart PC solution feature.
>
> Use print_hex_dump_debug() to dump the policy binary in hex, so that we
> debug the issues related to the
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> PMF driver sends constant inputs to TA which its gets via the other
> subsystems in the kernel. To debug certain TA issues knowing what inputs
> being sent to TA becomes critical. Add debug facility to the driver which
> can isolate Smart PC and TA
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> PMF driver based on the output actions from the TA can request to update
> the system states like entering s0i3, lock screen etc. by generating
> an uevent. Based on the udev rules set in the userspace the event id
> matching the uevent shall get
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> PMF Policy binary is a encrypted and signed binary that will be part
> of the BIOS. PMF driver via the ACPI interface checks the existence
> of Smart PC bit. If the advertised bit is found, PMF driver walks
> the acpi namespace to find out the policy
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> In the current code, the metrics table information was required only
> for auto-mode or CnQF at a given time. Hence keeping the return type
> of amd_pmf_set_dram_addr() as static made sense.
>
> But with the addition of Smart PC builder feature, the
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> In order to provide GPU inputs to TA for the Smart PC solution to work, we
> need to have interface between the PMF driver and the AMDGPU driver.
>
> Add the initial code path for get interface from AMDGPU.
>
> Co-developed-by: Mario Limonciello
>
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> PMF driver sends changing inputs from each subystem to TA for evaluating
> the conditions in the policy binary.
>
> Add initial support of plumbing in the PMF driver for Smart PC to get
> information from other subsystems in the kernel.
>
>
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> PMF TA (Trusted Application) loads via the TEE environment into the
> AMD ASP.
>
> PMF-TA supports two commands:
> 1) Init: Initialize the TA with the PMF Smart PC policy binary and
> start the policy engine. A policy is a combination of inputs and
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> PMF TA (Trusted Application) loads via the TEE environment into the
> AMD ASP.
>
> PMF-TA supports two commands:
> 1) Init: Initialize the TA with the PMF Smart PC policy binary and
> start the policy engine. A policy is a combination of inputs and
On Sat, 30 Sep 2023, Shyam Sundar S K wrote:
> On 9/26/2023 10:38 PM, Ilpo Järvinen wrote:
> > On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> >
> >> PMF driver sends changing inputs from each subystem to TA for evaluating
> >> the conditions in the policy bina
is also useful as
a cleanup.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/amd/amdgpu/cik.c | 41
drivers/gpu/drm/amd/amdgpu/si.c | 41
2 files changed, 30 insertions(+), 52 deletions(-)
diff --git
is also useful as
a cleanup.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/radeon/cik.c | 40 ++--
drivers/gpu/drm/radeon/si.c | 40 ++--
2 files changed, 30 insertions(+), 50 deletions(-)
diff --git
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> From: Basavaraj Natikar
>
> AMDSFH has information about the Ambient light via the Ambient
> Light Sensor (ALS) which is part of the AMD sensor fusion hub.
> Add PMF and AMDSFH interface to get this information.
>
> Co-developed-by: Shyam Sundar S
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> From: Basavaraj Natikar
>
> AMDSFH has information about the User presence information via the Human
> Presence Detection (HPD) sensor which is part of the AMD sensor fusion hub.
> Add PMF and AMDSFH interface to get this information.
>
>
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> For the Smart PC Solution to fully work, it has to enact to the actions
> coming from TA. Add the initial code path for set interface to AMDGPU.
>
> Co-developed-by: Mario Limonciello
> Signed-off-by: Mario Limonciello
> Signed-off-by: Shyam
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> In order to provide GPU inputs to TA for the Smart PC solution to work, we
> need to have interface between the PMF driver and the AMDGPU driver.
>
> Add the initial code path for get interface from AMDGPU.
>
> Co-developed-by: Mario Limonciello
>
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> A policy binary is OS agnostic, and the same policies are expected to work
> across the OSes. At times it becomes difficult to debug when the policies
> inside the policy binaries starts to misbehave. Add a way to sideload such
> policies
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> P3T (Peak Package Power Limit) is a metric within the SMU controller
> that can influence the power limits. Add support from the driver
> to update P3T limits accordingly.
>
> Reviewed-by: Mario Limonciello
> Signed-off-by: Shyam Sundar S K
> ---
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> PMF driver based on the output actions from the TA can request to update
> the system states like entering s0i3, lock screen etc. by generating
> an uevent. Based on the udev rules set in the userspace the event id
> matching the uevent shall get
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> PMF driver sends constant inputs to TA which its gets via the other
> subsystems in the kernel. To debug certain TA issues knowing what inputs
> being sent to TA becomes critical. Add debug facility to the driver which
> can isolate Smart PC and TA
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> PMF Policy binary is a encrypted and signed binary that will be part
> of the BIOS. PMF driver via the ACPI interface checks the existence
> of Smart PC bit. If the advertised bit is found, PMF driver walks
> the acpi namespace to find out the policy
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> PMF driver sends changing inputs from each subystem to TA for evaluating
> the conditions in the policy binary.
>
> Add initial support of plumbing in the PMF driver for Smart PC to get
> information from other subsystems in the kernel.
>
>
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> PMF Policy binary is a encrypted and signed binary that will be part
> of the BIOS. PMF driver via the ACPI interface checks the existence
> of Smart PC bit. If the advertised bit is found, PMF driver walks
> the acpi namespace to find out the policy
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> AMD PMF driver loads the PMF TA (Trusted Application) into the AMD
> ASP's (AMD Security Processor) TEE (Trusted Execution Environment).
>
> PMF Trusted Application is a secured firmware placed under
> /lib/firmware/amdtee gets loaded only when the
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> amd_pmf_dbgfs_register() needs to be called before amd_pmf_init_features().
Please answer to why? question too here.
> Hence change the sequence.
>
> Reviewed-by: Mario Limonciello
> Signed-off-by: Shyam Sundar S K
> ---
>
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
> PMF TA (Trusted Application) loads via the TEE environment into the
> AMD ASP.
>
> PMF-TA supports two commands:
> 1) Init: Initialize the TA with the PMF Smart PC policy binary and
> start the policy engine. A policy is a combination of inputs and
On Fri, 22 Sep 2023, Shyam Sundar S K wrote:
Add () to the function name in the shortlog. "Change signature" is quite
vague, perhaps you could come up something more descriptive.
> Make amd_pmf_set_dram_addr() as non-static so that same function
> can be used across files.
This says nothing
is also useful as
a cleanup.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/amd/amdgpu/cik.c | 41
drivers/gpu/drm/amd/amdgpu/si.c | 41
2 files changed, 30 insertions(+), 52 deletions(-)
diff --git
is also useful as
a cleanup.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/radeon/cik.c | 40 ++--
drivers/gpu/drm/radeon/si.c | 40 ++--
2 files changed, 30 insertions(+), 50 deletions(-)
diff --git
On Fri, 18 Aug 2023, Deucher, Alexander wrote:
> [Public]
>
> > -Original Message-
> > From: Ilpo Järvinen
> > Sent: Monday, July 17, 2023 8:05 AM
> > To: linux-...@vger.kernel.org; Bjorn Helgaas ; Lorenzo
> > Pieralisi ; Rob Herring ;
> >
is also useful as
a cleanup.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/radeon/cik.c | 40 ++--
drivers/gpu/drm/radeon/si.c | 40 ++--
2 files changed, 30 insertions(+), 50 deletions(-)
diff --git
is also useful as
a cleanup.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/amd/amdgpu/cik.c | 41
drivers/gpu/drm/amd/amdgpu/si.c | 41
2 files changed, 30 insertions(+), 52 deletions(-)
diff --git
On Fri, 21 Jul 2023, Alex Deucher wrote:
> On Fri, Jul 21, 2023 at 4:18 AM Ilpo Järvinen
> wrote:
> >
> > On Thu, 20 Jul 2023, Bjorn Helgaas wrote:
> >
> > > On Mon, Jul 17, 2023 at 03:04:57PM +0300, Ilpo Järvinen wrote:
> > > > Don't assume that on
On Thu, 20 Jul 2023, Bjorn Helgaas wrote:
> On Mon, Jul 17, 2023 at 03:04:57PM +0300, Ilpo Järvinen wrote:
> > Don't assume that only the driver would be accessing LNKCTL. ASPM
> > policy changes can trigger write to LNKCTL outside of driver's control.
> > And in the ca
locking to avoid losing
concurrent updates to the register value.
Fixes: a2e73f56fa62 ("drm/amdgpu: Add support for CIK parts")
Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10")
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Cc: sta...@vger.kernel.org
---
locking to avoid losing
concurrent updates to the register value.
Fixes: 8a7cd27679d0 ("drm/radeon/cik: add support for pcie gen1/2/3 switching")
Fixes: b9d305dfb66c ("drm/radeon: implement pcie gen2/3 support for SI")
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Cc: st
locking to avoid losing
concurrent updates to the register value.
Fixes: a2e73f56fa62 ("drm/amdgpu: Add support for CIK parts")
Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10")
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Cc: sta...@vger.kernel.org
---
locking to avoid losing
concurrent updates to the register value.
Fixes: 8a7cd27679d0 ("drm/radeon/cik: add support for pcie gen1/2/3 switching")
Fixes: b9d305dfb66c ("drm/radeon: implement pcie gen2/3 support for SI")
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Cc: st
locking to avoid losing
concurrent updates to the register value.
Fixes: 8a7cd27679d0 ("drm/radeon/cik: add support for pcie gen1/2/3 switching")
Fixes: b9d305dfb66c ("drm/radeon: implement pcie gen2/3 support for SI")
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Cc: st
locking to avoid losing
concurrent updates to the register value.
Fixes: a2e73f56fa62 ("drm/amdgpu: Add support for CIK parts")
Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10")
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Cc: sta...@vger.kernel.org
---
locking to avoid losing
concurrent updates to the register value.
Fixes: a2e73f56fa62 ("drm/amdgpu: Add support for CIK parts")
Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10")
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Cc: sta...@vger.kernel.org
---
locking to avoid losing
concurrent updates to the register value.
Fixes: 8a7cd27679d0 ("drm/radeon/cik: add support for pcie gen1/2/3 switching")
Fixes: b9d305dfb66c ("drm/radeon: implement pcie gen2/3 support for SI")
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
Cc: st
() and pcie_lnkctl2_clear_and_set() which
do proper locking to avoid losing concurrent updates to the register
value.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/amd/amdgpu/cik.c | 72 +--
drivers/gpu/drm/amd/amdgpu/si.c | 74
() and pcie_lnkctl2_clear_and_set() which
do proper locking to avoid losing concurrent updates to the register
value.
Suggested-by: Lukas Wunner
Signed-off-by: Ilpo Järvinen
---
drivers/gpu/drm/radeon/cik.c | 71 ++-
drivers/gpu/drm/radeon/si.c | 72
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