[PATCH 3/5] drm/amdgpu: update THM IP register header to support BACO

Change-Id: I484ba66c2e6f20123e6004cb6671e6a6ee6cf27b Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/include/asic_reg/thm

[PATCH 1/5] drm/amdgpu: update NBIO v7.4 to support BACO

Change-Id: Ie2ecdb78114e4c319aba33fdc68713047417bc7b Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h | 2 ++ drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h | 3 +++ 2 files changed, 5

[PATCH 4/5] drm/amdgpu/powerper: add vega20 BACO functins

Change-Id: I1e55db9e508f96353b1b2e6aa153e05962b9e7fe Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +- .../gpu/drm/amd/powerplay/hwmgr/vega20_baco.c | 81 +++ .../gpu/drm/amd/powerplay/hwmgr

[PATCH 0/5] Enable BACO function on VG20

Jim Qu (5): drm/amdgpu: update NBIO v7.4 to support BACO drm/amdgpu: also include NBIO v7.4 register mask header drm/amdgpu: update THM IP register header to support BACO drm/amdgpu/powerper: add vega20 BACO functins drm/amdgpu: use BACO reset on vega20 if platform support drivers/gpu

[PATCH 5/5] drm/amdgpu: use BACO reset on vega20 if platform support

Change-Id: I531fa83ccf4abf593194afd6ff0702ba1393d6c7 Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/amdgpu/soc15.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c

[PATCH 2/5] drm/amdgpu: also include NBIO v7.4 register mask header

Change-Id: Ib5f3afa6c2da4733e39373ce2a950b6ec63ccdff Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/powerplay/hwmgr/vega20_inc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_inc.h b/drivers

[PATCH 3/6] drm/amdpgu: add common functions for BACO feature in PP

Change-Id: I088260c27bc2a84b4e0abd96aca9a981dd52f7b6 Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +- .../gpu/drm/amd/powerplay/hwmgr/common_baco.c | 98 +++ .../gpu/drm/amd/powerplay/hwmgr

[PATCH 6/6] drm/amdgpu: use BACO reset if platform support

It will fall back to use mode1 reset if platform does not support BACO feature. Change-Id: If145e0868c37d76091e0782a49b82c5a935d2367 Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/amdgpu/soc15.c | 62 -- 1 file

[PATCH 5/6] drm/amdgpu: expose BACO interfaces to upper level from PP

Change-Id: Id9601a47afcd39107c94b6ae62577549e21a45ae Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 54 +++ .../drm/amd/powerplay/hwmgr/vega10_hwmgr.c| 4 ++ 2 files changed, 58 insertions

[PATCH 4/6] drm/amdgpu: add BACO interfaces for vega10

V2: delay 20ms before BACO out. V3: rename function to vega10_baco_xxx Change-Id: Ibd2b78a723ba56a90fe78b052b27d0ab0e45f0e5 Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/powerplay/hwmgr/Makefile | 2 +- .../gpu/drm/amd/powerplay/hwmgr

[PATCH 0/6] Enable BACO function for VGf10

Bus Alive Chip Off Power mode(BACO) refers to the case in which the power consumption in the GPU is at its lowest level while keeping the PCIe config space alive. Jim Qu (6): drm/amdgpu: update nbio v6.1 register/master to support BACO drm/amdgpu: add BACO interfaces in pm and hwmgr function

[PATCH 2/6] drm/amdgpu: add BACO interfaces in pm and hwmgr function table

Change-Id: I55e58b4627e6d5935dbe56657bef65f37b2a39b3 Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/include/kgd_pp_interface.h | 3 +++ drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 8 2 files changed, 11 insertions(+) diff --git

[PATCH 1/6] drm/amdgpu: update nbio v6.1 register/master to support BACO

Change-Id: I119c30c8b70911be59d2e42501ad7aa7dffcfe61 Signed-off-by: Jim Qu Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h | 2 ++ drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h | 4 2 files changed, 6

[PATCH] drm/amdgpu: set WRITE_BURST_LENGTH to 64B to workaround SDMA1 hang

effect asics: VEGA10 and VEGA12 Change-Id: Idfac315920a4fae771b080ff836bd4c5c980348e Signed-off-by: Jim Qu Acked-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers

[PATCH] drm/amd/powerplay: correct code style

Change-Id: I844949ae1738adae3dfad431a270913d04832f56 Signed-off-by: Jim Qu --- .../drm/amd/powerplay/hwmgr/vega20_hwmgr.c| 135 ++ 1 file changed, 45 insertions(+), 90 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd

[V3] vga_switcheroo: set audio client id according to bound GPU id

. if the audio client is the last registration when vga_switcheroo _ready() get true, we should get audio client id from bound GPU directly. Signed-off-by: Jim Qu --- drivers/gpu/vga/vga_switcheroo.c | 63 +--- include/linux/vga_switcheroo.h | 8 ++--- sound/pci/hda

[V2 2/2] vgaswitchreoo: set audio client id in vgaswitchreoo enable function

to UMA will be suspended if user use debugfs to control power In HDA driver side, it is difficult to know which GPU the audio has bound to. So set the bound gpu pci dev to vgaswitchreoo, the correct audio id will be set in vgaswitchreoo enable function. Signed-off-by: Jim Qu --- drivers/gpu/vga

[V2 1/2] ALSA: HDA: use PCI_BASE_CLASS_DISPLAY to replace PCI_CLASS_DISPLAY_VGA

Except PCI_CLASS_DISPLAY_VGA, some PCI class is sometimes PCI_CLASS_DISPLAY_3D or PCI_CLASS_DISPLAY_OTHER. Signed-off-by: Jim Qu --- sound/pci/hda/hda_intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 1ae1850

[PATCH 1/2] ALSA: HDA: use PCI_BASE_CLASS_DISPLAY to cover more display adapters

Signed-off-by: Jim Qu --- sound/pci/hda/hda_intel.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 1ae1850..e0064567 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -31,7 +31,7

[PATCH 2/2] vgaswitchreoo: set audio client id in vgaswitchreoo enable function

to UMA will be suspended if user use debugfs to contorl power In HDA driver side, it is difficult to know which GPU the audio has binded to. So set the bound gpu pci dev to vgaswitchroo, the correct audio id will be set in vgaswitchreoo enable function. Signed-off-by: Jim Qu --- drivers/gpu/vga

[PATCH] vgaswitchroo: set audio client id according to bound gpu client id

sure we check for both when checking for the dGPU in get_bound_vga() The patch also combine the HDA change to avoid break building. Change-Id: I9906c1bd4dd5b36108d7133bb1cf724d13f1cd6d Signed-off-by: Alex Deucher Signed-off-by: Jim Qu --- drivers/gpu/vga/vga_switcheroo.c | 11

[PATCH] sync amdgpu scanout update event before mode setting

There is a case that when set screen from reverse to normal, the old scanout damage is freed in modesetting before sanout update handler, so it causes segment fault issue. Change-Id: I0fc6282688054d1e0f23d1ba66d4227553de53f3 Signed-off-by: Jim Qu <jim...@amd.com> --- src/drmmode_display

[PATCH 2/2] drm/amdgpu: restore uvd fence seq in uvd resume

otherwise, uvd block will be never powered up in ring begin_use() callback. uvd ring test will be fail in resume in rumtime pm. Change-Id: Ic623e789cc682ea07af228898f9aaf22511bbe20 Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 2 ++ 1 file chan

[PATCH 1/2] drm/amdgpu: always cancel uvd idel handler in uvd suspend

Change-Id: I62720a2df92005c8838f2e6a505f7d4840903ebb Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

[PATCH 2/2] drm/amdgpu: save/restore uvd fence sequence number in suspend/resume

otherwise, uvd block will be never powered up in ring begin_use() callback. uvd ring test will be fail in resume in rumtime pm. Change-Id: I71b6c00bad174c90e12628e6037dc04a4ff9d9f2 Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 10 -- drivers/g

[PATCH 1/2] drm/amdgpu: alway cancel uvd idle work

Change-Id: I06e5460ece91e812cda28fb02a6b78676d921e18 Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

[PATCH] drm/amdgpu/scheduler: job ibs should also be freed

Change-Id: I93bb283cfebfe203f777bb7bae390c9b9a7b5fd0 Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c b/drivers/gpu/drm/amd/sch

[PATCH] Wait pending flip before setting new frontbuffer when resize screen

Change-Id: I4f6b411129547d30cf109ba7f564815f759f9380 Signed-off-by: Jim Qu <jim...@amd.com> --- src/drmmode_display.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/src/drmmode_display.c b/src/drmmode_display.c index 552bff8..15aad0b 100644 --- a/src/drmmode_disp

[PATCH] drm/amd/amdgpu: fix si_enable_smc_cac() failed issue

Change-Id: I04730e7947bac474ee803c4e9bb2121383b9482f Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/si_dpm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c index 7c1c5d1..4b3742d

[PATCH] drm/amd/amdgpu: move get memory type function from early init to sw init

On PX system, it will get memory type before gpu post , and get unkown type. Change-Id: I79e3760dd789c21a5f552bc4e5754f7a2defdaae Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff

[PATCH] /drm/amd/amdgpu: move get memory type function from early init to sw init

On PX system, it will get memory type before gpu post , and get unkown type. Change-Id: I79e3760dd789c21a5f552bc4e5754f7a2defdaae Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff

[PATCH] drm/amd/amdgpu: fix Tonga S3 resume hang on rhel6.8

: I13977c60314ffe976924b1fdad1ab10df5d93c82 Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c index d6cbdbe..a1a2d44 100644 --- a/drivers/gpu/drm/amd/

[PATCH 0/2]

Jim Qu (2): drm/amd/amdgpu: fix console deadlock if late init failed drm/amd/amdgpu: add atomic helper to suspend/resume functions drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 182 + drivers/gpu/drm/amd/amdgpu

[PATCH 1/2] drm/amd/amdgpu: fix console deadlock if late init failed

Change-Id: Ia914fac083ebab39617dad046d4bb98ab1ddf0a8 Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/

[PATCH 2/2] drm/amd/amdgpu: add atomic helper to suspend/resume functions

Change-Id: I7f5b4bddf1fe0538de81f2268fe80927bee09ec5 Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 179 + drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 7 +- drivers/g

[PATCH] drm/amd/amdgpu: add atomit helper function into suspend/resume functions

Change-Id: I3baae1419cb33a25e4fd84039bb382a347e3a12c Signed-off-by: Jim Qu <jim...@amd.com> --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 33 -- 2 files changed, 19 insertions(+), 16 deletions(-) diff