[AMD Official Use Only - General]
These two patches Looks good to me .
Reviewed by Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Monday, April 22, 2024 10:38 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH 1/2] drm/amdgpu:
nig, Christian
Sent: Thursday, April 18, 2024 1:59 AM
To: Alex Deucher ; Liu, Shaoyun
Cc: Chen, Horace ; amd-gfx@lists.freedesktop.org; Andrey
Grodzovsky ; Kuehling, Felix
; Deucher, Alexander ; Xiao,
Jack ; Zhang, Hawking ; Liu, Monk
; Xu, Feifei ; Chang, HaiJun
; Leo Liu ; Liu, Jenny (Jing)
Subj
[AMD Official Use Only - General]
Looks good to me .
Reviewed by Shaoyun.liu < shaoyun@amd.com>
-Original Message-
From: amd-gfx On Behalf Of Horace Chen
Sent: Wednesday, April 17, 2024 7:30 AM
To: amd-gfx@lists.freedesktop.org
Cc: Andrey Grodzovsky ; Kuehling, Felix
; Chen, Horace
[AMD Official Use Only - General]
I have a discussion with Christian about this before . The conclusion is that
driver should prevent multiple process from using the MES ring at the same
time . Also for current MES ring usage ,driver doesn't have the logic to
prevent the ring been
[AMD Official Use Only - General]
Comments inline
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Saturday, March 30, 2024 10:01 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu/mes11: print MES opcodes rather than numbers
Makes
it and check with MES engineer.
Regards
Shaoyun.liu
-Original Message-
From: Alex Deucher
Sent: Tuesday, March 26, 2024 12:50 PM
To: Liu, Shaoyun
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu : Add mes_log_enable to control mes log feature
On Tue, Mar 26, 2024 at 11:51 AM Liu
and may take some time for driver side to pick it up , but before this
I'd like to have a solution that can fix the issue ASAP .
Regards
Shaoyun.liu
-Original Message-
From: Kuehling, Felix
Sent: Tuesday, March 26, 2024 2:07 PM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: Re
[AMD Official Use Only - General]
ping
From: amd-gfx On Behalf Of Liu, Shaoyun
Sent: Monday, March 25, 2024 8:51 AM
To: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu : Add mes_log_enable to control mes log feature
[AMD Official Use Only - General]
[AMD Official Use Only
[AMD Official Use Only - General]
It can cause page fault when the log size exceed the page size .
-Original Message-
From: Kuehling, Felix
Sent: Monday, March 25, 2024 2:58 PM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu : Increase the mes log
[AMD Official Use Only - General]
Ping
Get Outlook for iOS<https://aka.ms/o0ukef>
From: Liu, Shaoyun
Sent: Friday, March 22, 2024 12:49:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amdgpu : Increase the mes log buffe
[AMD Official Use Only - General]
Ping
Get Outlook for iOS<https://aka.ms/o0ukef>
From: Liu, Shaoyun
Sent: Friday, March 22, 2024 2:00:21 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amdgpu : Add mes_log_enable to control m
[AMD Official Use Only - General]
Reviewed by shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Thursday, February 15, 2024 3:40 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Yifan ; Deucher, Alexander
Subject: [PATCH 9/9] drm/amdgpu: enable MES discovery
[AMD Official Use Only - General]
ping
-Original Message-
From: Liu, Shaoyun
Sent: Wednesday, January 31, 2024 9:26 AM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amdgpu: Only create mes event log debugfs when mes is
enabled
Skip the debugfs file creation
[AMD Official Use Only - General]
Looks good to me .
Reviewed by : Shaoyun.liu
-Original Message-
From: Deucher, Alexander
Sent: Monday, January 8, 2024 4:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Liu, Shaoyun
; Koenig, Christian
Subject: [PATCH] drm/amdgpu
Message-
From: Alex Deucher
Sent: Thursday, December 14, 2023 10:07 AM
To: Liu, Shaoyun
Cc: Christian König ; Limonciello, Mario
; Huang, Tim ;
amd-gfx@lists.freedesktop.org; Koenig, Christian ;
sta...@vger.kernel.org
Subject: Re: [PATCH] drm/amd: Add a workaround for GFX11 systems that fail
[AMD Official Use Only - General]
The gmc flush tlb function is used on both baremetal and sriov. But the
function amdgpu_virt_kiq_reg_write_reg_wait is defined in amdgpu_virt.c with
name 'virt' make it appear as a SRIOV only function, this sounds confusion .
Will it make more sense to
be discussed
offline with the MES team.
We're not going to gain ground discussing this here. The solution has already
been merged.
Feel free to propose a better solution if you're not satisfied with this one.
Jon
From: Liu, Shaoyun mailto:shaoyun@amd.com>>
Sent: Tuesday, December 12, 2023 11
kef>
From: Kim, Jonathan
Sent: Tuesday, December 12, 2023 8:19:09 PM
To: Liu, Shaoyun ; Huang, JinHuiEric
; amd-gfx@lists.freedesktop.org
Cc: Wong, Alice ; Kuehling, Felix
; Kasiviswanathan, Harish
Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process mana
To: Liu, Shaoyun ; Huang, JinHuiEric
; amd-gfx@lists.freedesktop.org
Cc: Wong, Alice ; Kuehling, Felix
; Kasiviswanathan, Harish
Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process management
[Public]
> -Original Message-
> From: Liu, Shaoyun
> Sent: Tuesday, De
, Jonathan
Sent: Tuesday, December 12, 2023 4:48 PM
To: Liu, Shaoyun ; Huang, JinHuiEric
; amd-gfx@lists.freedesktop.org
Cc: Wong, Alice ; Kuehling, Felix
; Kasiviswanathan, Harish
Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process management
[Public]
> -Original Mess
Message-
From: Kim, Jonathan
Sent: Tuesday, December 12, 2023 4:33 PM
To: Liu, Shaoyun ; Huang, JinHuiEric
; amd-gfx@lists.freedesktop.org
Cc: Wong, Alice ; Kuehling, Felix
; Kasiviswanathan, Harish
Subject: RE: [PATCH] drm/amdkfd: fix mes set shader debugger process management
[Public
[AMD Official Use Only - General]
Does this requires the new MES FW for this process_ctx_flush requirement ?
Can driver side add logic to guaranty when call SET_SHADER_DEBUGGER, the
process address is always valid ?
Regards
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf
[AMD Official Use Only - General]
Looks ok to me .
Reviewed-by: Shaoyun.liu
-Original Message-
From: Kakarya, Surbhi
Sent: Thursday, November 2, 2023 12:10 PM
To: Kakarya, Surbhi ; amd-gfx@lists.freedesktop.org;
Yang, Philip ; Liu, Shaoyun
Subject: RE: [PATCH] drm: Disable XNACK
[AMD Official Use Only - General]
What about the existing rocm apps that already use the hsakmt APIs for user
queue ?
Shaoyun.liu
-Original Message-
From: Alex Deucher
Sent: Tuesday, January 3, 2023 2:22 PM
To: Liu, Shaoyun
Cc: Kuehling, Felix ; Sharma, Shashank
; amd-gfx
[AMD Official Use Only - General]
Hsakmt has the interfaces for compute user queue. Do we want a unify API for
both graphic and compute ?
Regards
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Felix
Kuehling
Sent: Tuesday, January 3, 2023 1:30 PM
To: Sharma, Shashank
[AMD Official Use Only - General]
I agree with Christian . Although on some hypervisior with live migration
support , there will be specific API between OS and PF driver to handle the
FB content save/restore for VF, in this case , guest side save/restore is not
necessary. On other
[AMD Official Use Only - General]
Rewed-by: shaoyun liu
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Wednesday, November 9, 2022 2:07 PM
To: Wan, Gavin
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: Ignore stop rlc on SRIOV environment.
On Wed,
-submission for all kind of reset since kernel
already signal the reset event to user level (at least for compute stack) ?
Regard
Sshaoyun.liu
-Original Message-
From: Koenig, Christian
Sent: Wednesday, October 26, 2022 1:27 PM
To: Liu, Shaoyun ; Tuikov, Luben ;
Prosyak, Vitaly ; Deucher
[AMD Official Use Only - General]
The user space shouldn't care about SRIOV or not , I don't think we need to
keep the re-submission for SRIOV as well. The reset from SRIOV could trigger
the host do a whole GPU reset which will have the same issue as bare metal.
Regards
Shaoyun.liu
Looks OK to me.
Reviewed by : shaoyun.liu
From: Chander, Vignesh
Sent: September 28, 2022 3:03 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun ; Chander, Vignesh
Subject: [PATCH] drm/amdgpu: Skip put_reset_domain if it doesnt exist
For xgmi sriov
ent: Wednesday, September 28, 2022 1:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun ; Chander, Vignesh
Subject: [PATCH] drm/amdgpu: Skip put_reset_domain if it doesnt exist
Change-Id: Ifd6121fb94db3fadaa1dee61d35699abe1259409
Signed-off-by: Vignesh Chander
---
drivers/gpu/drm/amd/amd
[AMD Official Use Only - General]
Just curious about what's this gfx software ring used for ? who decide the
priority , can user request a higher priority or it's predefined ?
Thanks
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Andrey
Grodzovsky
Sent: Monday,
[AMD Official Use Only - General]
Looks good to me .
-Original Message-
From: Chander, Vignesh
Sent: Friday, September 9, 2022 12:52 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun ; Chander, Vignesh
Subject: [PATCH] drm/amdgpu: Fix hive reference count leak
both get_xgmi_hive
[AMD Official Use Only - General]
ping
-Original Message-
From: Liu, Shaoyun
Sent: Wednesday, September 7, 2022 11:38 AM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amdgpu: Use per device reset_domain for XGMI on sriov
configuration
For SRIOV configuration
[AMD Official Use Only - General]
Looks good to me .
Reviewed-By : shaoyun.liu
-Original Message-
From: Chander, Vignesh
Sent: Thursday, August 18, 2022 1:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kim, Jonathan ; Liu, Shaoyun ;
Chander, Vignesh
Subject: [PATCH] drm/amdgpu: skip
[AMD Official Use Only - General]
>From HW point of view , the maximum VF number can reach 16 instead of 12 .
>Although currently no product will use the 16 VFs together, not sure about
>the future.
You can added Acked-by me. I will let Alex & Christion decide whether accept
this change.
the VF with sjt version can be initialized and
enabled .
Regards
Shaoyun.liu
-Original Message-
From: Alex Deucher
Sent: Wednesday, August 10, 2022 12:35 PM
To: Liu, Shaoyun
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: use sjt mec fw on aldebaran for sriov
On Fri
As I discussed with Alice ,this change is when multi-vf running compute
benchmark (Luxmark) at the same time, which involves multiple vf do the tlb
invalidation at the same time. They observed kiq timeout after submit the tlb
invalidate command. Although each vf has the invalidate register
[AMD Official Use Only - General]
Looks good to me .
BTW , why we didn't catch it on baremetal mode ?
Reviewed-by: Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Jonathan Kim
Sent: Thursday, July 28, 2022 1:06 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kim, Jonathan
[AMD Official Use Only]
Looks ok to me .
You can add reviewed-by: Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of David Yu
Sent: Friday, April 22, 2022 12:09 PM
To: amd-gfx@lists.freedesktop.org
Cc: Yu, David
Subject: [PATCH] drm/amdgpu: Ta fw needs to be loaded for SRIOV
[AMD Official Use Only]
Please add some more info in the description to explain why we need to add
TA in SRIOV guest .
Regard
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of David Yu
Sent: Friday, April 22, 2022 10:58 AM
To: amd-gfx@lists.freedesktop.org
Cc: Yu, David
, Jonathan
Sent: Wednesday, March 9, 2022 6:31 PM
To: Kuehling, Felix ; amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: RE: [PATCH] drm/amdgpu: fix aldebaran xgmi topology for vf
[Public]
> -Original Message-
> From: Kuehling, Felix
> Sent: March 9, 2022 6:12 PM
> To: K
[AMD Official Use Only]
Reviewed by : Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of David Yu
Sent: Thursday, March 3, 2022 11:25 AM
To: amd-gfx@lists.freedesktop.org
Cc: Yu, David
Subject: [PATCH] drm/amdgpu: Add DFC CAP support for aldebaran
Add DFC CAP support for
[AMD Official Use Only]
Probably just described as follows :
Initialize cap microcode in psp_init_sriov_microcode, the ta microcode will be
initialized in psp_vxx_init_microcode
-Original Message-
From: amd-gfx On Behalf Of David Yu
Sent: Thursday, March 3, 2022 9:10 AM
To:
[AMD Official Use Only]
Can you added more information in the description ? Like why we should not
load ta for Aldebaran here.
Regards
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of David Yu
Sent: Wednesday, March 2, 2022 10:20 PM
To: amd-gfx@lists.freedesktop.org
Cc:
; Liu,
Shaoyun
Subject: RE: [PATCH] drm/amdgpu: Fix wait for RLCG command completion
[AMD Official Use Only]
+Shaoyun
-Original Message-
From: Zhang, Bokun
Sent: Monday, February 14, 2022 4:09 PM
To: Skvortsov, Victor ; amd-gfx@lists.freedesktop.org
Cc: Skvortsov, Victor
Subject: RE
, Andrey
Sent: Tuesday, February 8, 2022 7:23 PM
To: dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
Cc: Koenig, Christian ; dan...@ffwll.ch; Liu, Monk
; Chen, Horace ; Lazar, Lijo
; Chen, JingWen ; Grodzovsky, Andrey
; Liu, Shaoyun
Subject: [RFC v4 04/11] drm/amd/virt: For SRIOV
[AMD Official Use Only]
Good catch . Thanks .
Reviewed by : shaoyun.liu
-Original Message-
From: Tuikov, Luben
Sent: Thursday, January 20, 2022 6:52 PM
To: amd-gfx@lists.freedesktop.org
Cc: Tuikov, Luben ; Deucher, Alexander
; Liu, Shaoyun ; Russell, Kent
Subject: [PATCH] drm
: Grodzovsky, Andrey
Sent: Tuesday, January 4, 2022 3:55 PM
To: Liu, Shaoyun ; Koenig, Christian
; Liu, Monk ; Chen, JingWen
; Christian König ;
Deng, Emily ; dri-de...@lists.freedesktop.org;
amd-gfx@lists.freedesktop.org; Chen, Horace
Cc: dan...@ffwll.ch
Subject: Re: [RFC v2 8/8] drm/amd/virt: Drop
[AMD Official Use Only]
I mostly agree with the sequences Christian described . Just one thing might
need to discuss here. For FLR notified from host, in new sequenceas
described , driver need to reply the READY_TO_RESET in the workitem from a
reset work queue which means inside
[AMD Official Use Only]
I have a discussion with Andrey about this offline. It seems dangerous to
remove the in_gpu_reset and reset_semm directly inside the flr_work. In the
case when the reset is triggered from host side , gpu need to be locked while
host perform reset after flr_work
[AMD Official Use Only]
Hi , Andrey
I actually has some concerns about this change .
1. on SRIOV configuration , the reset notify coming from host , and driver
already trigger a work queue to handle the reset (check
xgpu_*_mailbox_flr_work) , is it a good idea to trigger another work
[AMD Official Use Only]
Reviewed by: Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of sashank saye
Sent: Friday, December 17, 2021 1:56 PM
To: amd-gfx@lists.freedesktop.org
Cc: Saye, Sashank
Subject: [PATCH] drm/amdgpu: Send Message to SMU on aldebaran passthrough for
sbr
[AMD Official Use Only]
Comment inline .
-Original Message-
From: amd-gfx On Behalf Of sashank saye
Sent: Friday, December 17, 2021 1:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Saye, Sashank
Subject: [PATCH] drm/amdgpu: Send Message to SMU on aldebaran passthrough for
sbr handling
[AMD Official Use Only]
>From your explanation , seems SMU always need this special handling for SBR
>on passthrough mode , but in the code , that only apply to XGMI
>configuration. Should you change that as well ? Two comments inline.
Regards
Shaoyun.liu
-Original Message-
the SBR on VM on/off and
SMU will handle the reset. Can you check after this reset , will SMU still
alive ? If it's alive , the driver will trigger the reset again .
Regards
Shaoyun.liu
-Original Message-
From: Saye, Sashank
Sent: Friday, December 17, 2021 11:53 AM
To: Liu, Shaoyun
[AMD Official Use Only]
First , the name of heavy SBR is confusing when you need to go through light
SBR code path.
Secondary, originally we introduce the light SBR is because on older asic,
FW can not synchronize the reset on the devices within the hive, so it depends
on driver to sync
[AMD Official Use Only]
Reviewed by: shaoyun.liu
-Original Message-
From: Skvortsov, Victor
Sent: Thursday, December 16, 2021 2:43 PM
To: amd-gfx@lists.freedesktop.org; Deng, Emily ; Liu, Monk
; Ming, Davis ; Liu, Shaoyun
; Zhou, Peng Ju ; Chen, JingWen
; Chen, Horace ; Nieto
early_init .
Regards
Shaoyun.liu
-Original Message-
From: Skvortsov, Victor
Sent: Thursday, December 16, 2021 9:28 AM
To: Alex Deucher
Cc: amd-gfx list ; Deng, Emily
; Liu, Monk ; Ming, Davis
; Liu, Shaoyun ; Zhou, Peng Ju
; Chen, JingWen ; Chen, Horace
; Nieto, David M
Subject: RE:
[AMD Official Use Only]
This one looks better and more logical .
Reviewed By :Shaoyun.liu
-Original Message-
From: Skvortsov, Victor
Sent: Thursday, December 16, 2021 10:39 AM
To: amd-gfx@lists.freedesktop.org; Liu, Shaoyun ; Nieto,
David M
Cc: Skvortsov, Victor
Subject: [PATCH
[AMD Official Use Only]
Looks ok to me . This serial is Reviewed by: Shaoyun.liu
Regards
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Victor
Skvortsov
Sent: Thursday, December 9, 2021 11:48 AM
To: amd-gfx@lists.freedesktop.org
Cc: Skvortsov, Victor
Subject: [PATCH 1/2]
[AMD Official Use Only]
These workaround code looks confusing. For PSP TMR , I think guest side should
avoid to load it totally since it's loaded in host side. For gart table , in
current code path probably it's ok, but I think if we have a correct sequence
in SRIOV , we shouldn't have
[AMD Official Use Only]
Sounds reasonable.
This patch is Reviewed by : Shaoyun.liu
Regards
Shaoyun.liu
-Original Message-
From: Skvortsov, Victor
Sent: Thursday, December 9, 2021 1:33 PM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: SRIOV
[AMD Official Use Only]
I think it's a good catch for reset_sem, any reason to change the
adev->in_gpu_reset ?
Regards
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Victor
Skvortsov
Sent: Thursday, December 9, 2021 12:02 PM
To: amd-gfx@lists.freedesktop.org
Cc:
[AMD Official Use Only]
Ok , sounds reasonable. With the suggested modification
Patch 1, 2, 3, are Reviewed by : Shaoyun.liu . Patch4 is
Acked by : Shaoyun.liu .
Regards
Shaoyun.liu
-Original Message-
From: Luo, Zhigang
Sent: Tuesday, December 7, 2021 4:55 PM
To: Liu, Shaoyun
[AMD Official Use Only]
This patch looks ok to me .
Patch 2 is actually add the PSP xgmi init not the whole XGMI init, can you
change the description according to this ?
Patch 3, You take the hive lock inside the reset sriov function , but the
hive lock already be took before this
[AMD Official Use Only]
I think you need to describe more details on why the hive reset on guest side
is not necessary and how host and guest driver will work together to handle
the hive reset . You should have 2 patches together as a serials to handle
the FLR and mode 1 reset on XGMI
Thanks for the review , change the description as suggested and submitted.
Shaoyun.liu
-Original Message-
From: Kuehling, Felix
Sent: Tuesday, November 30, 2021 1:19 AM
To: amd-gfx@lists.freedesktop.org; Liu, Shaoyun
Subject: Re: [PATCH] drm/amdgpu: adjust the kfd reset sequence
, Felix
Sent: Monday, November 22, 2021 10:40 AM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/amdgpu: move kfd post_reset out of reset_sriov
function
Am 2021-11-18 um 11:57 a.m. schrieb shaoyunl:
> For sriov XGMI configuration, the host driver will handle the h
[AMD Official Use Only]
ping
-Original Message-
From: Liu, Shaoyun
Sent: Thursday, November 18, 2021 10:08 PM
To: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amd/amdgpu: move kfd post_reset out of reset_sriov
function
[AMD Official Use Only]
Ping
-Original Message
[AMD Official Use Only]
Ping
-Original Message-
From: Liu, Shaoyun
Sent: Thursday, November 18, 2021 11:58 AM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amd/amdgpu: move kfd post_reset out of reset_sriov function
For sriov XGMI configuration, the host
[AMD Official Use Only]
Om, sounds reasonable
Thanks
Shaoyun.liu
-Original Message-
From: Kuehling, Felix
Sent: Monday, November 15, 2021 11:07 AM
To: amd-gfx@lists.freedesktop.org; Liu, Shaoyun
Subject: Re: [PATCH] drm/amd/amdkfd: Fix kernel panic when reset failed and
been
, thanks to bring this up, it will remind us to verify on the XGMI
configuration on SRIOV.
Regards
shaoyun.liu
-Original Message-
From: Kuehling, Felix
Sent: Friday, November 5, 2021 1:48 PM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/amdgpu: fix
[AMD Official Use Only]
Good catch . my editor seems has auto complete feature and I just select the
first one . ☹
Thanks
Shaoyun.liu
-Original Message-
From: Kuehling, Felix
Sent: Friday, September 10, 2021 10:19 AM
To: amd-gfx@lists.freedesktop.org; Liu, Shaoyun
Subject: Re
[AMD Official Use Only]
Looks good to me .
Reviewed by Shaoyun.liu < shaoyun@amd.com>
-Original Message-
From: Kuehling, Felix
Sent: Friday, September 10, 2021 1:10 AM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: Re: [PATCH v3 1/1] drm/amdkfd
[AMD Official Use Only]
Thanks for the review . I accepted your comments and will sent another
change list for review once your change is in.
Regards
Shaoyun.liu
-Original Message-
From: Kuehling, Felix
Sent: Thursday, September 9, 2021 12:18 PM
To: Liu, Shaoyun ; amd-gfx
[AMD Official Use Only]
Looks ok to me .
Reviewed by Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Zhigang Luo
Sent: Monday, August 16, 2021 11:04 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang
Subject: [PATCH] drm/amdgpu: correct MMSCH 1.0 version
MMSCH 1.0
[AMD Official Use Only]
Is that information from MM team ?
Please make sure it won't break the ASICs that use the same code path. Also If
this is true for all mmsch_v1.0 , you need to specify this is mmSCH v1.0 ,
since other MMSCH version will still use this major and minor.
Shaoyun.liu
[AMD Official Use Only]
I will leave Hawking to comment on this serial .
Thanks
Shaoyun.liu
-Original Message-
From: Luo, Zhigang
Sent: Thursday, June 3, 2021 11:48 AM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 5/5] drm/amdgpu: allocate psp fw private
[AMD Official Use Only]
This one doesn't looks apply to XGMI TA only , it's for whole PSP init , can
you double check it ?
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo,
[AMD Official Use Only]
Looks ok to me .
-Original Message-
From: amd-gfx On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang
Subject: [PATCH 3/5] drm/amdgpu: remove sriov vf mmhub system aperture and fb
location
[AMD Official Use Only]
This looks will affect other ASIC , Can you double check that ?
-Original Message-
From: amd-gfx On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang
Subject: [PATCH 2/5] drm/amdgpu: remove sriov vf
[AMD Official Use Only]
Looks ok to me .
Reviewed-By : Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Zhigang Luo
Sent: Thursday, June 3, 2021 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang
Subject: [PATCH 1/5] drm/amdgpu: remove sriov vf checking from
valid our original design.
Regards
Shaoyun.liu
From: Lazar, Lijo
Sent: Friday, March 12, 2021 11:54 AM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org; Quan,
Evan ; Zhang, Hawking
Subject: RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough
configuration
[AMD Public Use]
Looks like
d Quan for comments .
Regards
Shaoyun.liu
From: Lazar, Lijo
Sent: Friday, March 12, 2021 8:55 AM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough
configuration
[AMD Public Use]
We want to keep ppt_funcs minimal. Adding ever
will have
this support without further code change.
Thanks
Shaoyun.liu
From: Lazar, Lijo
Sent: March 11, 2021 10:42 PM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough
[AMD Official Use Only - Internal Distribution Only]
Ping .
-Original Message-
From: Liu, Shaoyun
Sent: Thursday, March 11, 2021 12:16 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration
This is to fix
[AMD Official Use Only - Internal Distribution Only]
Hi, Andrey.
The first 3 patches in this serial already been acked by Alex. D, can you help
review the rest two ?
Thanks
Shaoyun.liu
-Original Message-
From: Grodzovsky, Andrey
Sent: Monday, March 8, 2021 10:53 AM
To: Liu, Shaoyun
estroy the hive ,
build the device_list for amdgpu_do_asic_reset without the hive .
Hope I explain it clearly .
Thanks
Shaoyun.liu
-Original Message-
From: Grodzovsky, Andrey
Sent: Monday, March 8, 2021 1:28 AM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/
-
From: amd-gfx On Behalf Of Liu, Shaoyun
Sent: Saturday, March 6, 2021 3:41 PM
To: Grodzovsky, Andrey ;
amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 5/5] drm/amdgpu: Reset the devices in the XGMI hive duirng
probe
[AMD Official Use Only - Internal Distribution Only]
all the GPUs in the system which means when this
delayed thread starts , we can assume all the devices already been populated
in mgpu_info.
Regards
Shaoyun.liu
-Original Message-
From: Grodzovsky, Andrey
Sent: Saturday, March 6, 2021 1:09 AM
To: Liu, Shaoyun ; amd-gfx
verify it.
Regards
Shaoyun.liu
-Original Message-
From: Grodzovsky, Andrey
Sent: Friday, March 5, 2021 2:27 PM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 5/5] drm/amdgpu: Reset the devices in the XGMI hive duirng
probe
On 2021-03-05 12:52 p.m., shaoyunl
can not guarantee that . For
none-XGMI configuration , there is no this requirement , SBR can reset the
GPU correctly .
Regards
Shaoyun.liu
-Original Message-
From: Lazar, Lijo
Sent: Wednesday, February 24, 2021 8:58 AM
To: Liu, Shaoyun ; amd-gfx@lists.freedesktop.org
Cc: Liu
-Original Message-
From: Alex Deucher
Sent: Tuesday, February 23, 2021 11:26 AM
To: Liu, Shaoyun
Cc: amd-gfx list
Subject: Re: [PATCH 2/4] drm/amdgpu: get xgmi info at eary_init
On Thu, Feb 18, 2021 at 8:19 PM shaoyunl wrote:
>
> Driver need to get XGMI info function earlier before i
[AMD Official Use Only - Internal Distribution Only]
Comments inline ,
-Original Message-
From: Alex Deucher
Sent: Tuesday, February 23, 2021 11:47 AM
To: Liu, Shaoyun
Cc: amd-gfx list
Subject: Re: [PATCH 1/4] drm/amdgpu: Reset the devices in the XGMI hive duirng
probe
On Thu, Feb
[AMD Official Use Only - Internal Distribution Only]
-Original Message-
From: Liu, Shaoyun
Sent: Thursday, February 18, 2021 8:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH 4/4] drm/amdgpu: Init the cp MQD if it's not be initialized
before
The MQD might
[AMD Official Use Only - Internal Distribution Only]
-Original Message-
From: Liu, Shaoyun
Sent: Thursday, February 18, 2021 8:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH 3/4] drm/amdgpu: Add kfd init_complete flag to check from
amdgpu side
amdgpu
[AMD Official Use Only - Internal Distribution Only]
-Original Message-
From: Liu, Shaoyun
Sent: Thursday, February 18, 2021 8:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH 2/4] drm/amdgpu: get xgmi info at eary_init
Driver need to get XGMI info function
[AMD Official Use Only - Internal Distribution Only]
Ping.
-Original Message-
From: Liu, Shaoyun
Sent: Thursday, February 18, 2021 8:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH 1/4] drm/amdgpu: Reset the devices in the XGMI hive duirng probe
[AMD Official Use Only - Internal Distribution Only]
Ping .
-Original Message-
From: Liu, Shaoyun
Sent: Thursday, February 18, 2021 8:19 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH 1/4] drm/amdgpu: Reset the devices in the XGMI hive duirng probe
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