ngfeng.
-Original Message-
From: Kuehling, Felix
Sent: Wednesday, July 28, 2021 10:22 PM
To: Zhu, Changfeng ; amd-gfx@lists.freedesktop.org;
Huang, Ray ; Zhang, Yifan
Subject: Re: [PATCH] drm/amdgpu: set default noretry=1 to fix kfd SVM issues
for raven
Doesn't this break IOMMUv2?
Hi John,
As talked offline, the patch fine with apu at present.
Reviewed-by: Changfeng
BR,
Changfeng.
From: Clements, John
Sent: Monday, June 7, 2021 11:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Changfeng
Subject: [PATCH] drm/amdgpu: Update psp fw attestation support list
[AMD
Zhu, Changfeng would like to recall the message, "[PATCH] drm/amdgpu: Update
psp fw attestation support list".
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Zhu, Changfeng would like to recall the message, "[PATCH] drm/amdgpu: Update
psp fw attestation support list".
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Zhu, Changfeng would like to recall the message, "[PATCH] drm/amdgpu: Update
psp fw attestation support list".
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
if (adev->asic_type == CHIP_VANGOGH)
BR,
Changfeng.
From: amd-gfx On Behalf Of Zhu,
Changfeng
Sent: Monday, June 7, 2021 11:24 AM
To: Clements, John ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: Update psp fw attestation support list
Hi John,
I think it's b
Hi John,
I think it's better to replace
if (adev->flags & AMD_IS_APU)
with
if (adev->asic_type >= CHIP_VANGOGH)
As you say, rembrandt should support this feature.
BR,
Changfeng.
From: Clements, John
Sent: Monday, June 7, 2021 11:13 AM
To: amd-gfx@lists.freedesktop.org
[AMD Official Use Only]
OK.
Thx, Chris and Das.
I'll try it and verify whether there are issues.
BR,
Changfeng.
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Wednesday, June 2, 2021 5:41 PM
To: Zhu, Changfeng ; Koenig, Christian
; Das, Nirmoy ; Huang
when creating bo? Such as AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS?
BR,
Changfeng.
-Original Message---
From: Koenig, Christian
Sent: Wednesday, June 2, 2021 4:57 PM
To: Das, Nirmoy ; Zhu, Changfeng ;
Huang, Ray ; amd-...@freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: take back kvmalloc_array
[Public]
Hi Alex,
This is the issue exposed by Nirmoy's patch that provided better load balancing
across queues.
BR,
Changfeng.
From: Deucher, Alexander
Sent: Wednesday, May 19, 2021 10:53 AM
To: Zhu, Changfeng ; Alex Deucher
; Das, Nirmoy
Cc: Huang, Ray ; amd-gfx list
Subject: Re: [
: Alex Deucher
Sent: Wednesday, May 19, 2021 10:20 AM
To: Zhu, Changfeng
Cc: Huang, Ray ; amd-gfx list
Subject: Re: [PATCH] drm/amdgpu: disable 3DCGCG on picasso/raven1 to avoid
compute hang
Care to submit a patch to re-enable the extra compute queues?
Alex
On Mon, May 17, 2021 at 4:09 AM Zhu
mec 1, pipe 3, queue 1, value 1
BR,
Changfeng.
-Original Message-
From: Huang, Ray
Sent: Monday, May 17, 2021 2:27 PM
To: Alex Deucher ; Zhu, Changfeng
Cc: amd-gfx list
Subject: Re: [PATCH] drm/amdgpu: disable 3DCGCG on picasso/raven1 to avoid
compute hang
On Fri, May 14, 2021 at
[AMD Official Use Only - Internal Distribution Only]
Thanks,Ray.
BR,
Changfeng.
-Original Message-
From: Huang, Ray
Sent: Thursday, February 25, 2021 1:42 PM
To: Zhu, Changfeng
Cc: amd-gfx@lists.freedesktop.org; Clements, John
Subject: Re: [PATCH] drm/amdgpu: decline max_me for
[AMD Official Use Only - Internal Distribution Only]
Tested-by: Changfeng
BR,
Changfeng.
-Original Message-
From: Huang, Ray
Sent: Monday, February 1, 2021 6:39 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix ; Deucher, Alexander
; Koenig, Christian ; Zhu,
Changfeng ; Huang
[AMD Official Use Only - Internal Distribution Only]
Tested-by: Changfeng
BR,
Changfeng.
-Original Message-
From: Huang, Ray
Sent: Monday, November 2, 2020 12:58 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhu, Changfeng
; Li, Roman ; Huang, Ray
Subject: [PATCH
[AMD Public Use]
[AMD Public Use]
Thanks, Lakha.
BR,
Changfeng.
From: Lakha, Bhawanpreet
Sent: Thursday, September 3, 2020 11:07 PM
To: Deucher, Alexander ; Zhu, Changfeng
; amd-gfx@lists.freedesktop.org; Huang, Ray
Subject: Re: [PATCH] drm/amdgpu: add ta firmware load in psp_v12_0 for
g, Hawking
Sent: Wednesday, April 15, 2020 11:05 AM
To: Zhu, James ; Alex Deucher ; Zhu,
Changfeng ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking
Subject: RE: [PATCH] drm/amdgpu/vcn: fix gfxoff issue
[AMD Official Use Only - Internal Distribution Only]
This actually introduced at very earl
[AMD Official Use Only - Internal Distribution Only]
+Ray
BR,
Changfeng.
-Original Message-
From: Zhu, James
Sent: Tuesday, April 14, 2020 11:00 PM
To: Alex Deucher ; Zhu, James ;
Zhang, Hawking
Cc: amd-gfx list ; Zhu, Changfeng
Subject: Re: [PATCH] drm/amdgpu/vcn: fix gfxoff
[AMD Official Use Only - Internal Distribution Only]
Tested-by: changzhu
BR,
Changfeng.
-Original Message-
From: Zhu, James
Sent: Tuesday, April 14, 2020 8:05 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, James ; Zhu, Changfeng
Subject: [PATCH] drm/amdgpu/vcn: fix gfxoff issue
.
BR,
Changfeng,
-Original Message-
From: Koenig, Christian
Sent: Tuesday, December 10, 2019 6:55 PM
To: Zhu, Changfeng ; amd-gfx@lists.freedesktop.org;
Huang, Ray ; Huang, Shimmer ; Deucher,
Alexander
Subject: Re: [PATCH] drm/amdgpu: avoid using invalidate semaphore for
picasso(v2)
Am 10.
[AMD Official Use Only - Internal Distribution Only]
OK Chris.
I'll try and test it.
BR,
Changfeng.
-Original Message-
From: Christian König
Sent: Tuesday, December 3, 2019 8:18 PM
To: Zhu, Changfeng ; amd-gfx@lists.freedesktop.org;
Koenig, Christian ; Huang, Ray ;
Huang, Sh
Thanks, Ray
I 'll submit the patch and continue to see the gfxhub semaphore problem.
BR,
Changfeng.
-Original Message-
From: Huang, Ray
Sent: Friday, November 22, 2019 5:16 PM
To: Zhu, Changfeng
Cc: Koenig, Christian ; Xiao, Jack
; Zhou1, Tao ; Huang, Shimmer
; am
see gfxhub hang root cause with Lisa in the following time.
Could you please help review my new patch(remove DRM_WARN_ONCE)?
BR,
Changfeng.
-Original Message-
From: Christian König
Sent: Wednesday, November 20, 2019 7:27 PM
To: Zhu, Changfeng ; Koenig, Christian
; Xiao, Jack ; Zhou
From: Christian König
Sent: Wednesday, November 20, 2019 10:39 PM
To: Liu, Monk ; Zhu, Changfeng ;
Koenig, Christian ; Xiao, Jack ;
Zhou1, Tao ; Huang, Ray ; Huang, Shimmer
; amd-gfx@lists.freedesktop.org
Subject: Re: 答复: 答复: 答复: [PATCH 1/2] drm/amdgpu: invalidate mmhub semphore
workaround in amdgpu
l Message-
From: Christian König
Sent: Wednesday, November 20, 2019 10:00 PM
To: Liu, Monk ; Koenig, Christian ;
Zhu, Changfeng ; Xiao, Jack ; Zhou1,
Tao ; Huang, Ray ; Huang, Shimmer
; amd-gfx@lists.freedesktop.org
Subject: Re: 答复: 答复: [PATCH 1/2] drm/amdgpu: invalidate mmhub semphore
work
Zhu, Changfeng would like to recall the message, "[PATCH 2/2] drm/amdgpu:
invalidate mmhub semphore workaround in gmc9/gmc10".
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Am 14.11.19 um 11:17 schrieb Changfeng.Zhu:
> From: changzhu
>
> MMHUB may lose GPUVM invalidate acknowledge state across power-gating
> off cycle when it does invalidation req/ack work.
>
> So we must acquire/release one of the vm_invalidate_eng*_sem around
> the invalidation req/ack.
>
> Besi
From: changzhu
It will cause modprobe atombios stuck problem in raven2 if it doesn't
allow direct upload save restore list from gfx driver.
So it needs to allow direct upload save restore list for raven2
temporarily.
Change-Id: I1fece1b9c61f7a13eec948f34eb60a9120046bc2
Signed-off-by: changzhu
-
-Original Message-
From: amd-gfx On Behalf Of Zhu,
Changfeng
Sent: Wednesday, November 6, 2019 8:50 PM
To: Koenig, Christian ;
amd-gfx@lists.freedesktop.org; Tuikov, Luben ; Huang, Ray
; Huang, Shimmer
Subject: RE: [PATCH 1/2] drm/amdgpu: add dummy read by engines for some GCVM
Thanks, Chris.
BR,
Changfeng.
-Original Message-
From: Koenig, Christian
Sent: Wednesday, November 6, 2019 8:48 PM
To: Zhu, Changfeng ; amd-gfx@lists.freedesktop.org;
Tuikov, Luben ; Huang, Ray ; Huang,
Shimmer
Subject: Re: [PATCH 1/2] drm/amdgpu: add dummy read by engines for some
From: changzhu
The GRBM register interface is now capable of bursting 1 cycle per
register wr->wr, wr->rd much faster than previous muticycle per
transaction done interface. This has caused a problem where
status registers requiring HW to update have a 1 cycle delay, due
to the register update h
Hi Chris,
I move gfx_v10_0_check_fw_write_wait(adev);
to gfx_v10_0_init_microcode
BR,
Changfeng.
-Original Message-
From: Koenig, Christian
Sent: Wednesday, November 6, 2019 5:26 PM
To: Zhu, Changfeng ; amd-gfx@lists.freedesktop.org;
Tuikov, Luben ; Huang, Ray ; Huang,
Shimmer
From: changzhu
The GRBM register interface is now capable of bursting 1 cycle per
register wr->wr, wr->rd much faster than previous muticycle per
transaction done interface. This has caused a problem where
status registers requiring HW to update have a 1 cycle delay, due
to the register update h
_wait =
gfx_v10_0_ring_emit_reg_write_reg_wait
for gfx_v10_0_ring_funcs_kiq.
I think there should be no NULL pointer deref problem.
BR,
Changfeng.
-Original Message-
From: Koenig, Christian
Sent: Tuesday, November 5, 2019 7:58 PM
To: Zhu, Changfeng ; amd-gfx@lists.freedesktop.org;
Tuikov, Luben ;
From: changzhu
It needs to add warning to update firmware in gfx9
in case that firmware is too old to have function to
realize dummy read in cp firmware.
Change-Id: I6aef94f0823138f244f1eedb62fde833dd697023
Signed-off-by: changzhu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 7 +++
1 file c
From: changzhu
The GRBM register interface is now capable of bursting 1 cycle per
register wr->wr, wr->rd much faster than previous muticycle per
transaction done interface. This has caused a problem where
status registers requiring HW to update have a 1 cycle delay, due
to the register update h
From: Koenig, Christian
Sent: Tuesday, November 5, 2019 5:13 PM
To: Zhu, Changfeng ; amd-gfx@lists.freedesktop.org;
Tuikov, Luben ; Huang, Ray ; Huang,
Shimmer
Subject: Re: [PATCH] drm/amdgpu: add dummy read by engines for some GCVM status
registers
Am 05.11.19 um 07:32 schrieb Zhu, Chan
From: changzhu
The GRBM register interface is now capable of bursting 1 cycle per
register wr->wr, wr->rd much faster than previous muticycle per
transaction done interface. This has caused a problem where
status registers requiring HW to update have a 1 cycle delay, due
to the register update h
From: changzhu
It can run dispatch/draw tests on new renoir chips. So it needs to
enable dispatch/draw tests for Renoir again.
Change-Id: I3a72a4bbfe0fc663ee0e3e58d8e9c304f513e568
Signed-off-by: changzhu
Reviewed-by: Flora Cui
Reviewed-by: Marek Olšák
Reviewed-by: Huang Rui
---
tests/amdgpu
From: Koenig, Christian
Sent: Monday, October 28, 2019 6:47 PM
To: Zhu, Changfeng ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Pelloux-prayer, Pierre-eric
; Huang, Ray ; Tuikov,
Luben
Subject: Re: [PATCH] drm/amdgpu: GFX9, GFX10: GRBM requires 1-cycle delay
Hi Changfeng,
> So
I try to write a patch based on the patch of Tuikov,Luben.
Inspired by Luben,here is the patch:
From 1980d8f1ed44fb9a84a5ea1f6e2edd2bc25c629a Mon Sep 17 00:00:00 2001
From: changzhu
Date: Thu, 10 Oct 2019 11:02:33 +0800
Subject: [PATCH] drm/amdgpu: add dummy read by engines for some GCVM status
Inline.
-Original Message-
From: amd-gfx On Behalf Of Tuikov, Luben
Sent: Friday, October 25, 2019 5:17 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Pelloux-prayer, Pierre-eric
; Tuikov, Luben ;
Koenig, Christian
Subject: [PATCH] drm/amdgpu: GFX9, GFX10: GRBM requires
Reviewed-by: changzhu
-Original Message-
From: amd-gfx On Behalf Of Feifei Xu
Sent: Friday, August 16, 2019 11:22 AM
To: amd-gfx@lists.freedesktop.org
Cc: Xu, Feifei ; Li, Candice
Subject: [PATCH] drm/amdgpu: Set no-retry as default.
This is to improve performance.
Signed-off-by: Feif
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